/**
* @brief Initializes the transceiver
*
* This function is called to initialize the transceiver.
*
* @return MAC_SUCCESS if the transceiver state is changed to TRX_OFF and the
* current device part number and version number are correct;
* FAILURE otherwise
*/
static retval_t trx_init(void)
{
tal_trx_status_t trx_status;
uint8_t poll_counter = 0;
PAL_RST_HIGH();
PAL_SLP_TR_LOW();
/* Wait typical time of timer TR1. */
pal_timer_delay(P_ON_TO_CLKM_AVAILABLE_TYP_US);
/* Apply reset pulse */
PAL_RST_LOW();
pal_timer_delay(RST_PULSE_WIDTH_US);
PAL_RST_HIGH();
#if !(defined FPGA_EMULATION)
do
{
/* Wait not more than max. value of TR1. */
if (poll_counter == P_ON_TO_CLKM_ATTEMPTS)
{
return FAILURE;
}
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
poll_counter++;
/* Check if AT86RF233 is connected; omit manufacturer id check */
}
while (pal_trx_reg_read(RG_PART_NUM) != PART_NUM_AT86RF233);
#endif /* !defined FPGA_EMULATION */
/* Verify that TRX_OFF can be written */
pal_trx_reg_write(RG_TRX_STATE, CMD_TRX_OFF);
/* Verify that the trx has reached TRX_OFF. */
poll_counter = 0;
do
{
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
trx_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
/* Wait not more than max. value of TR15. */
if (poll_counter == P_ON_TO_TRX_OFF_ATTEMPTS)
{
#if (DEBUG > 0)
pal_alert();
#endif
return FAILURE;
}
poll_counter++;
}
while (trx_status != TRX_OFF);
tal_trx_status = TRX_OFF;
return MAC_SUCCESS;
}
/**
* \brief Initializes the transceiver
*
* This function is called to initialize the transceiver.
*
* \return MAC_SUCCESS if the transceiver state is changed to TRX_OFF and the
* current device part number and version number are correct;
* FAILURE otherwise
*/
static retval_t trx_init(void)
{
tal_trx_status_t trx_status;
uint8_t poll_counter = 0;
PAL_RST_HIGH();
PAL_SLP_TR_LOW();
pal_timer_delay(P_ON_TO_CLKM_AVAILABLE);
/* apply reset pulse */
PAL_RST_LOW();
pal_timer_delay(RST_PULSE_WIDTH_US);
PAL_RST_HIGH();
/* Verify that TRX_OFF can be written */
do {
if (poll_counter == 0xFF) {
return FAILURE;
}
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
poll_counter++;
/* Check if AT86RF230 is connected; omit manufacturer id check
**/
} while ((pal_trx_reg_read(RG_VERSION_NUM) != AT86RF230_REV_B) ||
(pal_trx_reg_read(RG_PART_NUM) != AT86RF230));
pal_trx_reg_write(RG_TRX_STATE, CMD_TRX_OFF);
/* verify that trx has reached TRX_OFF */
poll_counter = 0;
do {
trx_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
if (poll_counter == 0xFF) {
#if (_DEBUG_ > 0)
Assert(
"MAX Attempts to switch to TRX_OFF state reached" ==
0);
#endif
return FAILURE;
}
poll_counter++;
} while (trx_status != TRX_OFF);
tal_trx_status = TRX_OFF;
return MAC_SUCCESS;
}
/**
* @brief Initializes the transceiver
*
* This function is called to initialize the transceiver.
*
* @return MAC_SUCCESS if the transceiver state is changed to TRX_OFF and the
* current device part number and version number are correct;
* FAILURE otherwise
*/
static retval_t trx_init(void)
{
tal_trx_status_t trx_status;
uint8_t poll_counter = 0;
/* Ensure control lines have correct levels. */
PAL_RST_HIGH();
PAL_SLP_TR_LOW();
pal_timer_delay(P_ON_TO_CLKM_AVAILABLE_TYP_US);
/* Apply reset pulse */
PAL_RST_LOW();
pal_timer_delay(RST_PULSE_WIDTH_US);
PAL_RST_HIGH();
/* Verify that the trx has reached TRX_OFF. */
poll_counter = 0;
do
{
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
trx_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
/* Wait not more than max. value of TR2. */
if (poll_counter == RESET_TO_TRX_OFF_ATTEMPTS)
{
#if (DEBUG > 0)
pal_alert();
#endif
return FAILURE;
}
poll_counter++;
}
while (trx_status != TRX_OFF);
tal_trx_status = TRX_OFF;
#if !defined(FPGA_EMULATION)
/* Check if actually running on an ATmegaRFR2 device. */
if (ATMEGARFR2_PART_NUM != pal_trx_reg_read(RG_PART_NUM))
{
return FAILURE;
}
#endif
return MAC_SUCCESS;
}
/**
* \brief Initializes the transceiver
*
* This function is called to initialize the transceiver.
*
* \return MAC_SUCCESS if the transceiver state is changed to TRX_OFF and the
* current device part number and version number are correct;
* FAILURE otherwise
*/
static retval_t trx_init(void)
{
tal_trx_status_t trx_status;
uint8_t poll_counter = 0;
sysclk_enable_peripheral_clock(&TRX_CTRL_0);
PAL_RST_HIGH();
PAL_SLP_TR_LOW();
pal_timer_delay(P_ON_TO_CLKM_AVAILABLE_TYP_US);
/* Apply reset pulse */
PAL_RST_LOW();
pal_timer_delay(RST_PULSE_WIDTH_US);
PAL_RST_HIGH();
/* Verify that the trx has reached TRX_OFF. */
poll_counter = 0;
do {
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
trx_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
/* Wait not more than max. value of TR2. */
if (poll_counter == RESET_TO_TRX_OFF_ATTEMPTS) {
#if (_DEBUG_ > 0)
Assert(
"MAX Attempts to switch to TRX_OFF state reached" ==
0);
#endif
return FAILURE;
}
poll_counter++;
} while (trx_status != TRX_OFF);
tal_trx_status = TRX_OFF;
#if !defined(FPGA_EMULATION)
/* Check if actually running on an ATmegaRFR2 device. */
if (ATMEGARFR2_PART_NUM != pal_trx_reg_read(RG_PART_NUM)) {
return FAILURE;
}
#endif
return MAC_SUCCESS;
}
/**
* @brief Reset transceiver
*
* @return MAC_SUCCESS if the transceiver state is changed to TRX_OFF
* FAILURE otherwise
*/
static retval_t trx_reset(void)
{
tal_trx_status_t trx_status;
uint8_t poll_counter = 0;
#if (EXTERN_EEPROM_AVAILABLE == 1)
uint8_t xtal_trim_value;
#endif
/* Get trim value for 16 MHz xtal; needs to be done before reset */
#if (EXTERN_EEPROM_AVAILABLE == 1)
pal_ps_get(EXTERN_EEPROM, EE_XTAL_TRIM_ADDR, 1, &xtal_trim_value);
#endif
/* trx might sleep, so wake it up */
PAL_SLP_TR_LOW();
pal_timer_delay(SLEEP_TO_TRX_OFF_TYP_US);
/* Apply reset pulse */
PAL_RST_LOW();
pal_timer_delay(RST_PULSE_WIDTH_US);
PAL_RST_HIGH();
/* verify that trx has reached TRX_OFF */
do
{
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
trx_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
/* Wait not more than max. value of TR2. */
if (poll_counter == SLEEP_TO_TRX_OFF_ATTEMPTS)
{
#if (DEBUG > 0)
pal_alert();
#endif
return FAILURE;
}
poll_counter++;
}
while (trx_status != TRX_OFF);
tal_trx_status = TRX_OFF;
// Write 16MHz xtal trim value to trx.
// It's only necessary if it differs from the reset value.
#if (EXTERN_EEPROM_AVAILABLE == 1)
if (xtal_trim_value != 0x00)
{
pal_trx_bit_write(SR_XTAL_TRIM, xtal_trim_value);
}
#endif
return MAC_SUCCESS;
}
/**
* \brief Reset transceiver
*/
static retval_t trx_reset(void)
{
tal_trx_status_t trx_status;
uint8_t poll_counter = 0;
#if (EXTERN_EEPROM_AVAILABLE == 1)
uint8_t xtal_trim_value;
#endif
/* Get trim value for 16 MHz xtal; needs to be done before reset */
#if (EXTERN_EEPROM_AVAILABLE == 1)
pal_ps_get(EXTERN_EEPROM, EE_XTAL_TRIM_ADDR, 1, &xtal_trim_value);
#endif
/* trx might sleep, so wake it up */
PAL_SLP_TR_LOW();
pal_timer_delay(SLEEP_TO_TRX_OFF_US);
PAL_RST_LOW();
pal_timer_delay(RST_PULSE_WIDTH_US);
PAL_RST_HIGH();
/* verify that trx has reached TRX_OFF */
do {
trx_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
poll_counter++;
if (poll_counter > 250) {
#if (_DEBUG_ > 0)
Assert(
"MAX Attempts to switch to TRX_OFF state reached" ==
0);
#endif
return FAILURE;
}
} while (trx_status != TRX_OFF);
tal_trx_status = TRX_OFF;
/* Write 16MHz xtal trim value to trx. */
/* It's only necessary if it differs from the reset value. */
#if (EXTERN_EEPROM_AVAILABLE == 1)
if (xtal_trim_value != 0x00) {
pal_trx_bit_write(SR_XTAL_TRIM, xtal_trim_value);
}
#endif
return MAC_SUCCESS;
}
/**
* \brief Reset transceiver
*
* \return MAC_SUCCESS if the transceiver state is changed to TRX_OFF
* FAILURE otherwise
*/
static retval_t trx_reset(void)
{
tal_trx_status_t trx_status;
uint8_t poll_counter = 0;
/* trx might sleep, so wake it up */
PAL_SLP_TR_LOW();
pal_timer_delay(SLEEP_TO_TRX_OFF_TYP_US);
/* Apply reset pulse */
PAL_RST_LOW();
pal_timer_delay(RST_PULSE_WIDTH_US);
PAL_RST_HIGH();
/* verify that trx has reached TRX_OFF */
do {
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
trx_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
/* Wait not more than max. value of TR2. */
if (poll_counter == SLEEP_TO_TRX_OFF_ATTEMPTS) {
#if (_DEBUG_ > 0)
Assert(
"MAX Attempts to switch to TRX_OFF state reached" ==
0);
#endif
return FAILURE;
}
poll_counter++;
} while (trx_status != TRX_OFF);
tal_trx_status = TRX_OFF;
#ifdef STB_ON_SAL
#if (SAL_TYPE == AT86RF2xx)
stb_restart();
#endif
#endif
return MAC_SUCCESS;
}
/**
* \brief Initializes the transceiver
*
* This function is called to initialize the transceiver.
*
* \return MAC_SUCCESS if the transceiver state is changed to TRX_OFF and the
* current device part number and version number are correct;
* FAILURE otherwise
*/
static retval_t trx_init(void)
{
tal_trx_status_t trx_status;
uint8_t poll_counter = 0;
/* Ensure control lines have correct levels. */
PAL_RST_HIGH();
PAL_SLP_TR_LOW();
/* Wait typical time of timer TR1. */
pal_timer_delay(P_ON_TO_CLKM_AVAILABLE_TYP_US);
#if !(defined FPGA_EMULATION)
do {
/* Apply reset pulse */
PAL_RST_LOW();
pal_timer_delay(RST_PULSE_WIDTH_US);
PAL_RST_HIGH();
/* Wait not more than max. value of TR1. */
if (poll_counter == P_ON_TO_CLKM_ATTEMPTS) {
return FAILURE;
}
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
poll_counter++;
/* Check if AT86RF212 is connected; omit manufacturer id check
**/
} while (pal_trx_reg_read(RG_PART_NUM) != PART_NUM_AT86RF212);
#endif /* !defined FPGA_EMULATION */
/* Ensure right CLKM value for external timer clock source, i.e. 1 MHz
**/
pal_trx_bit_write(SR_CLKM_CTRL, CLKM_1MHZ);
/* Set trx to off mode */
pal_trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF);
/* Verify that the trx has reached TRX_OFF. */
poll_counter = 0;
do {
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
trx_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
/* Wait not more than max. value of TR2. */
if (poll_counter == SLEEP_TO_TRX_OFF_ATTEMPTS) {
#if (_DEBUG_ > 0)
Assert(
"MAX Attempts to switch to TRX_OFF state reached" ==
0);
#endif
return FAILURE;
}
poll_counter++;
} while (trx_status != TRX_OFF);
tal_trx_status = TRX_OFF;
return MAC_SUCCESS;
}
/**
* \brief Initializes the transceiver
*
* This function is called to initialize the transceiver.
*
* \return MAC_SUCCESS if the transceiver state is changed to TRX_OFF and the
* current device part number and version number are correct;
* FAILURE otherwise
*/
static retval_t trx_init(void)
{
tal_trx_status_t trx_status;
uint8_t poll_counter = 0;
/* Ensure control lines have correct levels. */
PAL_RST_HIGH();
PAL_SLP_TR_LOW();
/* Wait typical time of timer TR1. */
pal_timer_delay(P_ON_TO_CLKM_AVAILABLE_TYP_US);
/* Apply reset pulse */
PAL_RST_LOW();
pal_timer_delay(RST_PULSE_WIDTH_US);
PAL_RST_HIGH();
/* Verify that TRX_OFF can be written */
do
{
/* Wait not more than max. value of TR1. */
if (poll_counter == P_ON_TO_CLKM_ATTEMPTS)
{
return FAILURE;
}
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
poll_counter++;
/* Check if AT86RF231 is connected; omit manufacturer id check */
}
while ((pal_trx_reg_read(RG_VERSION_NUM) != AT86RF231_VERSION_NUM) ||
(pal_trx_reg_read(RG_PART_NUM) != AT86RF231_PART_NUM));
/* Verify that TRX_OFF can be written */
pal_trx_reg_write(RG_TRX_STATE, CMD_TRX_OFF);
/* Verify that the trx has reached TRX_OFF. */
poll_counter = 0;
do
{
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
trx_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
/* Wait not more than max. value of TR2. */
if (poll_counter == SLEEP_TO_TRX_OFF_ATTEMPTS)
{
#if (_DEBUG_ > 0)
Assert("MAX Attempts to switch to TRX_OFF state reached" == 0);
#endif
return FAILURE;
}
poll_counter++;
}
while (trx_status != TRX_OFF);
tal_trx_status = TRX_OFF;
return MAC_SUCCESS;
}
/**
* \brief Initializes the transceiver
*
* This function is called to initialize the transceiver.
*
* \return MAC_SUCCESS if the transceiver state is changed to TRX_OFF and the
* current device part number and version number are correct;
* FAILURE otherwise
*/
static retval_t trx_init(void)
{
volatile tal_trx_status_t test_status;
uint8_t poll_counter = 0;
/* Wait typical time of timer TR1. */
pal_timer_delay(P_ON_TO_CLKM_AVAILABLE_TYP_US);
/* make sure SPI is working properly */
// while ((tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS) != P_ON);
/* Apply reset pulse. Ensure control lines have correct levels (SEL is
* already set in TRX_INIT().
*/
PAL_RST_LOW();
PAL_SLP_TR_LOW();
pal_timer_delay(RST_PULSE_WIDTH_US);
PAL_RST_HIGH();
/* Wait typical time of timer TR13. */
pal_timer_delay(30);
test_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
/* Dummy assignment, to avoid compiler warning */
test_status = test_status;
#if !(defined FPGA_EMULATION)
do
{
/* Wait not more than max. value of TR1. */
if (poll_counter == P_ON_TO_CLKM_ATTEMPTS)
{
return FAILURE;
}
/* Wait a short time interval. */
pal_timer_delay(TRX_POLL_WAIT_TIME_US);
poll_counter++;
/* Check if AT86RF212B is connected; omit manufacturer id check */
}
while (pal_trx_reg_read(RG_PART_NUM) != PART_NUM_AT86RF212B);
#endif /* !defined FPGA_EMULATION */
/* Set trx to off mode */
pal_trx_reg_write(RG_TRX_STATE, CMD_TRX_OFF);
/* \todo remove this line?! */
while ((tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS) != TRX_OFF);
#if (_DEBUG_ > 0)
tal_trx_status_t trx_status;
trx_status = (tal_trx_status_t)pal_trx_bit_read(SR_TRX_STATUS);
if (trx_status != TRX_OFF)
{
return FAILURE;
}
#endif
pal_trx_reg_write(RG_IRQ_MASK, TRX_NO_IRQ);
tal_trx_status = TRX_OFF;
return MAC_SUCCESS;
}
