int32_t DRV_SPI1_ClientConfigure ( const DRV_SPI_CLIENT_DATA * cfgData )
{
DRV_SPI_OBJ *dObj = (DRV_SPI_OBJ*)NULL;
dObj = &gDrvSPI1Obj;
if (cfgData == NULL)
{
/* Nothing to do */
return 0;
}
if (cfgData->operationStarting != NULL)
{
dObj->operationStarting = cfgData->operationStarting;
}
if (cfgData->operationEnded != NULL)
{
dObj->operationEnded = cfgData->operationEnded;
}
if (cfgData->baudRate != 0)
{
PLIB_SPI_BaudRateSet (SPI_ID_2,
SYS_CLK_PeripheralFrequencyGet(CLK_BUS_PERIPHERAL_2),
cfgData->baudRate);
}
return 0;
}
void DRV_SPI0_Initialize(void)
{
PLIB_SPI_Disable(SPI_ID_1);
PLIB_SPI_MasterEnable(SPI_ID_1);
PLIB_SPI_SlaveSelectEnable(SPI_ID_1);
PLIB_SPI_StopInIdleDisable(SPI_ID_1);
PLIB_SPI_ClockPolaritySelect(SPI_ID_1, SPI_CLOCK_POLARITY_IDLE_LOW);
PLIB_SPI_OutputDataPhaseSelect(SPI_ID_1, SPI_OUTPUT_DATA_PHASE_ON_IDLE_TO_ACTIVE_CLOCK);
PLIB_SPI_InputSamplePhaseSelect(SPI_ID_1, SPI_INPUT_SAMPLING_PHASE_IN_MIDDLE);
PLIB_SPI_CommunicationWidthSelect(SPI_ID_1, SPI_COMMUNICATION_WIDTH_8BITS);
PLIB_SPI_FramedCommunicationDisable( SPI_ID_1 );
PLIB_SPI_AudioProtocolDisable(SPI_ID_1);
PLIB_SPI_FIFOEnable( SPI_ID_1 );
PLIB_SPI_BaudRateSet(SPI_ID_1, SYS_CLK_PeripheralFrequencyGet(CLK_BUS_PERIPHERAL_2), 1000000);
PLIB_SPI_Enable(SPI_ID_1);
}
int32_t DRV_SPI_SetupHardware(struct DRV_SPI_DRIVER_OBJECT * driverObject, const DRV_SPI_INIT * const init)
{
const register SPI_MODULE_ID spiId = init->spiId;
/* disable the SPI*/
PLIB_SPI_Disable(spiId);
/* Set up Master or Slave Mode*/
if (init->spiMode == DRV_SPI_MODE_MASTER)
{
PLIB_SPI_MasterEnable ( spiId );
}
else
if (init->spiMode == DRV_SPI_MODE_SLAVE)
{
PLIB_SPI_SlaveEnable ( spiId );
}
else
{
SYS_ASSERT(false, "\r\nInvalid SPI Configuration.");
return -1;
}
/* Set up if the SPI is allowed to run while the rest of the CPU is in idle mode*/
if (init->allowIdleRun)
{
PLIB_SPI_StopInIdleDisable( spiId );
}
else
{
PLIB_SPI_StopInIdleEnable( spiId );
}
/* Set up close Polarity and output data phase*/
switch(init->clockMode)
{
case DRV_SPI_CLOCK_MODE_IDLE_LOW_EDGE_RISE:
PLIB_SPI_ClockPolaritySelect( spiId, SPI_CLOCK_POLARITY_IDLE_LOW );
PLIB_SPI_OutputDataPhaseSelect( spiId, SPI_OUTPUT_DATA_PHASE_ON_IDLE_TO_ACTIVE_CLOCK );
break;
case DRV_SPI_CLOCK_MODE_IDLE_LOW_EDGE_FALL:
PLIB_SPI_ClockPolaritySelect( spiId, SPI_CLOCK_POLARITY_IDLE_LOW );
PLIB_SPI_OutputDataPhaseSelect( spiId, SPI_OUTPUT_DATA_PHASE_ON_ACTIVE_TO_IDLE_CLOCK );
break;
case DRV_SPI_CLOCK_MODE_IDLE_HIGH_EDGE_FALL: //TODO: Make sure these are right
PLIB_SPI_ClockPolaritySelect( spiId, SPI_CLOCK_POLARITY_IDLE_HIGH );
PLIB_SPI_OutputDataPhaseSelect( spiId, SPI_OUTPUT_DATA_PHASE_ON_IDLE_TO_ACTIVE_CLOCK );
break;
case DRV_SPI_CLOCK_MODE_IDLE_HIGH_EDGE_RISE:
PLIB_SPI_ClockPolaritySelect( spiId, SPI_CLOCK_POLARITY_IDLE_HIGH );
PLIB_SPI_OutputDataPhaseSelect( spiId, SPI_OUTPUT_DATA_PHASE_ON_ACTIVE_TO_IDLE_CLOCK );
break;
default:
SYS_ASSERT(false, "\r\nInvalid SPI Configuration.");
return -1;
}
// Set up the Input Sample Phase
PLIB_SPI_InputSamplePhaseSelect ( spiId, init->inputSamplePhase);
//Enable the SSx Pin on slave side if needed
if(init->spiMode == DRV_SPI_MODE_SLAVE && (init->spiProtocolType == DRV_SPI_PROTOCOL_TYPE_FRAMED || init->spiSlaveSSPin))
{
PLIB_SPI_PinEnable(spiId, SPI_PIN_SLAVE_SELECT);
}
else
{
PLIB_SPI_PinDisable(spiId, SPI_PIN_SLAVE_SELECT);
}
/* Communication Width Selection */
PLIB_SPI_CommunicationWidthSelect ( spiId, init->commWidth );
/* Baudrate selection */
PLIB_SPI_BaudRateSet( spiId , SYS_CLK_PeripheralFrequencyGet(init->spiClk), init->baudRate );
driverObject->currentBaudRate = init->baudRate;
driverObject->baudRate = init->baudRate;
switch (init->spiProtocolType)
{
case DRV_SPI_PROTOCOL_TYPE_STANDARD:
PLIB_SPI_FramedCommunicationDisable( spiId );
break;
case DRV_SPI_PROTOCOL_TYPE_FRAMED:
#if defined (PLIB_SPI_ExistsFrameSyncPulseDirection)
if (PLIB_SPI_ExistsFrameSyncPulseDirection(spiId))
{
PLIB_SPI_FrameSyncPulseDirectionSelect(spiId, init->framePulseDirection);
}
#endif
#if defined (PLIB_SPI_ExistsFrameSyncPulsePolarity)
if (PLIB_SPI_ExistsFrameSyncPulsePolarity(spiId))
{
PLIB_SPI_FrameSyncPulsePolaritySelect(spiId, init->framePulsePolarity);
}
#endif
#if defined (PLIB_SPI_ExistsFrameSyncPulseEdge)
if (PLIB_SPI_ExistsFrameSyncPulseEdge(spiId))
{
PLIB_SPI_FrameSyncPulseEdgeSelect(spiId, init->framePulseEdge);
}
#endif
#if defined (PLIB_SPI_ExistsFrameSyncPulseWidth)
if (PLIB_SPI_ExistsFrameSyncPulseWidth(spiId))
{
PLIB_SPI_FrameSyncPulseWidthSelect(spiId, init->framePulseWidth);
}
#endif
#if defined (PLIB_SPI_ExistsFrameSyncPulseCounter)
if (PLIB_SPI_ExistsFrameSyncPulseCounter(spiId))
{
PLIB_SPI_FrameSyncPulseCounterSelect(spiId, init->frameSyncPulse);
}
#endif
PLIB_SPI_FramedCommunicationEnable( spiId );
break;
case DRV_SPI_PROTOCOL_TYPE_AUDIO:
PLIB_SPI_FramedCommunicationDisable( spiId );
{
SYS_ASSERT(false, "\r\nInvalid SPI Configuration.");
return -1;
}
break;
default:
SYS_ASSERT(false, "\r\nInvalid SPI Configuration.");
return -1;
}
if (PLIB_SPI_ExistsFIFOControl( spiId ))
{
PLIB_SPI_FIFODisable( spiId );
}
PLIB_SPI_BufferClear( spiId );
PLIB_SPI_ReceiverOverflowClear ( spiId );
// Note: We do not enable the SPI here, that will be done by the first client.
return 0;
}
int32_t DRV_SPI_ISRMasterEBM8BitTasks ( struct DRV_SPI_DRIVER_OBJECT * pDrvInstance )
{
bool continueLoop;
/* Disable the interrupts */
SYS_INT_SourceDisable(pDrvInstance->rxInterruptSource);
SYS_INT_SourceDisable(pDrvInstance->txInterruptSource);
SYS_INT_SourceDisable(pDrvInstance->errInterruptSource);
do {
DRV_SPI_JOB_OBJECT * currentJob = pDrvInstance->currentJob;
SPI_MODULE_ID spiId = pDrvInstance->spiId;
/* Check for a new task */
if (pDrvInstance->currentJob == NULL)
{
if (DRV_SPI_SYS_QUEUE_Dequeue(pDrvInstance->queue, (void *)&(pDrvInstance->currentJob)) != DRV_SPI_SYS_QUEUE_SUCCESS)
{
SYS_ASSERT(false, "\r\nSPI Driver: Error in dequeing.");
return 0;
}
if (pDrvInstance->currentJob == NULL)
{
pDrvInstance->txEnabled = false;
return 0;
}
currentJob = pDrvInstance->currentJob;
pDrvInstance->symbolsInProgress = 0;
/* Call the operation starting function pointer. This can be used to modify the slave select lines */
DRV_SPI_CLIENT_OBJECT * pClient = (DRV_SPI_CLIENT_OBJECT*)currentJob->pClient;
if (pClient->operationStarting != NULL)
{
(*pClient->operationStarting)(DRV_SPI_BUFFER_EVENT_PROCESSING, (DRV_SPI_BUFFER_HANDLE)currentJob, currentJob->context);
}
/* Check the baud rate. If its different set the new baud rate*/
if (pClient->baudRate != pDrvInstance->currentBaudRate)
{
PLIB_SPI_BaudRateSet( spiId , SYS_CLK_PeripheralFrequencyGet(pDrvInstance->spiClk), pClient->baudRate );
pDrvInstance->currentBaudRate = pClient->baudRate;
}
/* List the new job as processing*/
currentJob->status = DRV_SPI_BUFFER_EVENT_PROCESSING;
if (currentJob->dataLeftToTx +currentJob->dummyLeftToTx > PLIB_SPI_RX_8BIT_FIFO_SIZE(spiId))
{
PLIB_SPI_FIFOInterruptModeSelect(spiId, SPI_FIFO_INTERRUPT_WHEN_TRANSMIT_BUFFER_IS_1HALF_EMPTY_OR_MORE);
PLIB_SPI_FIFOInterruptModeSelect(spiId, SPI_FIFO_INTERRUPT_WHEN_RECEIVE_BUFFER_IS_1HALF_FULL_OR_MORE);
}
/* Flush out the Receive buffer */
PLIB_SPI_BufferClear(spiId);
}
/* Set up DMA Receive job. This is done here to ensure that the RX job is ready to receive when TXing starts*/
if ((pDrvInstance->rxDmaThreshold != 0) && (currentJob->dataLeftToRx > pDrvInstance->rxDmaThreshold))
{
PLIB_SPI_FIFOInterruptModeSelect(spiId, SPI_FIFO_INTERRUPT_WHEN_RECEIVE_BUFFER_IS_NOT_EMPTY);
uint8_t * ptr = &(currentJob->rxBuffer[currentJob->dataRxed]);
uint32_t len = MIN(MIN(PLIB_DMA_MAX_TRF_SIZE, DRV_SPI_DMA_TXFER_SIZE), currentJob->dataLeftToRx);
void * spiPtr = PLIB_SPI_BufferAddressGet(spiId);
currentJob->rxDMAProgressStage = DRV_SPI_DMA_DATA_INPROGRESS;
currentJob->dataLeftToRx -= len;
currentJob->dataRxed += len;
pDrvInstance->rxEnabled = false;
SYS_DMA_ChannelTransferAdd(pDrvInstance->rxDmaChannelHandle, spiPtr, 1, ptr, len, 1);
}
else if ((currentJob->rxDMAProgressStage == DRV_SPI_DMA_NONE) && (currentJob->dataLeftToRx == 0) && (pDrvInstance->rxDmaThreshold != 0) && (currentJob->dummyLeftToRx > pDrvInstance->rxDmaThreshold))
{
PLIB_SPI_FIFOInterruptModeSelect(spiId, SPI_FIFO_INTERRUPT_WHEN_RECEIVE_BUFFER_IS_NOT_EMPTY);
uint8_t * ptr = sDrvSpiRxDummy;
uint32_t len = MIN(MIN(MIN(PLIB_DMA_MAX_TRF_SIZE, DRV_SPI_DMA_DUMMY_BUFFER_SIZE), DRV_SPI_DMA_TXFER_SIZE), currentJob->dummyLeftToRx);
void * spiPtr = PLIB_SPI_BufferAddressGet(spiId);
currentJob->rxDMAProgressStage = DRV_SPI_DMA_DUMMY_INPROGRESS;
currentJob->dummyLeftToRx -= len;
pDrvInstance->rxEnabled = false;
SYS_DMA_ChannelTransferAdd(pDrvInstance->rxDmaChannelHandle, spiPtr, 1, ptr, len, 1);
}
/* Set up the DMA Transmit job here. This is done after the RX job to help prevent buffer overruns.*/
if ((pDrvInstance->txDmaThreshold != 0) && (currentJob->dataLeftToTx > pDrvInstance->txDmaThreshold))
{
PLIB_SPI_FIFOInterruptModeSelect(spiId, SPI_FIFO_INTERRUPT_WHEN_TRANSMIT_BUFFER_IS_1HALF_EMPTY_OR_MORE);
uint8_t * ptr = &(currentJob->txBuffer[currentJob->dataTxed]);
uint32_t len = MIN(MIN(PLIB_DMA_MAX_TRF_SIZE, DRV_SPI_DMA_TXFER_SIZE), currentJob->dataLeftToTx);
void * spiPtr = PLIB_SPI_BufferAddressGet(pDrvInstance->spiId);
currentJob->txDMAProgressStage = DRV_SPI_DMA_DATA_INPROGRESS;
currentJob->dataLeftToTx -= len;
currentJob->dataTxed += len;
pDrvInstance->txEnabled = false;
SYS_DMA_ChannelTransferAdd(pDrvInstance->txDmaChannelHandle, ptr, len, spiPtr, 1, 1);
}
else if ((currentJob->txDMAProgressStage == DRV_SPI_DMA_NONE) && (currentJob->dataLeftToTx == 0) && (pDrvInstance->txDmaThreshold != 0) && (currentJob->dummyLeftToTx > pDrvInstance->txDmaThreshold))
{
PLIB_SPI_FIFOInterruptModeSelect(spiId, SPI_FIFO_INTERRUPT_WHEN_TRANSMIT_BUFFER_IS_1HALF_EMPTY_OR_MORE);
uint8_t * ptr = sDrvSpiTxDummy;
uint32_t len = MIN(MIN(MIN(PLIB_DMA_MAX_TRF_SIZE, DRV_SPI_DMA_DUMMY_BUFFER_SIZE), DRV_SPI_DMA_TXFER_SIZE), currentJob->dummyLeftToTx);
void * spiPtr = PLIB_SPI_BufferAddressGet(pDrvInstance->spiId);
currentJob->txDMAProgressStage = DRV_SPI_DMA_DUMMY_INPROGRESS;
currentJob->dummyLeftToTx -= len;
pDrvInstance->txEnabled = false;
SYS_DMA_ChannelTransferAdd(pDrvInstance->txDmaChannelHandle, ptr, len, spiPtr, 1, 1);
}
bool rxDMAInProgress = (currentJob->rxDMAProgressStage == DRV_SPI_DMA_DATA_INPROGRESS) || (currentJob->rxDMAProgressStage == DRV_SPI_DMA_DUMMY_INPROGRESS);
bool txDMAInProgress = (currentJob->txDMAProgressStage == DRV_SPI_DMA_DATA_INPROGRESS) || (currentJob->txDMAProgressStage == DRV_SPI_DMA_DUMMY_INPROGRESS);
continueLoop = false;
/* Execute the sub tasks */
DRV_SPI_ISRErrorTasks(pDrvInstance);
/* Figure out how many bytes are left to be received */
size_t bytesLeft = currentJob->dataLeftToRx + currentJob->dummyLeftToRx;
// Check to see if we have any data left to receive and update the bytes left.
if ((bytesLeft != 0) && !rxDMAInProgress)
{
DRV_SPI_MasterEBMReceive8BitISR(pDrvInstance);
bytesLeft = currentJob->dataLeftToRx + currentJob->dummyLeftToRx;
}
if
(!txDMAInProgress &&
(currentJob->dataLeftToTx +currentJob->dummyLeftToTx != 0)
)
{
DRV_SPI_MasterEBMSend8BitISR(pDrvInstance);
}
if ((bytesLeft == 0) && !rxDMAInProgress && !txDMAInProgress)
{
// Disable the interrupt, or more correctly don't re-enable it later*/
pDrvInstance->rxEnabled = false;
/* Job is complete*/
currentJob->status = DRV_SPI_BUFFER_EVENT_COMPLETE;
/* Call the job complete call back*/
if (currentJob->completeCB != NULL)
{
(*currentJob->completeCB)(DRV_SPI_BUFFER_EVENT_COMPLETE, (DRV_SPI_BUFFER_HANDLE)currentJob, currentJob->context);
}
/* Call the operation complete call back. This is different than the
job complete callback. This can be used to modify the Slave Select line.
The job complete callback can be used to free a client that is blocked
waiting for complete*/
DRV_SPI_CLIENT_OBJECT * pClient = (DRV_SPI_CLIENT_OBJECT*)currentJob->pClient;
if (pClient->operationEnded != NULL)
{
(*pClient->operationEnded)(DRV_SPI_BUFFER_EVENT_COMPLETE, (DRV_SPI_BUFFER_HANDLE)currentJob, currentJob->context);
}
/* Return the job back to the free queue*/
if (DRV_SPI_SYS_QUEUE_FreeElement(pDrvInstance->queue, currentJob) != DRV_SPI_SYS_QUEUE_SUCCESS)
{
SYS_ASSERT(false, "\r\nSPI Driver: Queue free element error.");
return 0;
}
/* Clean up */
pDrvInstance->currentJob = NULL;
if (!DRV_SPI_SYS_QUEUE_IsEmpty(pDrvInstance->queue))
{
continueLoop = true;
continue;
}
else
{
break;
}
}
else if (rxDMAInProgress)
{
// DMA is in progress
// Wipe out the symbols in Progress
pDrvInstance->rxEnabled = false;
pDrvInstance->symbolsInProgress = 0;
}
/* Check to see if the interrupts would fire again if so just go back into
the loop instead of suffering the interrupt latency of exiting and re-entering*/
if (pDrvInstance->currentJob != NULL)
{
/* Clear the Interrupts */
SYS_INT_SourceStatusClear(pDrvInstance->rxInterruptSource);
SYS_INT_SourceStatusClear(pDrvInstance->txInterruptSource);
SYS_INT_SourceStatusClear(pDrvInstance->errInterruptSource);
/* Interrupts should immediately become active again if they're in a fired condition */
if (((pDrvInstance->rxEnabled) && SYS_INT_SourceStatusGet(pDrvInstance->rxInterruptSource)) ||
((pDrvInstance->txEnabled) && SYS_INT_SourceStatusGet(pDrvInstance->txInterruptSource)) ||
(SYS_INT_SourceStatusGet(pDrvInstance->errInterruptSource)))
{
/* Interrupt would fire again anyway so we should just go back to the start*/
continueLoop = true;
continue;
}
/* If we're here then we know that the interrupt should not be firing again so we can exit cleanly*/
/* Clear the interrupts now that we're done*/
/* Re-enable the interrupts*/
if (pDrvInstance->rxEnabled)
{
SYS_INT_SourceEnable(pDrvInstance->rxInterruptSource);
}
if (pDrvInstance->txEnabled)
{
SYS_INT_SourceEnable(pDrvInstance->txInterruptSource);
}
return 0;
}
} while(continueLoop);
/* if we're here it means that we have no more jobs in the queue, tx and rx interrupts will be re-enabled by the BufferAdd* functions*/
SYS_INT_SourceStatusClear(pDrvInstance->rxInterruptSource);
SYS_INT_SourceStatusClear(pDrvInstance->txInterruptSource);
return 0;
}
SYS_MODULE_OBJ DRV_SPI0_Initialize(void)
{
DRV_SPI_OBJ *dObj = (DRV_SPI_OBJ*)NULL;
dObj = &gDrvSPI0Obj;
/* Disable the SPI module to configure it*/
PLIB_SPI_Disable ( SPI_ID_1 );
/* Set up Master or Slave Mode*/
PLIB_SPI_MasterEnable ( SPI_ID_1 );
PLIB_SPI_PinDisable(SPI_ID_1, SPI_PIN_SLAVE_SELECT);
/* Set up if the SPI is allowed to run while the rest of the CPU is in idle mode*/
PLIB_SPI_StopInIdleDisable( SPI_ID_1 );
/* Set up clock Polarity and output data phase*/
PLIB_SPI_ClockPolaritySelect( SPI_ID_1, SPI_CLOCK_POLARITY_IDLE_LOW );
PLIB_SPI_OutputDataPhaseSelect( SPI_ID_1, SPI_OUTPUT_DATA_PHASE_ON_IDLE_TO_ACTIVE_CLOCK );
/* Set up the Input Sample Phase*/
PLIB_SPI_InputSamplePhaseSelect ( SPI_ID_1, SPI_INPUT_SAMPLING_PHASE_IN_MIDDLE);
/* Communication Width Selection */
PLIB_SPI_CommunicationWidthSelect ( SPI_ID_1, SPI_COMMUNICATION_WIDTH_8BITS );
/* Baud rate selection */
PLIB_SPI_BaudRateSet( SPI_ID_1 , SYS_CLK_PeripheralFrequencyGet(CLK_BUS_PERIPHERAL_2), 1000000 );
/* Protocol selection */
PLIB_SPI_FramedCommunicationDisable( SPI_ID_1 );
#if defined (PLIB_SPI_ExistsAudioProtocolControl)
if (PLIB_SPI_ExistsAudioProtocolControl(SPI_ID_1))
{
PLIB_SPI_AudioProtocolDisable(SPI_ID_1);
}
#endif
/* Buffer type selection */
#if defined (PLIB_SPI_ExistsFIFOControl)
if (PLIB_SPI_ExistsFIFOControl( SPI_ID_1 ))
{
PLIB_SPI_FIFODisable( SPI_ID_1 );
}
#endif
PLIB_SPI_BufferClear( SPI_ID_1 );
PLIB_SPI_ReceiverOverflowClear ( SPI_ID_1 );
/* Initialize Queue only once for all instances of SPI driver*/
if (DRV_SPI_SYS_QUEUE_Initialize(&qmInitData, &hQueueManager) != DRV_SPI_SYS_QUEUE_SUCCESS)
{
SYS_ASSERT(false, "\r\nSPI Driver: Could not create queuing system.");
return SYS_MODULE_OBJ_INVALID;
}
/* Update the Queue parameters. */
qInitData.maxElements = 10; //Queue size
qInitData.reserveElements = 1; //Mininmum number of job queues reserved
/* Create Queue for this instance of SPI */
if (DRV_SPI_SYS_QUEUE_CreateQueue(hQueueManager, &qInitData, &dObj->queue) != DRV_SPI_SYS_QUEUE_SUCCESS)
{
SYS_ASSERT(false, "\r\nSPI Driver: Could not set up driver instance queue.");
return SYS_MODULE_OBJ_INVALID;
}
/* Update the SPI OBJECT parameters. */
dObj->operationStarting = NULL;
dObj->operationEnded = NULL;
SYS_INT_SourceDisable(INT_SOURCE_SPI_1_TRANSMIT);
SYS_INT_SourceDisable(INT_SOURCE_SPI_1_RECEIVE);
SYS_INT_SourceEnable(INT_SOURCE_SPI_1_ERROR);
/* Clear all interrupt sources */
SYS_INT_SourceStatusClear(INT_SOURCE_SPI_1_TRANSMIT);
SYS_INT_SourceStatusClear(INT_SOURCE_SPI_1_RECEIVE);
SYS_INT_SourceStatusClear(INT_SOURCE_SPI_1_ERROR);
/* Enable the Module */
PLIB_SPI_Enable(SPI_ID_1);
return (SYS_MODULE_OBJ)DRV_SPI_INDEX_0 ;
}