void timer_init(void){ PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH); PRCMLoadSet(); PRCMPeripheralSleepEnable(PRCM_PERIPH_TIMER2); PRCMLoadSet(); PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_TIMER2); PRCMLoadSet(); PRCMPeripheralRunEnable(PRCM_PERIPH_TIMER2); PRCMLoadSet(); TimerDisable(GPT2_BASE, TIMER_BOTH); TimerConfigure(GPT2_BASE, TIMER_CFG_PERIODIC); TimerLoadSet(GPT2_BASE, TIMER_A, 48000000); TimerIntClear(GPT2_BASE, TIMER_TIMA_TIMEOUT); TimerIntEnable(GPT2_BASE, TIMER_TIMA_TIMEOUT); TimerEnable(GPT2_BASE, TIMER_A); }
void radio_init(void) { #if !RADIO_POLLED_MODE // route all IRQs to CPE0 HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) = 0; HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) = CPE0_MASK; // clear any pending HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = 0; HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0; //NVIC_EnableIRQ(rfc_cpe_0_IRQn); //NVIC_EnableIRQ(rfc_cpe_1_IRQn); NVIC_EnableIRQ(rfc_cmd_ack_IRQn); #endif // Power RF domain PRCMPowerDomainOn(PRCM_DOMAIN_RFCORE); while (PRCMPowerDomainStatus(PRCM_DOMAIN_RFCORE) != PRCM_DOMAIN_POWER_ON) ; dprintf(INFO, "power on\n"); // enable the RF top clock PRCMDomainEnable(PRCM_DOMAIN_RFCORE); PRCMLoadSet(); dprintf(INFO, "top clock on\n"); // enable all RF sub clocks RFCClockEnable(); dprintf(INFO, "clocks on\n"); thread_sleep(1000); rf_patch_cpe_genfsk(); dprintf(INFO, "patched\n"); unsigned n = radio_send_cmd(IMM_CMD(CMD_PING, 0, 0)); dprintf(INFO, "RESPONSE %08x\n", n); n = radio_send_cmd(IMM_CMD(CMD_PING, 0, 0)); dprintf(INFO, "RESPONSE %08x\n", n); rf_op_fw_info_t fwinfo; memset(&fwinfo, 0, sizeof(fwinfo)); fwinfo.cmd = CMD_GET_FW_INFO; n = radio_send_cmd((uint32_t) &fwinfo); dprintf(INFO, "FW %d %04x %04x %04x %04x\n", n, fwinfo.version, fwinfo.free_ram_start, fwinfo.free_ram_size, fwinfo.avail_rat_ch); n = radio_send_cmd(IMM_CMD(CMD_START_RAT, 0, 0)); dprintf(INFO, "START RAT %d\n", n); }
/** * Function documented in platform/uart.h */ otError otPlatUartDisable(void) { UARTDisable(UART0_BASE); UARTIntUnregister(UART0_BASE); UARTIntDisable(UART0_BASE, UART_INT_RX | UART_INT_RT); IOCPortConfigureSet(IOID_2, IOC_PORT_GPIO, IOC_STD_INPUT); IOCPortConfigureSet(IOID_3, IOC_PORT_GPIO, IOC_STD_INPUT); PRCMPeripheralRunDisable(PRCM_PERIPH_UART0); PRCMPeripheralSleepDisable(PRCM_PERIPH_UART0); PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_UART0); PRCMLoadSet(); /** * \warn this assumes that there are no other devices being used in the * serial power domain */ PRCMPowerDomainOff(PRCM_DOMAIN_SERIAL); return OT_ERROR_NONE; }
Void Timer_enableCC26xx(Int id) #endif { UInt gpt = INVALID_TIMER_ID; /* map timer ID to the appropriate driverlib ID */ switch (id) { case 0: gpt = PRCM_PERIPH_TIMER0; break; case 1: gpt = PRCM_PERIPH_TIMER1; break; case 2: gpt = PRCM_PERIPH_TIMER2; break; case 3: gpt = PRCM_PERIPH_TIMER3; break; default: break; } /* if a valid GPT timer ID, enable the GPT ... */ if (gpt != INVALID_TIMER_ID) { /* if it is not already on, turn on the PERIPH domain */ if (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON) { PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH); while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON) {}; } /* now enable the GPT clocks */ PRCMPeripheralRunEnable(gpt); PRCMPeripheralSleepEnable(gpt); PRCMPeripheralDeepSleepEnable(gpt); PRCMLoadSet(); while(!PRCMLoadGet()){}; } }
/** * Function documented in platform/uart.h */ otError otPlatUartEnable(void) { PRCMPowerDomainOn(PRCM_DOMAIN_SERIAL); while (PRCMPowerDomainStatus(PRCM_DOMAIN_SERIAL) != PRCM_DOMAIN_POWER_ON); PRCMPeripheralRunEnable(PRCM_PERIPH_UART0); PRCMPeripheralSleepEnable(PRCM_PERIPH_UART0); PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_UART0); PRCMLoadSet(); while (!PRCMLoadGet()); IOCPinTypeUart(UART0_BASE, IOID_2, IOID_3, IOID_UNUSED, IOID_UNUSED); UARTConfigSetExpClk(UART0_BASE, SysCtrlClockGet(), 115200, UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE); UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT); UARTIntRegister(UART0_BASE, UART0_intHandler); UARTEnable(UART0_BASE); return OT_ERROR_NONE; }
/* * ======== Power_sleep ======== */ Power_Status Power_sleep(Power_SleepState sleepState, UArg arg0, UArg arg1) { Power_Status status = Power_SOK; UInt xosc_hf_active = FALSE; Power_Event postEventLate; UInt32 poweredDomains = 0; Bool exitNow = FALSE; Power_Event preEvent; Power_Event postEvent; UInt32 constraints; Bool retainCache = FALSE; UInt32 modeVIMS; UInt taskKey; UInt swiKey; UInt hwiKey; /* first validate the sleep code */ if ( sleepState != Power_STANDBY) { status = Power_EFAIL; } if (status == Power_SOK) { /* make sure Power is not still busy with a previous transition */ hwiKey = Hwi_disable(); if (Power_module->state == Power_ACTIVE) { /* set transition state to entering sleep */ Power_module->state = Power_ENTERING_SLEEP; } else { exitNow = TRUE; } Hwi_restore(hwiKey); if (exitNow == TRUE) { status = Power_EBUSY; } else { /* setup sleep vars */ if (sleepState == Power_STANDBY) { preEvent = Power_ENTERING_STANDBY; postEvent = Power_AWAKE_STANDBY; postEventLate = Power_AWAKE_STANDBY_LATE; } /* disable Task scheduling; allow Swis and Hwis for notifications */ taskKey = Task_disable(); /* signal all clients registered for pre-sleep notification */ status = Power_notify(preEvent); /* check for any error */ if (status != Power_SOK) { Power_module->state = Power_ACTIVE; Task_restore(taskKey); /* re-enable scheduler */ return (status); } /* now disable Swi scheduling */ swiKey = Swi_disable(); /* freeze the IOs on the boundary between MCU and AON */ AONIOCFreezeEnable(); /* if XOSC_HF is active, force it off */ if(OSCClockSourceGet(OSC_SRC_CLK_HF) == OSC_XOSC_HF) { xosc_hf_active = TRUE; ti_sysbios_family_arm_cc26xx_Power_XOSC_HF(DISABLE); } /* allow AUX to power down */ AONWUCAuxWakeupEvent(AONWUC_AUX_ALLOW_SLEEP); /* make sure writes take effect */ SysCtrlAonSync(); /* invoke specific sequences to activate sleep states... */ if (sleepState == Power_STANDBY) { /* query and save domain states before powering them off */ if (Power_getDependencyCount(DOMAIN_RFCORE)) { poweredDomains |= PRCM_DOMAIN_RFCORE; } if (Power_getDependencyCount(DOMAIN_SERIAL)){ poweredDomains |= PRCM_DOMAIN_SERIAL; } if (Power_getDependencyCount(DOMAIN_PERIPH)) { poweredDomains |= PRCM_DOMAIN_PERIPH; } /* gate running deep sleep clocks for Crypto and DMA */ if (Power_getDependencyCount(PERIPH_CRYPTO)) { PRCMPeripheralDeepSleepDisable( ti_sysbios_family_arm_cc26xx_Power_db[ PERIPH_CRYPTO].driverlibID); } if (Power_getDependencyCount(PERIPH_UDMA)) { PRCMPeripheralDeepSleepDisable( ti_sysbios_family_arm_cc26xx_Power_db[ PERIPH_UDMA].driverlibID); } /* make sure clock settings take effect */ PRCMLoadSet(); /* request power off of domains in the MCU voltage domain */ PRCMPowerDomainOff(poweredDomains | PRCM_DOMAIN_CPU); /* request uLDO during standby */ PRCMMcuUldoConfigure(true); /* query constraints to determine if cache should be retained */ constraints = Power_getConstraintInfo(); if ((constraints & Power_SB_VIMS_CACHE_RETAIN) != 0) { retainCache = TRUE; } /* if don't want retention in standby, disable it now ... */ if (retainCache == FALSE) { modeVIMS = VIMSModeGet(VIMS_BASE); /* wait if invalidate in progress... */ while (modeVIMS == VIMS_MODE_CHANGING) { modeVIMS = VIMSModeGet(VIMS_BASE); } PRCMCacheRetentionDisable(); VIMSModeSet(VIMS_BASE, VIMS_MODE_OFF); } /* setup recharge parameters */ SysCtrlSetRechargeBeforePowerDown(XoscInHighPowerMode); /* make sure all writes have taken effect */ SysCtrlAonSync(); /* invoke deep sleep to go to STANDBY */ PRCMDeepSleep(); /* if didn't retain cache in standby, re-enable retention now */ if (retainCache == FALSE) { VIMSModeSet(VIMS_BASE, modeVIMS); PRCMCacheRetentionEnable(); } /* force power on of AUX to keep it on when system is not * sleeping; this also counts as a write to the AON interface * ensuring that a following sync of the AON interface will * force an update of all registers */ AONWUCAuxWakeupEvent(AONWUC_AUX_WAKEUP); while(!(AONWUCPowerStatusGet() & AONWUC_AUX_POWER_ON)) {}; /* if XOSC_HF was forced off above, initiate switch back */ if (xosc_hf_active == TRUE) { ti_sysbios_family_arm_cc26xx_Power_XOSC_HF(ENABLE); } /* restore power domain states in effect before standby */ PRCMPowerDomainOn(poweredDomains); while (PRCMPowerDomainStatus(poweredDomains) != PRCM_DOMAIN_POWER_ON){}; /* restore deep sleep clocks of Crypto and DMA */ if (Power_getDependencyCount(PERIPH_CRYPTO)) { PRCMPeripheralDeepSleepEnable( ti_sysbios_family_arm_cc26xx_Power_db[ PERIPH_CRYPTO].driverlibID); } if (Power_getDependencyCount(PERIPH_UDMA)) { PRCMPeripheralDeepSleepEnable( ti_sysbios_family_arm_cc26xx_Power_db[ PERIPH_UDMA].driverlibID); } /* make sure clock settings take effect */ PRCMLoadSet(); } /* release request for uLDO */ PRCMMcuUldoConfigure(false); /* set transition state to EXITING_SLEEP */ Power_module->state = Power_EXITING_SLEEP; /* * signal clients registered for early post-sleep notification; * this should be used to initialize any timing critical or IO * dependent hardware */ status = Power_notify(postEvent); /* disable IO freeze and ensure RTC shadow value is updated */ AONIOCFreezeDisable(); SysCtrlAonSync(); /* re-enable interrupts */ CPUcpsie(); /* signal all clients registered for late post-sleep notification */ status = Power_notify(postEventLate); /* now clear the transition state before re-enabling scheduler */ Power_module->state = Power_ACTIVE; /* re-enable Swi scheduling */ Swi_restore(swiKey); /* adjust recharge parameters */ SysCtrlAdjustRechargeAfterPowerDown(); /* re-enable Task scheduling */ Task_restore(taskKey); /* check for any notification error */ if (status != Power_SOK) { return (status); } } } return (status); }
/* * ======== Power_shutdown ======== */ Power_Status Power_shutdown(UArg arg) { Power_Status status = Power_EFAIL; Bool exitNow = FALSE; UInt32 constraints; UInt hwiKey; /* make sure shutdown request doesn't violate a constraint */ constraints = Power_getConstraintInfo(); if ((constraints & (Power_SD_DISALLOW)) != 0) { status = Power_ECHANGE_NOT_ALLOWED; } if (status == Power_EFAIL) { /* make sure Power is not still busy with a previous transition */ hwiKey = Hwi_disable(); if (Power_module->state == Power_ACTIVE) { /* set new transition state to entering shutdown */ Power_module->state = Power_SHUTDOWN; } else { exitNow = TRUE; } Hwi_restore(hwiKey); if (exitNow == TRUE) { status = Power_EBUSY; } else { /* disable interrupts as start the shutdown sequence */ Hwi_disable(); /* signal all clients registered for pre-shutdown notification */ status = Power_notify(Power_ENTERING_SHUTDOWN); /* check for any error */ if (status != Power_SOK) { Power_module->state = Power_ACTIVE; CPUcpsie(); return (status); } /* proceed with shutdown sequence ... */ /* switch to RCOSC_HF and RCOSC_LF */ OSCInterfaceEnable(); if(OSCClockSourceGet(OSC_SRC_CLK_HF) != OSC_RCOSC_HF) { OSCClockSourceSet(OSC_SRC_CLK_HF | OSC_SRC_CLK_MF, OSC_RCOSC_HF); while(!OSCHfSourceReady()); OSCHfSourceSwitch(); } OSCClockSourceSet(OSC_SRC_CLK_LF,OSC_RCOSC_LF); while(OSCClockSourceGet(OSC_SRC_CLK_LF) != OSC_RCOSC_LF); OSCInterfaceDisable(); /* make sure DMA and CRYTO clocks are off in deep-sleep */ PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_CRYPTO); PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_UDMA); PRCMLoadSet(); while(!PRCMLoadGet()){}; /* power OFF AUX and disconnect from bus */ AUXWUCPowerCtrl(AUX_WUC_POWER_OFF); /* remove AUX force ON */ HWREG(AON_WUC_BASE + AON_WUC_O_AUXCTL) &= ~AON_WUC_AUXCTL_AUX_FORCE_ON; /* * reset AON event source IDs to avoid pending events powering * on MCU/AUX */ HWREG(AON_EVENT_BASE + AON_EVENT_O_MCUWUSEL) = 0x3F3F3F3F; HWREG(AON_EVENT_BASE + AON_EVENT_O_AUXWUSEL) = 0x003F3F3F; /* sync AON */ HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); /* * enable shutdown - this latches the IOs, so configuration of * IOCFGx registers must be done prior to this */ AONWUCShutDownEnable(); /* sync AON */ HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); /* wait until AUX powered off */ while (AONWUCPowerStatusGet() & AONWUC_AUX_POWER_ON); /* request to power off MCU when go to deep sleep */ PRCMMcuPowerOff(); /* turn off power domains inside MCU VD (BUS, FL_BUS, RFC, CPU) */ PRCMPowerDomainOff(PRCM_DOMAIN_RFCORE | PRCM_DOMAIN_SERIAL | PRCM_DOMAIN_PERIPH | PRCM_DOMAIN_CPU | PRCM_DOMAIN_VIMS); /* deep sleep to activate shutdown */ PRCMDeepSleep(); } } Power_module->state = Power_ACTIVE; /* if get here failed to shutdown, return failure code */ return (Power_EFAIL); }
/* * ======== Power_setDependency ======== * Declare a dependency upon a resource. */ Bool Power_setDependency(Power_Resource resourceID) { UInt8 parent; UInt8 count; UInt32 id; UInt key; /* disable interrupts */ key = Hwi_disable(); /* read and increment reference count */ count = ti_sysbios_family_arm_cc26xx_Power_refCount[resourceID]++; /* if resource was NOT activated previously ... */ if (count == 0) { /* propagate set up the dependency tree ... */ /* check for a first parent */ parent = ti_sysbios_family_arm_cc26xx_Power_db[resourceID].flags & PARENTMASK; /* if first parent, make recursive call to set that dependency */ if (parent != NOPARENT) { Power_setDependency(parent); } /* check for a second parent */ parent = ti_sysbios_family_arm_cc26xx_Power_db[resourceID].flags2 & PARENTMASK; /* if second parent, make recursive call to set that dependency */ if (parent != NOPARENT) { Power_setDependency(parent); } /* now activate this resource ... */ id = ti_sysbios_family_arm_cc26xx_Power_db[resourceID].driverlibID; /* is resource a peripheral?... */ if (ti_sysbios_family_arm_cc26xx_Power_db[resourceID].flags & PERIPH) { PRCMPeripheralRunEnable(id); PRCMPeripheralSleepEnable(id); PRCMPeripheralDeepSleepEnable(id); PRCMLoadSet(); while(!PRCMLoadGet()){}; } /* else, does resource require a special handler?... */ else if (ti_sysbios_family_arm_cc26xx_Power_db[resourceID].flags & SPECIAL) { /* call the special handler */ ti_sysbios_family_arm_cc26xx_Power_resourceHandlers[id](ENABLE); } /* else resource is a power domain */ else { PRCMPowerDomainOn(id); while (PRCMPowerDomainStatus(id) != PRCM_DOMAIN_POWER_ON) {}; } } /* re-enable interrupts */ Hwi_restore(key); /* return the resource's activation status */ return (ti_sysbios_family_arm_cc26xx_Power_isDependencyActive(resourceID)); }
/* * ======== Power_releaseDependency ======== * Release a previously declared dependency. */ Void Power_releaseDependency(Power_Resource resourceID) { UInt8 parent; UInt8 count; UInt32 id; UInt key; /* disable interrupts */ key = Hwi_disable(); /* read and decrement the reference count */ count = ti_sysbios_family_arm_cc26xx_Power_refCount[resourceID]; Assert_isTrue(count != 0, Power_A_tooManyCallsReleaseDependency); ti_sysbios_family_arm_cc26xx_Power_refCount[resourceID] = count - 1; /* if this was the last dependency being released.., */ if (count == 1) { /* deactivate this resource ... */ id = ti_sysbios_family_arm_cc26xx_Power_db[resourceID].driverlibID; /* is resource a peripheral?... */ if (ti_sysbios_family_arm_cc26xx_Power_db[resourceID].flags & PERIPH) { PRCMPeripheralRunDisable(id); PRCMPeripheralSleepDisable(id); PRCMPeripheralDeepSleepDisable(id); PRCMLoadSet(); while(!PRCMLoadGet()){}; } /* else, does resource require a special handler?... */ else if (ti_sysbios_family_arm_cc26xx_Power_db[resourceID].flags & SPECIAL) { /* call the special handler */ ti_sysbios_family_arm_cc26xx_Power_resourceHandlers[id](DISABLE); } /* else resource is a power domain */ else { PRCMPowerDomainOff(id); while (PRCMPowerDomainStatus(id) != PRCM_DOMAIN_POWER_OFF) {}; } /* propagate release up the dependency tree ... */ /* check for a first parent */ parent = ti_sysbios_family_arm_cc26xx_Power_db[resourceID].flags & PARENTMASK; /* if 1st parent, make recursive call to release that dependency */ if (parent != NOPARENT) { Power_releaseDependency(parent); } /* check for a second parent */ parent = ti_sysbios_family_arm_cc26xx_Power_db[resourceID].flags2 & PARENTMASK; /* if 2nd parent, make recursive call to release that dependency */ if (parent != NOPARENT) { Power_releaseDependency(parent); } } /* re-enable interrupts */ Hwi_restore(key); }