IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgePMRGetUID(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_UINT64 *pui32UID)
{
PVRSRV_ERROR eError;
PMR * psPMRInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
psPMRInt = (PMR *) hPMR;
eError =
PMRGetUID(
psPMRInt,
pui32UID);
return eError;
}
static PVRSRV_ERROR UnmapDeviceMemoryCallBack(IMG_PVOID pvParam,
IMG_UINT32 ui32Param)
{
PVRSRV_ERROR eError;
RESMAN_MAP_DEVICE_MEM_DATA *psMapData = pvParam;
PVR_UNREFERENCED_PARAMETER(ui32Param);
if(psMapData->psMemInfo->sMemBlk.psIntSysPAddr)
{
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(IMG_SYS_PHYADDR), psMapData->psMemInfo->sMemBlk.psIntSysPAddr, IMG_NULL);
psMapData->psMemInfo->sMemBlk.psIntSysPAddr = IMG_NULL;
}
if( psMapData->psMemInfo->psKernelSyncInfo )
{
psMapData->psMemInfo->psKernelSyncInfo->ui32RefCount--;
if (psMapData->psMemInfo->psKernelSyncInfo->ui32RefCount == 0)
{
eError = PVRSRVFreeSyncInfoKM(psMapData->psMemInfo->psKernelSyncInfo);
if(eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"UnmapDeviceMemoryCallBack: Failed to free sync info"));
return eError;
}
}
}
eError = FreeDeviceMem(psMapData->psMemInfo);
if(eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"UnmapDeviceMemoryCallBack: Failed to free DST meminfo"));
return eError;
}
eError = FreeMemCallBackCommon(psMapData->psSrcMemInfo, 0, IMG_FALSE);
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(RESMAN_MAP_DEVICE_MEM_DATA), psMapData, IMG_NULL);
return eError;
}
static IMG_VOID SysDisableInterrupts(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
IMG_UINT32 ui32RegData;
IMG_UINT32 ui32Mask;
ui32Mask = POULSBO_THALIA_MASK;
ui32RegData = OSReadHWReg(gsPoulsboRegsCPUVaddr, POULSBO_INTERRUPT_ENABLE_REG);
OSWriteHWReg(gsPoulsboRegsCPUVaddr, POULSBO_INTERRUPT_ENABLE_REG, ui32RegData & (~ui32Mask));
ui32RegData = OSReadHWReg(gsPoulsboRegsCPUVaddr, POULSBO_INTERRUPT_MASK_REG);
OSWriteHWReg(gsPoulsboRegsCPUVaddr, POULSBO_INTERRUPT_MASK_REG, ui32RegData | ui32Mask);
PVR_TRACE(("SysDisableInterrupts: Interrupts disabled"));
#endif
PVR_UNREFERENCED_PARAMETER(psSysData);
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeHeapCfgHeapConfigCount(IMG_HANDLE hBridge,
IMG_HANDLE hDeviceNode,
IMG_UINT32 *pui32NumHeapConfigs)
{
PVRSRV_ERROR eError;
IMG_HANDLE hDeviceNodeInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
hDeviceNodeInt = (IMG_HANDLE) hDeviceNode;
eError =
HeapCfgHeapConfigCount(
hDeviceNodeInt,
pui32NumHeapConfigs);
return eError;
}
IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) == 0)
{
return;
}
PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
SysDisableSGXInterrupts(psSysData);
#if defined(MTK_USE_GDC)
SysDeInitGDC();
#endif
DRV_WriteReg32(MMSYS2_CONFG_BASE+0x400, DRV_Reg32(MMSYS2_CONFG_BASE+0x400)&~4);
disable_clock(MT65XX_PDN_MM_MFG_HALF, "MFG");
disable_clock(MT65XX_PDN_MM_MFG, "MFG");
disable_clock(MT65XX_PDN_MM_G3D, "MFG");
//DRV_WriteReg32(MMSYS2_CONFG_BASE+0x400, DRV_Reg32(MMSYS2_CONFG_BASE+0x400)&~4);
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI) && defined(CONFIG_PM_RUNTIME)
{
int res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
if (res < 0)
{
PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
}
}
#endif
atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
#else
PVR_UNREFERENCED_PARAMETER(psSysData);
#endif
}
IMG_EXPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVDissociateDeviceMemKM(IMG_HANDLE hDevCookie,
PVRSRV_KERNEL_MEM_INFO *psMemInfo)
{
PVRSRV_ERROR eError;
PVRSRV_DEVICE_NODE *psDeviceNode = hDevCookie;
PVR_UNREFERENCED_PARAMETER(hDevCookie);
if (!psMemInfo)
{
return PVRSRV_ERROR_INVALID_PARAMS;
}
eError = ResManDissociateRes(psMemInfo->sMemBlk.hResItem, psDeviceNode->hResManContext);
PVR_ASSERT(eError == PVRSRV_OK);
return eError;
}
static IMG_UINT32 DBGDIOCDrivSetFrame(IMG_VOID * pvInBuffer, IMG_VOID * pvOutBuffer)
{
PDBG_IN_SETFRAME psParams;
PDBG_STREAM psStream;
psParams = (PDBG_IN_SETFRAME) pvInBuffer;
PVR_UNREFERENCED_PARAMETER(pvOutBuffer);
psStream = SID2PStream(psParams->hStream);
if (psStream != (PDBG_STREAM)IMG_NULL)
{
ExtDBGDrivSetFrame(psStream,psParams->ui32Frame);
return(IMG_TRUE);
}
else
{
return(IMG_FALSE);
}
}
/*****************************************************************************
FUNCTION : DBGDrivOverrideMode
PURPOSE :
PARAMETERS :
RETURNS :
*****************************************************************************/
static IMG_UINT32 DBGDIOCDrivOverrideMode(IMG_VOID * pvInBuffer, IMG_VOID * pvOutBuffer)
{
PDBG_IN_OVERRIDEMODE psParams;
PDBG_STREAM psStream;
psParams = (PDBG_IN_OVERRIDEMODE) pvInBuffer;
PVR_UNREFERENCED_PARAMETER( pvOutBuffer);
psStream = SID2PStream(psParams->hStream);
if (psStream != (PDBG_STREAM)IMG_NULL)
{
ExtDBGDrivOverrideMode(psStream,psParams->ui32Mode);
return(IMG_TRUE);
}
else
{
/* invalid SID */
return(IMG_FALSE);
}
}
/*****************************************************************************
FUNCTION : DBGDIOCDrivSetMarker
PURPOSE : Sets the marker in the stream to split output files
PARAMETERS : pvInBuffer, pvOutBuffer
RETURNS : success
*****************************************************************************/
static IMG_UINT32 DBGDIOCDrivSetMarker(IMG_VOID * pvInBuffer, IMG_VOID * pvOutBuffer)
{
PDBG_IN_SETMARKER psParams;
PDBG_STREAM psStream;
psParams = (PDBG_IN_SETMARKER) pvInBuffer;
PVR_UNREFERENCED_PARAMETER(pvOutBuffer);
psStream = SID2PStream(psParams->hStream);
if (psStream != (PDBG_STREAM)IMG_NULL)
{
ExtDBGDrivSetMarker(psStream, psParams->ui32Marker);
return(IMG_TRUE);
}
else
{
/* invalid SID */
return(IMG_FALSE);
}
}
int
SYSPVRPreSuspend(struct drm_device *dev)
{
if (PVRSRVSetPowerStateKM(PVRSRV_SYS_POWER_STATE_D3) != PVRSRV_OK)
{
return -EBUSY;
}
#if defined(DISPLAY_CONTROLLER)
if (PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Suspend)(dev) != 0)
{
(void)PVRSRVSetPowerStateKM(PVRSRV_SYS_POWER_STATE_D0);
return -EBUSY;
}
#else
PVR_UNREFERENCED_PARAMETER(dev);
#endif
return 0;
}
void RegisterKeyPressed(u32 dwui32ScanCode, struct HOTKEYINFO *pInfo)
{
struct DBG_STREAM *psStream;
PVR_UNREFERENCED_PARAMETER(pInfo);
if (dwui32ScanCode == g_PrivateHotKeyData.ui32ScanCode) {
PVR_DPF(PVR_DBG_MESSAGE, "PDUMP Hotkey pressed !\n");
psStream = (struct DBG_STREAM *)
g_PrivateHotKeyData.sHotKeyInfo.pvStream;
if (!g_bHotKeyPressed) {
g_ui32HotKeyFrame = psStream->ui32Current + 2;
g_bHotKeyPressed = IMG_TRUE;
}
}
}
PVRSRV_ERROR
TLServerReleaseDataKM(PTL_STREAM_DESC psSD,
IMG_UINT32 uiReadOffset,
IMG_UINT32 uiReadLen)
{
TL_GLOBAL_DATA* psGD = TLGGD();
PTL_SNODE psNode = 0;
PVR_DPF_ENTERED;
/* Unreferenced in release builds */
PVR_UNREFERENCED_PARAMETER(uiReadOffset);
PVR_ASSERT(psSD);
// Sanity check, quick exit if there are no streams
if (psGD->psHead == NULL)
{
PVR_DPF_RETURN_RC(PVRSRV_ERROR_STREAM_ERROR);
}
// Check stream still valid
psNode = TLFindStreamNodeByDesc(psSD);
if ((psNode == NULL) || (psNode != psSD->psNode))
{
PVR_DPF_RETURN_RC(PVRSRV_ERROR_HANDLE_NOT_FOUND);
}
// Does stream still exist?
if (psNode->psStream == NULL)
{
PVR_DPF_RETURN_RC(PVRSRV_ERROR_RESOURCE_UNAVAILABLE);
}
PVR_DPF((PVR_DBG_VERBOSE, "TLReleaseDataKM uiReadOffset=%d, uiReadLen=%d", uiReadOffset, uiReadLen));
// Move read position on to free up space in stream buffer
TLStreamAdvanceReadPos(psNode->psStream, uiReadLen);
PVR_DPF_RETURN_OK;
}
PVRSRV_ERROR SysCreateConfigData(PVRSRV_SYSTEM_CONFIG **ppsSysConfig, void *hDevice)
{
PLAT_DATA *psPlatData;
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(hDevice);
psPlatData = OSAllocZMem(sizeof(*psPlatData));
/* Query the Emu for reg and IRQ information */
eError = PCIInitDev(psPlatData);
if (eError != PVRSRV_OK)
{
goto e0;
}
/* Save data for this device */
sSysConfig.pasDevices[0].hSysData = (IMG_HANDLE) psPlatData;
/* Save private data for the physical memory heap */
gsPhysHeapConfig[0].hPrivData = (IMG_HANDLE) psPlatData;
#if defined(TDMETACODE)
#error "Not supported services/3rdparty/intel_drm/sysconfig.c"
gsPhysHeapConfig[1].hPrivData = IMG_NULL;
#endif
*ppsSysConfig = &sSysConfig;
gpsPlatData = psPlatData;
/* Setup other system specific stuff */
#if defined(SUPPORT_ION)
IonInit(NULL);
#endif
return PVRSRV_OK;
e0:
return eError;
}
static PVRSRV_ERROR CloseBCDeviceCallBack(IMG_PVOID pvParam,
IMG_UINT32 ui32Param)
{
PVRSRV_BUFFERCLASS_PERCONTEXT_INFO *psBCPerContextInfo;
PVRSRV_BUFFERCLASS_INFO *psBCInfo;
PVR_UNREFERENCED_PARAMETER(ui32Param);
psBCPerContextInfo = (PVRSRV_BUFFERCLASS_PERCONTEXT_INFO *)pvParam;
psBCInfo = psBCPerContextInfo->psBCInfo;
psBCInfo->ui32RefCount--;
if(psBCInfo->ui32RefCount == 0)
{
IMG_UINT32 i;
psBCInfo->psFuncTable->pfnCloseBCDevice(psBCInfo->hExtDevice);
for(i=0; i<psBCInfo->ui32BufferCount; i++)
{
if(psBCInfo->psBuffer[i].sDeviceClassBuffer.psKernelSyncInfo)
{
PVRSRVFreeSyncInfoKM(psBCInfo->psBuffer[i].sDeviceClassBuffer.psKernelSyncInfo);
}
}
if(psBCInfo->psBuffer)
{
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(PVRSRV_BC_BUFFER), psBCInfo->psBuffer, IMG_NULL);
psBCInfo->psBuffer = IMG_NULL;
}
}
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(PVRSRV_BUFFERCLASS_PERCONTEXT_INFO), psBCPerContextInfo, IMG_NULL);
return PVRSRV_OK;
}
PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0)
{
return PVRSRV_OK;
}
PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
{
int res;
if (sgx_idle_mode == 0)
RequestSGXFreq(psSysData, IMG_TRUE);
res = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
if (res < 0)
{
PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: pm_runtime_get_sync failed (%d)", -res));
return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
}
}
#endif
SysEnableSGXInterrupts(psSysData);
atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
#else
PVR_UNREFERENCED_PARAMETER(psSysData);
#endif
sgx_idle_log_on();
return PVRSRV_OK;
}
static IMG_VOID SGXResetSleep(PVRSRV_SGXDEV_INFO *psDevInfo,
IMG_UINT32 ui32PDUMPFlags,
IMG_BOOL bPDump)
{
#if !defined(PDUMP)
PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
#endif
OSWaitus(1000 * 1000000 / psDevInfo->ui32CoreClockSpeed);
if (bPDump)
{
PDUMPIDLWITHFLAGS(30, ui32PDUMPFlags);
#if defined(PDUMP)
PDumpRegRead(EUR_CR_SOFT_RESET, ui32PDUMPFlags);
#endif
}
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeServerSyncAlloc(IMG_HANDLE hBridge,
IMG_HANDLE hDevNode,
IMG_HANDLE *phSyncHandle,
IMG_UINT32 *pui32SyncPrimVAddr)
{
PVRSRV_ERROR eError;
IMG_HANDLE hDevNodeInt;
SERVER_SYNC_PRIMITIVE * psSyncHandleInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
hDevNodeInt = (IMG_HANDLE) hDevNode;
eError =
PVRSRVServerSyncAllocKM(
hDevNodeInt,
&psSyncHandleInt,
pui32SyncPrimVAddr);
*phSyncHandle = psSyncHandleInt;
return eError;
}
PVRSRV_ERROR
PVRSRVSyncRecordAddKM(
SYNC_RECORD_HANDLE * phRecord,
SYNC_PRIMITIVE_BLOCK * hServerSyncPrimBlock,
IMG_UINT32 ui32FwBlockAddr,
IMG_UINT32 ui32SyncOffset,
IMG_BOOL bServerSync,
IMG_UINT32 ui32ClassNameSize,
const IMG_CHAR *pszClassName)
{
PVR_UNREFERENCED_PARAMETER(phRecord);
PVR_UNREFERENCED_PARAMETER(hServerSyncPrimBlock);
PVR_UNREFERENCED_PARAMETER(ui32FwBlockAddr);
PVR_UNREFERENCED_PARAMETER(ui32SyncOffset);
PVR_UNREFERENCED_PARAMETER(bServerSync);
PVR_UNREFERENCED_PARAMETER(ui32ClassNameSize);
PVR_UNREFERENCED_PARAMETER(pszClassName);
return PVRSRV_OK;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeHeapCfgHeapConfigName(IMG_HANDLE hBridge,
IMG_HANDLE hDeviceNode,
IMG_UINT32 ui32HeapConfigIndex,
IMG_UINT32 ui32HeapConfigNameBufSz,
IMG_CHAR *puiHeapConfigName)
{
PVRSRV_ERROR eError;
IMG_HANDLE hDeviceNodeInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
hDeviceNodeInt = (IMG_HANDLE) hDeviceNode;
eError =
HeapCfgHeapConfigName(
hDeviceNodeInt,
ui32HeapConfigIndex,
ui32HeapConfigNameBufSz,
puiHeapConfigName);
return eError;
}
static PVRSRV_ERROR
FreeSharedSysMemCallBack(IMG_PVOID pvParam,
IMG_UINT32 ui32Param)
{
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo = pvParam;
PVR_UNREFERENCED_PARAMETER(ui32Param);
OSFreePages(psKernelMemInfo->ui32Flags,
psKernelMemInfo->ui32AllocSize,
psKernelMemInfo->pvLinAddrKM,
psKernelMemInfo->sMemBlk.hOSMemHandle);
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
sizeof(PVRSRV_KERNEL_MEM_INFO),
psKernelMemInfo,
IMG_NULL);
return PVRSRV_OK;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeServerSyncQueueHWOp(IMG_HANDLE hBridge,
IMG_HANDLE hSyncHandle,
IMG_BOOL bbUpdate,
IMG_UINT32 *pui32FenceValue,
IMG_UINT32 *pui32UpdateValue)
{
PVRSRV_ERROR eError;
SERVER_SYNC_PRIMITIVE * psSyncHandleInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
psSyncHandleInt = (SERVER_SYNC_PRIMITIVE *) hSyncHandle;
eError =
PVRSRVServerSyncQueueHWOpKM(
psSyncHandleInt,
bbUpdate,
pui32FenceValue,
pui32UpdateValue);
return eError;
}
IMG_VOID RGXMMUCacheInvalidate(PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_HANDLE hDeviceData,
MMU_LEVEL eMMULevel,
IMG_BOOL bUnmap)
{
PVR_UNREFERENCED_PARAMETER(bUnmap);
switch (eMMULevel)
{
case MMU_LEVEL_3: ui32CacheOpps |= RGXFWIF_MMUCACHEDATA_FLAGS_PC;
break;
case MMU_LEVEL_2: ui32CacheOpps |= RGXFWIF_MMUCACHEDATA_FLAGS_PD;
break;
case MMU_LEVEL_1: ui32CacheOpps |= RGXFWIF_MMUCACHEDATA_FLAGS_PT;
ui32CacheOpps |= RGXFWIF_MMUCACHEDATA_FLAGS_TLB;
break;
default:
PVR_ASSERT(0);
break;
}
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevmemSLCFlushInvalRequest(IMG_HANDLE hBridge,
IMG_HANDLE hDeviceNode,
IMG_HANDLE hPmr)
{
PVRSRV_ERROR eError;
IMG_HANDLE hDeviceNodeInt;
PMR * psPmrInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
hDeviceNodeInt = (IMG_HANDLE) hDeviceNode;
psPmrInt = (PMR *) hPmr;
eError =
DevmemSLCFlushInvalRequest(
hDeviceNodeInt,
psPmrInt);
return eError;
}
/*!
******************************************************************************
@Function SysCpuPAddrToDevPAddr
@Description Compute a device physical address from a cpu physical
address.
@Input cpu_paddr - cpu physical address.
@Input eDeviceType - device type required if DevPAddr
address spaces vary across devices in the same
system
@Return device physical address.
******************************************************************************/
IMG_DEV_PHYADDR SysCpuPAddrToDevPAddr (PVRSRV_DEVICE_TYPE eDeviceType,
IMG_CPU_PHYADDR CpuPAddr)
{
/*
It is assumed the translation from cpu/system to device
physical addresses is constant for every 'services managed'
device in a given system
*/
IMG_DEV_PHYADDR DevPAddr;
PVR_UNREFERENCED_PARAMETER(eDeviceType);
/*
just dip into the SGX info here
(it's really adapter memory shared across all devices in
the adapter)
*/
DevPAddr.uiAddr = CpuPAddr.uiAddr - gsSGXDeviceMap.sLocalMemCpuPBase.uiAddr;
return DevPAddr;
}
static PVRSRV_ERROR FreeHandleDataWrapper(IMG_HANDLE hHandle, IMG_VOID *pvData)
{
PVRSRV_HANDLE_BASE *psBase = (PVRSRV_HANDLE_BASE *)pvData;
HANDLE_DATA *psHandleData = IMG_NULL;
PVRSRV_ERROR eError;
if (psBase == IMG_NULL)
{
PVR_DPF((PVR_DBG_ERROR, "FreeHandleDataWrapper: Handle base missing"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
eError = GetHandleData(psBase,
&psHandleData,
hHandle,
PVRSRV_HANDLE_TYPE_NONE);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "FreeHandleDataWrapper: Couldn't get handle data for handle"));
return eError;
}
if (!TEST_ALLOC_FLAG(psHandleData, PVRSRV_HANDLE_ALLOC_FLAG_MULTI))
{
HAND_KEY aKey;
IMG_HANDLE hRemovedHandle;
InitKey(aKey, psBase, psHandleData->pvData, psHandleData->eType, ParentIfPrivate(psHandleData));
hRemovedHandle = (IMG_HANDLE)HASH_Remove_Extended(psBase->psHashTab, aKey);
PVR_ASSERT(hRemovedHandle != IMG_NULL);
PVR_ASSERT(hRemovedHandle == psHandleData->hHandle);
PVR_UNREFERENCED_PARAMETER(hRemovedHandle);
}
OSFreeMem(psHandleData);
return PVRSRV_OK;
}
/*!
*******************************************************************************
@Function SGXResetInitBIFContexts
@Description
Initialise the BIF memory contexts
@Input psDevInfo - SGX Device Info
@Return IMG_VOID
******************************************************************************/
static IMG_VOID SGXResetInitBIFContexts(PVRSRV_SGXDEV_INFO *psDevInfo,
IMG_UINT32 ui32PDUMPFlags)
{
IMG_UINT32 ui32RegVal;
#if !defined(PDUMP)
PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
#endif /* PDUMP */
ui32RegVal = 0;
OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Initialise the BIF bank settings\r\n");
OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK_SET, ui32RegVal);
PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_BANK_SET, ui32RegVal, ui32PDUMPFlags);
OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32RegVal);
PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_BANK0, ui32RegVal, ui32PDUMPFlags);
#endif /* SGX_FEATURE_MULTIPLE_MEM_CONTEXTS */
PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Initialise the BIF directory list\r\n");
OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal);
PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal, ui32PDUMPFlags);
#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
{
IMG_UINT32 ui32DirList, ui32DirListReg;
for (ui32DirList = 1;
ui32DirList < SGX_FEATURE_BIF_NUM_DIRLISTS;
ui32DirList++)
{
ui32DirListReg = EUR_CR_BIF_DIR_LIST_BASE1 + 4 * (ui32DirList - 1);
OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32DirListReg, ui32RegVal);
PDUMPREGWITHFLAGS(SGX_PDUMPREG_NAME, ui32DirListReg, ui32RegVal, ui32PDUMPFlags);
}
}
#endif /* SGX_FEATURE_MULTIPLE_MEM_CONTEXTS */
}
IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) == 0)
{
return;
}
sgx_idle_log_off();
PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
SysDisableSGXInterrupts(psSysData);
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
{
int res;
res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
if (res < 0)
{
PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
}
if (sgx_idle_mode == 0)
RequestSGXFreq(psSysData, IMG_FALSE);
}
#endif
atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
#else
PVR_UNREFERENCED_PARAMETER(psSysData);
#endif
}
/*!
******************************************************************************
@Function DisableSGXClocks
@Description Disable SGX clocks.
@Return none
******************************************************************************/
IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
int i;
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
/* SGX clocks already disabled? */
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) == 0)
{
return;
}
PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
SysDisableSGXInterrupts(psSysData);
for(i = sizeof(clk_data)/sizeof(clk_data[0]) - 1; i >= 0; i--)
{
clk_disable_unprepare(clk_data[i].clk_handle);
}
#if defined(LDM_PLATFORM)
{
int res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
if (res < 0)
{
PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
}
}
#endif /* defined(LDM_PLATFORM)*/
/* Indicate that the SGX clocks are disabled */
atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
#else /* !defined(NO_HARDWARE) */
PVR_UNREFERENCED_PARAMETER(psSysData);
#endif /* !defined(NO_HARDWARE) */
}
static enum PVRSRV_ERROR CloseBCDeviceCallBack(void *pvParam, u32 ui32Param)
{
struct PVRSRV_BUFFERCLASS_PERCONTEXT_INFO *psBCPerContextInfo;
struct PVRSRV_BUFFERCLASS_INFO *psBCInfo;
PVR_UNREFERENCED_PARAMETER(ui32Param);
psBCPerContextInfo = (struct PVRSRV_BUFFERCLASS_PERCONTEXT_INFO *)
pvParam;
psBCInfo = psBCPerContextInfo->psBCInfo;
psBCInfo->ui32RefCount--;
if (psBCInfo->ui32RefCount == 0) {
u32 i;
psBCInfo->psFuncTable->pfnCloseBCDevice(psBCInfo->hExtDevice);
for (i = 0; i < psBCInfo->ui32BufferCount; i++) {
if (psBCInfo->psBuffer[i].sDeviceClassBuffer.
psKernelSyncInfo)
PVRSRVFreeSyncInfoKM(psBCInfo->psBuffer[i].
sDeviceClassBuffer.
psKernelSyncInfo);
}
if (psBCInfo->psBuffer)
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
sizeof(struct PVRSRV_BC_BUFFER) *
psBCInfo->ui32BufferCount, psBCInfo->psBuffer,
NULL);
}
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
sizeof(struct PVRSRV_BUFFERCLASS_PERCONTEXT_INFO),
psBCPerContextInfo, NULL);
return PVRSRV_OK;
}
static IMG_BOOL
_RequestAllocFail (IMG_VOID *_h,
IMG_SIZE_T _uSize,
IMG_SIZE_T *_pActualSize,
BM_MAPPING **_ppsMapping,
IMG_UINT32 _uFlags,
IMG_UINTPTR_T *_pBase)
{
PVR_UNREFERENCED_PARAMETER (_h);
PVR_UNREFERENCED_PARAMETER (_uSize);
PVR_UNREFERENCED_PARAMETER (_pActualSize);
PVR_UNREFERENCED_PARAMETER (_ppsMapping);
PVR_UNREFERENCED_PARAMETER (_uFlags);
PVR_UNREFERENCED_PARAMETER (_pBase);
return IMG_FALSE;
}