VOID
odm_SetRespPath_92C(
IN PADAPTER Adapter,
IN u1Byte DefaultRespPath
)
{
pPD_T pDM_PDTable = &Adapter->DM_PDTable;
RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath));
if(DefaultRespPath != pDM_PDTable->DefaultRespPath)
{
if(DefaultRespPath == 0)
{
PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15);
}
else
{
PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A);
}
}
pDM_PDTable->DefaultRespPath = DefaultRespPath;
}
u1Byte
ODM_Read1Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R8(RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
return rtw_read8(Adapter,RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
return PlatformEFIORead1Byte(Adapter, RegAddr);
#endif
}
u8
ODM_Read1Byte(
PDM_ODM_T pDM_Odm,
u32 RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R8(RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
struct rtw_adapter * Adapter = pDM_Odm->Adapter;
return rtw_read8(Adapter,RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
struct rtw_adapter * Adapter = pDM_Odm->Adapter;
return PlatformEFIORead1Byte(Adapter, RegAddr);
#endif
}
VOID
odm_DynamicTxPowerSavePowerIndex(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
u1Byte index;
u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
for(index = 0; index< 6; index++)
pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]);
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
for(index = 0; index< 6; index++)
pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]);
#endif
#endif
}
RT_STATUS
HAL_ReadTypeID(
IN HAL_PADAPTER Adapter
)
{
u1Byte value8;
u4Byte value32;
u1Byte HCI;
RT_STATUS rtResult = RT_STATUS_FAILURE;
value8 = PlatformEFIORead1Byte(Adapter, REG_SYS_CFG2);
HCI = PlatformEFIORead1Byte(Adapter, REG_SYS_STATUS1);
RT_TRACE(COMP_INIT, DBG_LOUD, ("REG_SYS_CFG2(0xFC): 0x%x \n, REG_SYS_STATUS1(0xF4): 0x%x\n", value8, HCI));
switch(value8)
{
#if IS_EXIST_RTL8881AEM
case HAL_HW_TYPE_ID_8881A:
_GET_HAL_DATA(Adapter)->HardwareType = HARDWARE_TYPE_RTL8881AEM;
rtResult = RT_STATUS_SUCCESS;
break;
#endif
#if (IS_EXIST_RTL8192EE || IS_EXIST_RTL8192EU)
case HAL_HW_TYPE_ID_8192E:
// TODO: Check register difinition & replace by Marco
if ( (HCI & 0x30) == 0x20 || (HCI & 0x30) == 0x30) {
_GET_HAL_DATA(Adapter)->HardwareType = HARDWARE_TYPE_RTL8192EE;
}
else {
_GET_HAL_DATA(Adapter)->HardwareType = HARDWARE_TYPE_RTL8192EU;
}
rtResult = RT_STATUS_SUCCESS;
break;
#endif
default:
RT_TRACE(COMP_INIT, DBG_LOUD, (" Chip TypeID Error (REG_SYS_CFG2: 0x%x) \n", value8));
break;
}
RT_TRACE(COMP_INIT, DBG_LOUD, (" HardwareType: %d \n", _GET_HAL_DATA(Adapter)->HardwareType));
//3 Check if it is test chip
value32 = PlatformEFIORead4Byte(Adapter, REG_SYS_CFG1);
if ( value32 & BIT23 ) {
_GET_HAL_DATA(Adapter)->bTestChip = _TRUE;
}
else {
_GET_HAL_DATA(Adapter)->bTestChip = _FALSE;
}
// recognize 92E b /c cut
#if IS_EXIST_RTL8192EE
if(_GET_HAL_DATA(Adapter)->bTestChip) {
if( _GET_HAL_DATA(Adapter)->HardwareType == HARDWARE_TYPE_RTL8192EE) {
if(((value32>>12)& 0xf) == 0x0)
_GET_HAL_DATA(Adapter)->cutVersion = ODM_CUT_B;
else if(((value32>>12)& 0xf) == 0x2)
_GET_HAL_DATA(Adapter)->cutVersion = ODM_CUT_C;
}
}
VOID
halTxbf8814A_DownloadNDPA(
IN PADAPTER Adapter,
IN u1Byte Idx
)
{
u1Byte u1bTmp = 0, tmpReg422 = 0;
u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0;
u2Byte Head_Page = 0x7FE;
BOOLEAN bSendBeacon = FALSE;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u2Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/
PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter);
PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
pHalData->bFwDwRsvdPageInProgress = TRUE;
Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy);
/*Set REG_CR bit 8. DMA beacon by SW.*/
u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1);
PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp | BIT0));
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2);
PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422 & (~BIT6));
if (tmpReg422 & BIT6) {
RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an Adapter is sending beacon.\n"));
bSendBeacon = TRUE;
}
/*0x204[11:0] Beacon Head for TXDMA*/
PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, Head_Page);
do {
/*Clear beacon valid check bit.*/
BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1);
PlatformEFIOWrite1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1, (BcnValidReg | BIT7));
/*download NDPA rsvd page.*/
if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)
Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE);
else
Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE);
/*check rsvd page download OK.*/
BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1);
count = 0;
while (!(BcnValidReg & BIT7) && count < 20) {
count++;
delay_us(10);
BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 2);
}
DLBcnCount++;
} while (!(BcnValidReg & BIT7) && DLBcnCount < 5);
if (!(BcnValidReg & BIT0))
RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__));
/*0x204[11:0] Beacon Head for TXDMA*/
PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy);
/*To make sure that if there exists an adapter which would like to send beacon.*/
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
/*the beacon cannot be sent by HW.*/
/*2010.06.23. Added by tynli.*/
if (bSendBeacon)
PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422);
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1);
PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp & (~BIT0)));
pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED;
pHalData->bFwDwRsvdPageInProgress = FALSE;
}
static bool rtl8192_radio_on_off_checking(struct net_device *dev)
{
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
u8 u1Tmp = 0;
u8 gpio;
if (priv->pwrdown) {
u1Tmp = read_nic_byte(dev, 0x06);
gpio = u1Tmp & BIT6;
} else
#ifdef CONFIG_BT_COEXIST
if (pHalData->bt_coexist.BluetoothCoexist) {
if (pHalData->bt_coexist.BT_CoexistType == BT_2Wire) {
PlatformEFIOWrite1Byte(pAdapter, MAC_PINMUX_CFG, 0xa);
u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IO_SEL);
delay_us(100);
u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IN);
RTPRINT(FPWR, PWRHW, ("GPIO_IN=%02x\n", u1Tmp));
retval = (u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT) ? eRfOn : eRfOff;
} else if ((pHalData->bt_coexist.BT_CoexistType == BT_ISSC_3Wire) ||
(pHalData->bt_coexist.BT_CoexistType == BT_Accel) ||
(pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4)) {
u4tmp = PHY_QueryBBReg(pAdapter, 0x87c, bMaskDWord);
if ((u4tmp & BIT17) != 0) {
PHY_SetBBReg(pAdapter, 0x87c, bMaskDWord, u4tmp & ~BIT17);
delay_us(50);
RTPRINT(FBT, BT_RFPoll, ("BT write 0x87c (~BIT17) = 0x%x\n", u4tmp &~BIT17));
}
u4tmp = PHY_QueryBBReg(pAdapter, 0x8e0, bMaskDWord);
RTPRINT(FBT, BT_RFPoll, ("BT read 0x8e0 (BIT24)= 0x%x\n", u4tmp));
retval = (u4tmp & BIT24) ? eRfOn : eRfOff;
RTPRINT(FBT, BT_RFPoll, ("BT check RF state to %s\n", (retval==eRfOn)? "ON":"OFF"));
}
} else
#endif
{
write_nic_byte(dev, MAC_PINMUX_CFG, (GPIOMUX_EN | GPIOSEL_GPIO));
u1Tmp = read_nic_byte(dev, GPIO_IO_SEL);
u1Tmp &= HAL_8192S_HW_GPIO_OFF_MASK;
write_nic_byte(dev, GPIO_IO_SEL, u1Tmp);
mdelay(10);
u1Tmp = read_nic_byte(dev, GPIO_IN);
gpio = u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT;
}
#ifdef DEBUG_RFKILL
{
static u8 gpio_test;
printk("%s: gpio = %x\n", __FUNCTION__, gpio);
if(gpio_test % 5 == 0) {
gpio = 0;
} else {
gpio = 1;
}
printk("%s: gpio_test = %d, gpio = %x\n", __FUNCTION__, gpio_test++ % 20, gpio);
}
#endif
return gpio;
}
