Ejemplo n.º 1
0
uartPort_t *serialUART3(uint32_t baudRate, portMode_t mode, portOptions_t options)
{
    uartPort_t *s;
    static volatile uint8_t rx3Buffer[UART3_RX_BUFFER_SIZE];
    static volatile uint8_t tx3Buffer[UART3_TX_BUFFER_SIZE];

    s = &uartPort3;
    s->port.vTable = uartVTable;

    s->port.baudRate = baudRate;

    s->port.rxBufferSize = UART3_RX_BUFFER_SIZE;
    s->port.txBufferSize = UART3_TX_BUFFER_SIZE;
    s->port.rxBuffer = rx3Buffer;
    s->port.txBuffer = tx3Buffer;

    s->USARTx = USART3;

#ifdef USE_UART3_RX_DMA
    s->rxDMAChannel = DMA1_Channel3;
    s->rxDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->RDR;
#endif
#ifdef USE_UART3_TX_DMA
    s->txDMAChannel = DMA1_Channel2;
    s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->TDR;
#endif

    RCC_ClockCmd(RCC_APB1(USART3), ENABLE);

#if defined(USE_UART3_TX_DMA) || defined(USE_UART3_RX_DMA)
    RCC_AHBClockCmd(RCC_AHB(DMA1), ENABLE);
#endif

    serialUARTInit(IOGetByTag(IO_TAG(UART3_TX_PIN)), IOGetByTag(IO_TAG(UART3_RX_PIN)), mode, options, GPIO_AF_7, 3);

#ifdef USE_UART3_TX_DMA
    // DMA TX Interrupt
    dmaSetHandler(DMA1_CH2_HANDLER, handleUsartTxDma, NVIC_PRIO_SERIALUART3_TXDMA, (uint32_t)&uartPort3);
#endif

#ifndef USE_UART3_RX_DMA
    NVIC_InitTypeDef NVIC_InitStructure;

    NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_PRIORITY_BASE(NVIC_PRIO_SERIALUART3_RXDMA);
    NVIC_InitStructure.NVIC_IRQChannelSubPriority = NVIC_PRIORITY_SUB(NVIC_PRIO_SERIALUART3_RXDMA);
    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
    NVIC_Init(&NVIC_InitStructure);
#endif

    return s;
}
Ejemplo n.º 2
0
#include "build/build_config.h"

#include "system.h"
#include "sensor.h"
#include "accgyro.h"
#include "adc.h"
#include "adc_impl.h"
#include "io.h"
#include "rcc.h"

#ifndef ADC_INSTANCE
#define ADC_INSTANCE   ADC1
#endif

const adcDevice_t adcHardware[] = {
    { .ADCx = ADC1, .rccADC = RCC_APB2(ADC1), .rccDMA = RCC_AHB(DMA1), .DMAy_Channelx = DMA1_Channel1 } 
};

ADCDevice adcDeviceByInstance(ADC_TypeDef *instance)
{
    if (instance == ADC1)
        return ADCDEV_1;

/* TODO -- ADC2 available on large 10x devices.
    if (instance == ADC2)
        return ADCDEV_2;
*/
    return ADCINVALID;
}

const adcTagMap_t adcTagMap[] = {
Ejemplo n.º 3
0
#include "drivers/io.h"
#include "drivers/sensor.h"
#include "drivers/time.h"

#include "adc.h"
#include "adc_impl.h"
#include "rcc.h"
#include "dma.h"

#include "common/utils.h"

#include "pg/adc.h"


const adcDevice_t adcHardware[] = {
    { .ADCx = ADC1, .rccADC = RCC_AHB(ADC12), .DMAy_Channelx = DMA1_Channel1 },
#ifdef ADC24_DMA_REMAP
    { .ADCx = ADC2, .rccADC = RCC_AHB(ADC12), .DMAy_Channelx = DMA2_Channel3 },
#else
    { .ADCx = ADC2, .rccADC = RCC_AHB(ADC12), .DMAy_Channelx = DMA2_Channel1 },
#endif
    { .ADCx = ADC3, .rccADC = RCC_AHB(ADC34), .DMAy_Channelx = DMA2_Channel5 }
};

const adcTagMap_t adcTagMap[] = {
    { DEFIO_TAG_E__PA0,  ADC_DEVICES_1,  ADC_Channel_1  }, // ADC1
    { DEFIO_TAG_E__PA1,  ADC_DEVICES_1,  ADC_Channel_2  }, // ADC1
    { DEFIO_TAG_E__PA2,  ADC_DEVICES_1,  ADC_Channel_3  }, // ADC1
    { DEFIO_TAG_E__PA3,  ADC_DEVICES_1,  ADC_Channel_4  }, // ADC1
    { DEFIO_TAG_E__PA4,  ADC_DEVICES_2,  ADC_Channel_1  }, // ADC2
    { DEFIO_TAG_E__PA5,  ADC_DEVICES_2,  ADC_Channel_2  }, // ADC2
Ejemplo n.º 4
0
#include "platform.h"
#include "drivers/time.h"

#include "drivers/sensor.h"
#include "drivers/accgyro/accgyro.h"

#include "drivers/adc.h"
#include "drivers/adc_impl.h"
#include "drivers/io.h"
#include "drivers/rcc.h"

#include "common/utils.h"

static adcDevice_t adcHardware[ADCDEV_COUNT] = {
    { .ADCx = ADC1, .rccADC = RCC_AHB(ADC12), .rccDMA = RCC_AHB(DMA1), .DMAy_Channelx = DMA1_Channel1, .enabled = false, .usedChannelCount = 0 },
    { .ADCx = ADC2, .rccADC = RCC_AHB(ADC12), .rccDMA = RCC_AHB(DMA2), .DMAy_Channelx = DMA2_Channel1, .enabled = false, .usedChannelCount = 0 }
};

const adcTagMap_t adcTagMap[] = {
    { DEFIO_TAG_E__PA0,  ADC_Channel_1  }, // ADC1
    { DEFIO_TAG_E__PA1,  ADC_Channel_2  }, // ADC1
    { DEFIO_TAG_E__PA2,  ADC_Channel_3  }, // ADC1
    { DEFIO_TAG_E__PA3,  ADC_Channel_4  }, // ADC1
    { DEFIO_TAG_E__PA4,  ADC_Channel_1  }, // ADC2
    { DEFIO_TAG_E__PA5,  ADC_Channel_2  }, // ADC2
    { DEFIO_TAG_E__PA6,  ADC_Channel_3  }, // ADC2
    { DEFIO_TAG_E__PA7,  ADC_Channel_4  }, // ADC2
    { DEFIO_TAG_E__PB0,  ADC_Channel_12 }, // ADC3
    { DEFIO_TAG_E__PB1,  ADC_Channel_1  }, // ADC3
    { DEFIO_TAG_E__PB2,  ADC_Channel_12 }, // ADC2