/* Delay x useconds */ void __udelay(unsigned long usec) { ulong ini, end; ini = READ_TIMER(); end = ini + USEC_TO_COUNT(usec); while ((signed)(end - READ_TIMER()) > 0) ; }
/* Restart counting from 0 */ void reset_timer(void) { ulong val; writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0)); /* * The load-register isn't really immediate: it changes on clock * edges, so we must wait for our newly-written value to appear. * Since we might miss reading 0, wait for any change in value. */ val = READ_TIMER(); while (READ_TIMER() == val) ; }
/* delay x useconds */ void __udelay(unsigned long usec) { long tmo = usec * (TIMER_CLOCK / 1000) / 1000; ulong now, last = READ_TIMER(); while (tmo > 0) { now = READ_TIMER(); if (now > last) /* normal (non rollover) */ tmo -= now - last; else /* rollover */ tmo -= TIMER_LOAD_VAL - last + now; last = now; } }
int timer_init(void) { u32 synth; /* Prescaler setting */ #if defined(CONFIG_SPEAR3XX) writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg); synth = MISC_GPT4SYNTH; #elif defined(CONFIG_SPEAR600) writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg); synth = MISC_GPT3SYNTH; #else # error Incorrect config. Can only be SPEAR{600|300|310|320} #endif writel(readl(&misc_regs_p->periph_clk_cfg) | synth, &misc_regs_p->periph_clk_cfg); /* disable timers */ writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control); /* load value for free running */ writel(GPT_FREE_RUNNING, &gpt_regs_p->compare); /* auto reload, start timer */ writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control); /* Reset the timer */ lastdec = READ_TIMER(); timestamp = 0; return 0; }
int timer_init(void) { /* Timer1 clock configuration */ writel(TIMER1_CLK_CFG, &stv0991_cgu_regs->tim_freq); writel(readl(&stv0991_cgu_regs->cgu_enable_2) | TIMER1_CLK_EN, &stv0991_cgu_regs->cgu_enable_2); /* Stop the timer */ writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1); writel(GPT_PRESCALER_128, &gpt1_regs_ptr->psc); /* Configure timer for auto-reload */ writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD, &gpt1_regs_ptr->cr1); /* load value for free running */ writel(GPT_FREE_RUNNING, &gpt1_regs_ptr->arr); /* start timer */ writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN, &gpt1_regs_ptr->cr1); /* Reset the timer */ lastdec = READ_TIMER(); timestamp = 0; return 0; }
/* Configure a free-running, auto-wrap counter with no prescaler */ int timer_init(void) { ulong val; writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS, CONFIG_SYS_TIMERBASE + MTU_CR(0)); /* Reset the timer */ writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0)); /* * The load-register isn't really immediate: it changes on clock * edges, so we must wait for our newly-written value to appear. * Since we might miss reading 0, wait for any change in value. */ val = READ_TIMER(); while (READ_TIMER() == val) ; return 0; }
ulong get_timer_masked(void) { /* current tick value */ ulong now = TICKS_TO_HZ(READ_TIMER()); if (now >= gd->lastinc) /* normal (non rollover) */ gd->tbl += (now - gd->lastinc); else /* rollover */ gd->tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - gd->lastinc) + now; gd->lastinc = now; return gd->tbl; }
ulong get_timer_masked (void) { ulong now = READ_TIMER(); if (lastdec >= now) { /* normal mode */ timestamp += lastdec - now; } else { /* we have an overflow ... */ timestamp += lastdec + timer_load_val - now; } lastdec = now; return timestamp; }
static ulong get_timer_masked(void) { ulong now = READ_TIMER(); if (now >= lastdec) { /* normal mode */ timestamp += now - lastdec; } else { /* we have an overflow ... */ timestamp += now + GPT_FREE_RUNNING - lastdec; } lastdec = now; return timestamp; }
/* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. */ unsigned long long get_ticks(void) { ulong now = READ_TIMER(); if (gd->lastinc >= now) { /* normal mode */ gd->timer_reset_value += gd->lastinc - now; } else { /* we have an overflow ... */ gd->timer_reset_value += gd->lastinc + gd->timer_rate_hz - now; } gd->lastinc = now; return gd->timer_reset_value; }
void reset_timer_masked (void) { /* reset time */ lastdec = READ_TIMER(); timestamp = 0; }
ulong get_curr_timer(void) { return READ_TIMER(); }
u64 get_timer_us(void) { return COUNT_TO_USEC(READ_TIMER()); }
/* Return how many HZ passed since "base" */ ulong get_timer(ulong base) { return TICKS_TO_HZ(READ_TIMER()) - base; }
void reset_timer_masked(void) { /* reset time */ gd->lastinc = READ_TIMER(); gd->timer_reset_value = 0; }