main ()
{
if (ROR (uc, shift1) != ROR (CHAR_VALUE, SHIFT1))
abort ();
if (ROR (uc, SHIFT1) != ROR (CHAR_VALUE, SHIFT1))
abort ();
if (ROR (us, shift1) != ROR (SHORT_VALUE, SHIFT1))
abort ();
if (ROR (us, SHIFT1) != ROR (SHORT_VALUE, SHIFT1))
abort ();
if (ROR (ui, shift1) != ROR (INT_VALUE, SHIFT1))
abort ();
if (ROR (ui, SHIFT1) != ROR (INT_VALUE, SHIFT1))
abort ();
if (ROR (ul, shift1) != ROR (LONG_VALUE, SHIFT1))
abort ();
if (ROR (ul, SHIFT1) != ROR (LONG_VALUE, SHIFT1))
abort ();
if (ROR (ull, shift1) != ROR (LL_VALUE, SHIFT1))
abort ();
if (ROR (ull, SHIFT1) != ROR (LL_VALUE, SHIFT1))
abort ();
if (ROR (ull, shift2) != ROR (LL_VALUE, SHIFT2))
abort ();
if (ROR (ull, SHIFT2) != ROR (LL_VALUE, SHIFT2))
abort ();
if (ROL (uc, shift1) != ROL (CHAR_VALUE, SHIFT1))
abort ();
if (ROL (uc, SHIFT1) != ROL (CHAR_VALUE, SHIFT1))
abort ();
if (ROL (us, shift1) != ROL (SHORT_VALUE, SHIFT1))
abort ();
if (ROL (us, SHIFT1) != ROL (SHORT_VALUE, SHIFT1))
abort ();
if (ROL (ui, shift1) != ROL (INT_VALUE, SHIFT1))
abort ();
if (ROL (ui, SHIFT1) != ROL (INT_VALUE, SHIFT1))
abort ();
if (ROL (ul, shift1) != ROL (LONG_VALUE, SHIFT1))
abort ();
if (ROL (ul, SHIFT1) != ROL (LONG_VALUE, SHIFT1))
abort ();
if (ROL (ull, shift1) != ROL (LL_VALUE, SHIFT1))
abort ();
if (ROL (ull, SHIFT1) != ROL (LL_VALUE, SHIFT1))
abort ();
if (ROL (ull, shift2) != ROL (LL_VALUE, SHIFT2))
abort ();
if (ROL (ull, SHIFT2) != ROL (LL_VALUE, SHIFT2))
abort ();
exit (0);
}
void
testTortureExecute (void)
{
if (ROR (uc, shift1) != ROR (CHAR_VALUE, SHIFT1))
ASSERT (0);
if (ROR (uc, SHIFT1) != ROR (CHAR_VALUE, SHIFT1))
ASSERT (0);
if (ROR (us, shift1) != ROR (SHORT_VALUE, SHIFT1))
ASSERT (0);
if (ROR (us, SHIFT1) != ROR (SHORT_VALUE, SHIFT1))
ASSERT (0);
if (ROR (ui, shift1) != ROR (INT_VALUE, SHIFT1))
ASSERT (0);
if (ROR (ui, SHIFT1) != ROR (INT_VALUE, SHIFT1))
ASSERT (0);
if (ROR (ul, shift1) != ROR (LONG_VALUE, SHIFT1))
ASSERT (0);
if (ROR (ul, SHIFT1) != ROR (LONG_VALUE, SHIFT1))
ASSERT (0);
#if 0 // TODO: enable when support for long long is complete!
if (ROR (ull, shift1) != ROR (LL_VALUE, SHIFT1))
ASSERT (0);
if (ROR (ull, SHIFT1) != ROR (LL_VALUE, SHIFT1))
ASSERT (0);
if (ROR (ull, shift2) != ROR (LL_VALUE, SHIFT2))
ASSERT (0);
if (ROR (ull, SHIFT2) != ROR (LL_VALUE, SHIFT2))
ASSERT (0);
#endif
if (ROL (uc, shift1) != ROL (CHAR_VALUE, SHIFT1))
ASSERT (0);
if (ROL (uc, SHIFT1) != ROL (CHAR_VALUE, SHIFT1))
ASSERT (0);
if (ROL (us, shift1) != ROL (SHORT_VALUE, SHIFT1))
ASSERT (0);
if (ROL (us, SHIFT1) != ROL (SHORT_VALUE, SHIFT1))
ASSERT (0);
if (ROL (ui, shift1) != ROL (INT_VALUE, SHIFT1))
ASSERT (0);
if (ROL (ui, SHIFT1) != ROL (INT_VALUE, SHIFT1))
ASSERT (0);
if (ROL (ul, shift1) != ROL (LONG_VALUE, SHIFT1))
ASSERT (0);
if (ROL (ul, SHIFT1) != ROL (LONG_VALUE, SHIFT1))
ASSERT (0);
#if 0 // TODO: enable when support for long long is complete!
if (ROL (ull, shift1) != ROL (LL_VALUE, SHIFT1))
ASSERT (0);
if (ROL (ull, SHIFT1) != ROL (LL_VALUE, SHIFT1))
ASSERT (0);
if (ROL (ull, shift2) != ROL (LL_VALUE, SHIFT2))
ASSERT (0);
if (ROL (ull, SHIFT2) != ROL (LL_VALUE, SHIFT2))
ASSERT (0);
#endif
return;
}
/*
typedef struct
{
char mnemonic[10];
char op1_type; // reconoce una r o un numeral
char op2_type;
char op3_type;
uint32_t op1_value; guarda el numero del registro o el valor del inmediato
uint32_t op2_value;
uint32_t op3_value;
}instruction_t;
*/
void decodeInstruction(instruction_t instruction,uint32_t* Rd, uint32_t* Rm, uint32_t* Rr, bool flg[], int*pc, uint8_t pila)// recibe el retorno de getInstruccion
{ uint32_t cero=0;
if( strcmp(instruction.mnemonic,"PUSH") == 0 )
{
} else
if( strcmp(instruction.mnemonic,"ADD") == 0)
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{
ADD(Rd[instruction.op1_value],Rm[instruction.op2_value],Rr[instruction.op3_value],flg,&pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
ADD(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&instruction.op3_value,flg, &pc);
}else
if( strcmp(instruction.mnemonic,"AND") == 0)
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{
AND(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value],&flg[0], &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
AND(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value,&flg[0], &pc);
} else
if( strcmp(instruction.mnemonic,"ASRS") == 0 )
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
{
ASRS(&Rd[instruction.op1_value],&Rm[instruction.op2_value], &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='#'))
ASRS(&Rd[instruction.op1_value],instruction.op2_value, &pc);
} else
if( strcmp(instruction.mnemonic,"BIC") == 0 )
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
{
BIC(&Rd[instruction.op1_value],&Rm[instruction.op2_value], &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='#'))
BIC(&Rd[instruction.op1_value],instruction.op2_value, &pc);
} else
if( strcmp(instruction.mnemonic,"CMN") == 0)
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{
CMN(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value], &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
CMN(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value, &pc);
} else
if( strcmp(instruction.mnemonic,"CMP") == 0 )
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{
CMP(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value], &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
CMP(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value, &pc);
} else
if( strcmp(instruction.mnemonic,"EOR") == 0)
{if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{
EOR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value],&flg[0], &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
EOR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value,&flg[0], &pc);
} else
if( strcmp(instruction.mnemonic,"LSL") == 0 )
{if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{
LSL(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value, &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
LSL(&Rd[instruction.op1_value],&Rm[instruction.op2_value],cero, &pc);
} else
if( strcmp(instruction.mnemonic,"LSR") == 0)
{
{if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{
LSR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],cero, &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
LSR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value, &pc);
}
} else
if( strcmp(instruction.mnemonic,"MOV") == 0)
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
{
MOV(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&flg[0], &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='#'))
MOV(&Rd[instruction.op1_value],instruction.op2_value,&flg[0], &pc);
} else
if( strcmp(instruction.mnemonic,"MUL") == 0)
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{
MUL(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value],&flg[0], &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
MUL(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value,&flg[0], &pc);
} else
if(strcmp(instruction.mnemonic,"MVN") == 0)
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
{
MVN(&Rd[instruction.op1_value],&Rm[instruction.op2_value], &pc);
/* solo opera registros
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='#'))
LSL(&Rd[instruction.op1_value],&instruction.op2_value);
}
*/
}
} else
if(strcmp(instruction.mnemonic,"NOP") == 0 )
{
NOP( &pc);
}
else
if(strcmp(instruction.mnemonic,"OR") == 0)
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{
OR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value],&flg[0], &pc);
}else
if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
OR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value,&flg[0], &pc);
} else
if( strcmp(instruction.mnemonic,"REV") == 0 ) //1
{
// instruction.op1_value --> Valor primer operando
// instruction.op1_type --> Tipo primer operando (R->Registro #->Numero N->Ninguno)
// ... Igual para los otros operandos
} else
if( strcmp(instruction.mnemonic,"REV16") == 0 ) //2
{
// instruction.op1_value --> Valor primer operando
// instruction.op1_type --> Tipo primer operando (R->Registro #->Numero N->Ninguno)
// ... Igual para los otros operandos
} else
if( strcmp(instruction.mnemonic,"REVSH") == 0 )//3
{
// instruction.op1_value --> Valor primer operando
// instruction.op1_type --> Tipo primer operando (R->Registro #->Numero N->Ninguno)
// ... Igual para los otros operandos
} else
if( strcmp(instruction.mnemonic,"ROR") == 0 )
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
{
ROR(&Rd[instruction.op1_value],&Rm[instruction.op2_value], &pc);
}
} else
if( strcmp(instruction.mnemonic,"RSBS") == 0 )
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
{
RSBS(&Rd[instruction.op1_value],&Rm[instruction.op2_value], &pc);
}else
if((instruction.op1_type=='R')&&instruction.op2_type=='#')
RSBS(&Rd[instruction.op1_value],instruction.op2_value, &pc);
} else
/*if( strcmp(instruction.mnemonic,"SBC") == 0 ) //4
{
} else*/
if( strcmp(instruction.mnemonic,"SUB") == 0 )
{
if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{
SUB(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value],&flg[0], &pc);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
SUB(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value,&flg[0], &pc);
} else
if( strcmp(instruction.mnemonic,"LDR") == 0) //5
{ if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
{
LDR(&Rd[instruction.op1_value],Rm[instruction.op1_value],instruction.op3_value);
}else if ((instruction.op1_type=='R')&&(instruction.op2_type=='S')&&(instruction.op3_type=='#'))
{
LDR(&Rd[instruction.op1_value],pila,instruction.op3_value);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='P')&&(instruction.op3_type=='#'))
{
LDR(&Rd[instruction.op1_value],pc,instruction.op3_value);
}else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
{LDR(&Rd[instruction.op1_value],Rd[instruction.op2_value],instruction.op3_value);
}
}else
if( strcmp(instruction.mnemonic,"LDR") == 0)
{
}
}
int
main ()
{
if (ROR (c, shift1) != ROR (CHAR_VALUE, SHIFT1))
abort ();
if (ROR (c, SHIFT1) != ROR (CHAR_VALUE, SHIFT1))
abort ();
if (ROR (s, shift1) != ROR (SHORT_VALUE, SHIFT1))
abort ();
if (ROR (s, SHIFT1) != ROR (SHORT_VALUE, SHIFT1))
abort ();
if (ROR (i, shift1) != ROR (INT_VALUE, SHIFT1))
abort ();
if (ROR (i, SHIFT1) != ROR (INT_VALUE, SHIFT1))
abort ();
if (ROR (l, shift1) != ROR (LONG_VALUE, SHIFT1))
abort ();
if (ROR (l, SHIFT1) != ROR (LONG_VALUE, SHIFT1))
abort ();
if (ROR (ll, shift1) != ROR (LL_VALUE, SHIFT1))
abort ();
if (ROR (ll, SHIFT1) != ROR (LL_VALUE, SHIFT1))
abort ();
if (ROR (ll, shift2) != ROR (LL_VALUE, SHIFT2))
abort ();
if (ROR (ll, SHIFT2) != ROR (LL_VALUE, SHIFT2))
abort ();
if (ROL (c, shift1) != ROL (CHAR_VALUE, SHIFT1))
abort ();
if (ROL (c, SHIFT1) != ROL (CHAR_VALUE, SHIFT1))
abort ();
if (ROL (s, shift1) != ROL (SHORT_VALUE, SHIFT1))
abort ();
if (ROL (s, SHIFT1) != ROL (SHORT_VALUE, SHIFT1))
abort ();
if (ROL (i, shift1) != ROL (INT_VALUE, SHIFT1))
abort ();
if (ROL (i, SHIFT1) != ROL (INT_VALUE, SHIFT1))
abort ();
if (ROL (l, shift1) != ROL (LONG_VALUE, SHIFT1))
abort ();
if (ROL (l, SHIFT1) != ROL (LONG_VALUE, SHIFT1))
abort ();
if (ROL (ll, shift1) != ROL (LL_VALUE, SHIFT1))
abort ();
if (ROL (ll, SHIFT1) != ROL (LL_VALUE, SHIFT1))
abort ();
if (ROL (ll, shift2) != ROL (LL_VALUE, SHIFT2))
abort ();
if (ROL (ll, SHIFT2) != ROL (LL_VALUE, SHIFT2))
abort ();
exit (0);
}
int bit_ror(lua_State *L){
LUA_INTEGER a = luaL_checkinteger(L, 1);
LUA_INTEGER n = luaL_checkinteger(L, 2);
lua_pushinteger(L, ROR(a, n));
return 1;
}
unsigned long long testR(unsigned long long a, int cnt) {
return cnt == 0 ? a : ROR(a, cnt);
}
void decodeInstruction(instruction_t instruction, uint32_t *dir_reg, char *dir_flags, uint8_t *SRAM, uint16_t *dec)
{
uint8_t *R_activos=instruction.registers_list;
/* Comparacion de mnemonic y Llamado de las funciones */
if( strcmp(instruction.mnemonic,"ADC") == 0 || strcmp(instruction.mnemonic,"ADCS") == 0){
dir_reg[PC]++;
*dec=16704;
*dec=*dec|instruction.op3_value<<3|instruction.op1_value;
dir_reg[instruction.op1_value]=ADC(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
}
if( strcmp(instruction.mnemonic,"ADDS") == 0 || strcmp(instruction.mnemonic,"ADD") == 0){
dir_reg[PC]++;
if(instruction.op2_type=='S'){
*dec=45056;
dir_reg[SP]=ADD(dir_reg[SP],instruction.op3_value,dir_flags);
*dec=*dec|instruction.op3_value;}
else if(instruction.op3_type=='#'){
*dec=7168;
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
dir_reg[instruction.op1_value]=ADD(dir_reg[instruction.op2_value], instruction.op3_value,dir_flags);
mvprintw(4,20,"%X",*dec);}
else{
*dec=6144;
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
dir_reg[instruction.op1_value]=ADD(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);}
}
if( strcmp(instruction.mnemonic,"AND") == 0 || strcmp(instruction.mnemonic,"ANDS") == 0){
dir_reg[PC]++;
*dec=16384;
if(instruction.op3_type=='#'){
dir_reg[instruction.op1_value]=AND(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);}
else
dir_reg[instruction.op1_value]=AND(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
}
if( strcmp(instruction.mnemonic,"ASR") == 0 || strcmp(instruction.mnemonic,"ASRS") == 0){
dir_reg[PC]++;
if(instruction.op3_type=='#'){
*dec=4096;
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
dir_reg[instruction.op1_value]=ASR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);}
else{
*dec=16640;
*dec=*dec|instruction.op3_value<<3|instruction.op1_value;
dir_reg[instruction.op1_value]=ASR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);}
}
if( strcmp(instruction.mnemonic,"BICS") == 0 || strcmp(instruction.mnemonic,"BICS") == 0){
dir_reg[PC]++;
if(instruction.op3_type=='#')
dir_reg[instruction.op1_value]=BIC(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);
else{
*dec=17280;
dir_reg[instruction.op1_value]=BIC(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
*dec=*dec|instruction.op3_value<<3|instruction.op1_value;}
}
if( strcmp(instruction.mnemonic,"CMN" ) == 0 || strcmp(instruction.mnemonic,"CMNS") == 0){
dir_reg[PC]++;
CMN(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value],dir_flags);
*dec=17088;
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
mvprintw(4,20,"%X",*dec);
}
if( strcmp(instruction.mnemonic,"CMP") == 0 || strcmp(instruction.mnemonic,"CMPS") == 0){
dir_reg[PC]++;
CMP(dir_reg[instruction.op1_value],dir_reg[instruction.op2_value],dir_flags);
*dec=17024;
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
mvprintw(4,20,"%X",*dec);
}
if( strcmp(instruction.mnemonic,"EOR") == 0 || strcmp(instruction.mnemonic,"EORS") == 0){
dir_reg[PC]++;
*dec=16448;
if(instruction.op3_type=='#')
dir_reg[instruction.op1_value]=EOR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);
else
dir_reg[instruction.op1_value]=EOR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
}
if( strcmp(instruction.mnemonic,"LSLS") == 0 || strcmp(instruction.mnemonic,"LSL") == 0){
dir_reg[PC]++;
if(instruction.op3_type=='#'){
*dec=0;
dir_reg[instruction.op1_value]=LSL(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
else{
*dec=16512;
dir_reg[instruction.op1_value]=LSL(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
*dec=*dec|instruction.op3_value<<3|instruction.op1_value;}
}
if( strcmp(instruction.mnemonic,"LSRS") == 0 || strcmp(instruction.mnemonic,"LSR") == 0){
dir_reg[PC]++;
if(instruction.op3_type=='#'){
*dec=2048;
dir_reg[instruction.op1_value]=LSR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
else{
*dec=16576;
dir_reg[instruction.op1_value]=LSR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
*dec=*dec|instruction.op3_value<<3|instruction.op1_value;}
}
if( strcmp(instruction.mnemonic,"MOV") == 0 || strcmp(instruction.mnemonic,"MOVS") == 0){
dir_reg[PC]++;
if(instruction.op2_type=='#'){
*dec=8192;
dir_reg[instruction.op1_value]=MOV(instruction.op2_value,dir_flags);
*dec=*dec|instruction.op1_value<<8|instruction.op2_value;}
else{
*dec=0;
dir_reg[instruction.op1_value]=MOV(dir_reg[instruction.op2_value],dir_flags);
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;}
}
if( strcmp(instruction.mnemonic,"MUL") == 0 || strcmp(instruction.mnemonic,"MULS") == 0){
dir_reg[PC]++;
*dec=17216;
if(instruction.op3_type=='#'){
dir_reg[instruction.op1_value]=MUL(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);}
else{
dir_reg[instruction.op1_value]=MUL(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;}
}
if( strcmp(instruction.mnemonic,"MVN") == 0 || strcmp(instruction.mnemonic,"MVNS") == 0){
dir_reg[PC]++;
*dec=17344;
dir_reg[instruction.op1_value]=MVN(dir_reg[instruction.op2_value], dir_flags);
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
}
if( strcmp(instruction.mnemonic,"ORR") == 0 || strcmp(instruction.mnemonic,"ORRS") == 0){
dir_reg[PC]++;
*dec=17152;
if(instruction.op3_type=='#'){
dir_reg[instruction.op1_value]=ORR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);}
else{
dir_reg[instruction.op1_value]=ORR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
*dec=*dec|instruction.op3_value<<3|instruction.op1_value;}
}
if( strcmp(instruction.mnemonic,"REV") == 0 || strcmp(instruction.mnemonic,"REVS") == 0){
dir_reg[PC]++;
*dec=47616;
dir_reg[instruction.op1_value]=REV(dir_reg[instruction.op2_value]);
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
}
if( strcmp(instruction.mnemonic,"REVG") == 0 || strcmp(instruction.mnemonic,"REVGS") == 0){
dir_reg[PC]++;
*dec=47680;
dir_reg[instruction.op1_value]=REVG(dir_reg[instruction.op2_value]);
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
}
if( strcmp(instruction.mnemonic,"REVSH") == 0 || strcmp(instruction.mnemonic,"REVSHS") == 0){
dir_reg[PC]++;
*dec=47808;
dir_reg[instruction.op1_value]=REVSH(dir_reg[instruction.op2_value]);
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
}
if( strcmp(instruction.mnemonic,"ROR") == 0 || strcmp(instruction.mnemonic,"RORS") == 0){
dir_reg[PC]++;
*dec=16832;
if(instruction.op3_type=='#'){
dir_reg[instruction.op1_value]=ROR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);}
else{
dir_reg[instruction.op1_value]=ROR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
*dec=*dec|instruction.op3_value<<3|instruction.op1_value;}
}
if( strcmp(instruction.mnemonic,"RSB") == 0 || strcmp(instruction.mnemonic,"RSBS") == 0){
dir_reg[PC]++;
*dec=16690;
dir_reg[instruction.op1_value]=RSB(dir_reg[instruction.op2_value], dir_flags);
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
}
if( strcmp(instruction.mnemonic,"SBC") == 0 || strcmp(instruction.mnemonic,"SBCS") == 0){
dir_reg[PC]++;
*dec=16768;
SBC(dir_reg[instruction.op1_value],dir_reg[instruction.op2_value], dir_flags);
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
}
if( strcmp(instruction.mnemonic,"SUBS") == 0 || strcmp(instruction.mnemonic,"SUB") == 0){
dir_reg[PC]++;
if(instruction.op2_type=='S'){
*dec=45184;
dir_reg[SP]=SUB(dir_reg[SP],instruction.op3_value,dir_flags);
*dec=*dec|instruction.op3_value;}
else if(instruction.op3_type=='#'){
*dec=7680;
dir_reg[instruction.op1_value]=SUB(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
else{
*dec=6656;
dir_reg[instruction.op1_value]=SUB(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
}
if( strcmp(instruction.mnemonic,"TST") == 0 || strcmp(instruction.mnemonic,"TSTS") == 0){
dir_reg[PC]++;
*dec=16896;
TST(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], dir_flags);
*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
}
if( strcmp(instruction.mnemonic,"NOP") == 0 ){
NOP(dir_reg);
*dec=48896;
}
if( strcmp(instruction.mnemonic,"B") == 0 ){
*dec=57344;
*dec=*dec|instruction.op1_value;
B(instruction.op1_value, dir_reg);
}
if( strcmp(instruction.mnemonic,"BL") == 0 ){
*dec=0;
BL(instruction.op1_value, dir_reg);
}
if( strcmp(instruction.mnemonic,"BX") == 0 ){
*dec=18176;
BX(dir_reg);
}
if( strcmp(instruction.mnemonic,"BEQ") == 0 ){
*dec=0;
BEQ(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BNE") == 0 ){
*dec=0;
BNE(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BCS") == 0 ){
*dec=0;
BCS(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BCC") == 0 ){
*dec=0;
BCC(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BMI") == 0 ){
*dec=0;
BMI(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BPL") == 0 ){
*dec=0;
BPL(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BVS") == 0 ){
*dec=0;
BVS(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BVC") == 0 ){
*dec=0;
BVC(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BHI") == 0 ){
*dec=0;
BHI(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BLS") == 0 ){
*dec=0;
BLS(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BGE") == 0 ){
*dec=0;
BGE(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BLT") == 0 ){
*dec=0;
BLT(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BGT") == 0 ){
*dec=0;
BGT(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BLE") == 0 ){
*dec=0;
BLE(instruction.op1_value, dir_reg, dir_flags);
}
if( strcmp(instruction.mnemonic,"BAL") == 0 ){
*dec=0;
BAL(instruction.op1_value, dir_reg);
}
if(strcmp(instruction.mnemonic,"PUSH")==0){
dir_reg[PC]++;
*dec=46080;
PUSH(SRAM, dir_reg,R_activos);
}
if(strcmp(instruction.mnemonic,"POP")==0){
dir_reg[PC]++;
*dec=48128;
POP(SRAM,dir_reg,R_activos);
}
data=(uint8_t)dir_reg[instruction.op1_value];
if(strcmp(instruction.mnemonic,"LDR")==0){
dir_reg[PC]++;
if(instruction.op2_type=='=' && instruction.op3_type=='N'){
*dec=0;
dir_reg[instruction.op1_value]=instruction.op2_value;}
else if(instruction.op2_type=='S'){
*dec=38912;
dir_reg[instruction.op1_value]=LDR(dir_reg[SP], instruction.op3_value<<2, SRAM);
*dec=*dec|instruction.op3_value|instruction.op1_value<<8;}
else if(instruction.op3_type=='#' || instruction.op3_type=='N'){
*dec=26624;
if((dir_reg[instruction.op2_value]+(instruction.op3_value<<2))>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<2)), &data,Read);
else
dir_reg[instruction.op1_value]=LDR(dir_reg[instruction.op2_value], instruction.op3_value<<2, SRAM);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value|instruction.op1_value;}
else{
*dec=22528;
if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read);
else
dir_reg[instruction.op1_value]=LDR(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
}
if(strcmp(instruction.mnemonic,"LDRB")==0){
dir_reg[PC]++;
if(instruction.op3_type=='#' || instruction.op3_type=='N'){
*dec=30720;
if((dir_reg[instruction.op2_value]+instruction.op3_value)>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+instruction.op3_value), &data,Read);
else
dir_reg[instruction.op1_value]=LDRB(dir_reg[instruction.op2_value], instruction.op3_value, SRAM);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
else{
*dec=23552;
if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read);
else
dir_reg[instruction.op1_value]=LDRB(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
}
if(strcmp(instruction.mnemonic,"LDRH")==0){
dir_reg[PC]++;
if(instruction.op3_type=='#' || instruction.op3_type=='N'){
*dec=34816;
if((dir_reg[instruction.op2_value]+(instruction.op3_value<<1))>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<1)), &data,Read);
else
dir_reg[instruction.op1_value]=LDRH(dir_reg[instruction.op2_value], instruction.op3_value<<1, SRAM);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
else{
*dec=23040;
if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read);
else
dir_reg[instruction.op1_value]=LDRH(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
}
if(strcmp(instruction.mnemonic,"LDRSB")==0){
dir_reg[PC]++;
*dec=22016;
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read);
else
dir_reg[instruction.op1_value]=LDRSB(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
}
if(strcmp(instruction.mnemonic,"LDRSH")==0){
dir_reg[PC]++;
*dec=24064;
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read);
else
dir_reg[instruction.op1_value]=LDRSH(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
}
if(strcmp(instruction.mnemonic,"STR")==0){
dir_reg[PC]++;
if(instruction.op2_type=='S'){
*dec=38912;
STR(dir_reg[instruction.op1_value],dir_reg[SP], instruction.op3_value<<2, SRAM);
*dec=*dec|instruction.op3_value|instruction.op1_value<<8;}
else if(instruction.op3_type=='#' || instruction.op3_type=='N'){
*dec=24576;
if((dir_reg[instruction.op2_value]+(instruction.op3_value<<2))>=0x40000000){
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<2)), &data,Write);}
else{
STR(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], instruction.op3_value<<2, SRAM);}
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
mvprintw(1,3,"Hola");}
else{
*dec=20480;
if((dir_reg[instruction.op2_value]+dir_reg[instruction.op2_value])>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(dir_reg[instruction.op3_value])), &data,Write);
else{
STR(dir_reg[instruction.op1_value], instruction.op2_value, instruction.op3_value, SRAM);}
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
}
if(strcmp(instruction.mnemonic,"STRB")==0){
dir_reg[PC]++;
if(instruction.op3_type=='#' || instruction.op3_type=='N'){
*dec=28672;
if(dir_reg[instruction.op2_value]+instruction.op3_value>=0x40000000){
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+instruction.op3_value), &data,Write);}
else{
STRB(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], instruction.op3_value, SRAM);}
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
else{
*dec=21504;
if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000){
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(dir_reg[instruction.op3_value])), &data,Write);}
else{
STRB(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);}
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
}
if(strcmp(instruction.mnemonic,"STRH")==0){
dir_reg[PC]++;
if(instruction.op3_type=='#' || instruction.op3_type=='N'){
*dec=32768;
if(((dir_reg[instruction.op2_value])+(instruction.op3_value<<1))>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<1)),&data,Write);
else
STRH(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], instruction.op3_value<<1, SRAM);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
else{
*dec=20992;
if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(dir_reg[instruction.op3_value])), &data,Write);
else
STRH(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
}
}
/*===================================================================*/
void K6502_Step( WORD wClocks )
{
/*
* Only the specified number of the clocks execute Op.
*
* Parameters
* WORD wClocks (Read)
* The number of the clocks
*/
BYTE byCode;
WORD wA0;
BYTE byD0;
BYTE byD1;
WORD wD0;
// Dispose of it if there is an interrupt requirement
if ( NMI_State != NMI_Wiring )
{
// NMI Interrupt
NMI_State = NMI_Wiring;
CLK( 7 );
PUSHW( PC );
PUSH( F & ~FLAG_B );
RSTF( FLAG_D );
SETF( FLAG_I );
PC = K6502_ReadW( VECTOR_NMI );
}
else
if ( IRQ_State != IRQ_Wiring )
{
// IRQ Interrupt
// Execute IRQ if an I flag isn't being set
if ( !( F & FLAG_I ) )
{
IRQ_State = IRQ_Wiring;
CLK( 7 );
PUSHW( PC );
PUSH( F & ~FLAG_B );
RSTF( FLAG_D );
SETF( FLAG_I );
PC = K6502_ReadW( VECTOR_IRQ );
}
}
// It has a loop until a constant clock passes
while ( g_wPassedClocks < wClocks )
{
// Read an instruction
byCode = K6502_Read( PC++ );
// Execute an instruction.
switch ( byCode )
{
case 0x00: // BRK
++PC; PUSHW( PC ); SETF( FLAG_B ); PUSH( F ); SETF( FLAG_I ); RSTF( FLAG_D ); PC = K6502_ReadW( VECTOR_IRQ ); CLK( 7 );
break;
case 0x01: // ORA (Zpg,X)
ORA( A_IX ); CLK( 6 );
break;
case 0x05: // ORA Zpg
ORA( A_ZP ); CLK( 3 );
break;
case 0x06: // ASL Zpg
ASL( AA_ZP ); CLK( 5 );
break;
case 0x08: // PHP
SETF( FLAG_B ); PUSH( F ); CLK( 3 );
break;
case 0x09: // ORA #Oper
ORA( A_IMM ); CLK( 2 );
break;
case 0x0A: // ASL A
ASLA; CLK( 2 );
break;
case 0x0D: // ORA Abs
ORA( A_ABS ); CLK( 4 );
break;
case 0x0e: // ASL Abs
ASL( AA_ABS ); CLK( 6 );
break;
case 0x10: // BPL Oper
BRA( !( F & FLAG_N ) );
break;
case 0x11: // ORA (Zpg),Y
ORA( A_IY ); CLK( 5 );
break;
case 0x15: // ORA Zpg,X
ORA( A_ZPX ); CLK( 4 );
break;
case 0x16: // ASL Zpg,X
ASL( AA_ZPX ); CLK( 6 );
break;
case 0x18: // CLC
RSTF( FLAG_C ); CLK( 2 );
break;
case 0x19: // ORA Abs,Y
ORA( A_ABSY ); CLK( 4 );
break;
case 0x1D: // ORA Abs,X
ORA( A_ABSX ); CLK( 4 );
break;
case 0x1E: // ASL Abs,X
ASL( AA_ABSX ); CLK( 7 );
break;
case 0x20: // JSR Abs
JSR; CLK( 6 );
break;
case 0x21: // AND (Zpg,X)
AND( A_IX ); CLK( 6 );
break;
case 0x24: // BIT Zpg
BIT( A_ZP ); CLK( 3 );
break;
case 0x25: // AND Zpg
AND( A_ZP ); CLK( 3 );
break;
case 0x26: // ROL Zpg
ROL( AA_ZP ); CLK( 5 );
break;
case 0x28: // PLP
POP( F ); SETF( FLAG_R ); CLK( 4 );
break;
case 0x29: // AND #Oper
AND( A_IMM ); CLK( 2 );
break;
case 0x2A: // ROL A
ROLA; CLK( 2 );
break;
case 0x2C: // BIT Abs
BIT( A_ABS ); CLK( 4 );
break;
case 0x2D: // AND Abs
AND( A_ABS ); CLK( 4 );
break;
case 0x2E: // ROL Abs
ROL( AA_ABS ); CLK( 6 );
break;
case 0x30: // BMI Oper
BRA( F & FLAG_N );
break;
case 0x31: // AND (Zpg),Y
AND( A_IY ); CLK( 5 );
break;
case 0x35: // AND Zpg,X
AND( A_ZPX ); CLK( 4 );
break;
case 0x36: // ROL Zpg,X
ROL( AA_ZPX ); CLK( 6 );
break;
case 0x38: // SEC
SETF( FLAG_C ); CLK( 2 );
break;
case 0x39: // AND Abs,Y
AND( A_ABSY ); CLK( 4 );
break;
case 0x3D: // AND Abs,X
AND( A_ABSX ); CLK( 4 );
break;
case 0x3E: // ROL Abs,X
ROL( AA_ABSX ); CLK( 7 );
break;
case 0x40: // RTI
POP( F ); SETF( FLAG_R ); POPW( PC ); CLK( 6 );
break;
case 0x41: // EOR (Zpg,X)
EOR( A_IX ); CLK( 6 );
break;
case 0x45: // EOR Zpg
EOR( A_ZP ); CLK( 3 );
break;
case 0x46: // LSR Zpg
LSR( AA_ZP ); CLK( 5 );
break;
case 0x48: // PHA
PUSH( A ); CLK( 3 );
break;
case 0x49: // EOR #Oper
EOR( A_IMM ); CLK( 2 );
break;
case 0x4A: // LSR A
LSRA; CLK( 2 );
break;
case 0x4C: // JMP Abs
JMP( AA_ABS ); CLK( 3 );
break;
case 0x4D: // EOR Abs
EOR( A_ABS ); CLK( 4 );
break;
case 0x4E: // LSR Abs
LSR( AA_ABS ); CLK( 6 );
break;
case 0x50: // BVC
BRA( !( F & FLAG_V ) );
break;
case 0x51: // EOR (Zpg),Y
EOR( A_IY ); CLK( 5 );
break;
case 0x55: // EOR Zpg,X
EOR( A_ZPX ); CLK( 4 );
break;
case 0x56: // LSR Zpg,X
LSR( AA_ZPX ); CLK( 6 );
break;
case 0x58: // CLI
byD0 = F;
RSTF( FLAG_I ); CLK( 2 );
if ( ( byD0 & FLAG_I ) && IRQ_State != IRQ_Wiring )
{
IRQ_State = IRQ_Wiring;
CLK( 7 );
PUSHW( PC );
PUSH( F & ~FLAG_B );
RSTF( FLAG_D );
SETF( FLAG_I );
PC = K6502_ReadW( VECTOR_IRQ );
}
break;
case 0x59: // EOR Abs,Y
EOR( A_ABSY ); CLK( 4 );
break;
case 0x5D: // EOR Abs,X
EOR( A_ABSX ); CLK( 4 );
break;
case 0x5E: // LSR Abs,X
LSR( AA_ABSX ); CLK( 7 );
break;
case 0x60: // RTS
POPW( PC ); ++PC; CLK( 6 );
break;
case 0x61: // ADC (Zpg,X)
ADC( A_IX ); CLK( 6 );
break;
case 0x65: // ADC Zpg
ADC( A_ZP ); CLK( 3 );
break;
case 0x66: // ROR Zpg
ROR( AA_ZP ); CLK( 5 );
break;
case 0x68: // PLA
POP( A ); TEST( A ); CLK( 4 );
break;
case 0x69: // ADC #Oper
ADC( A_IMM ); CLK( 2 );
break;
case 0x6A: // ROR A
RORA; CLK( 2 );
break;
case 0x6C: // JMP (Abs)
JMP( K6502_ReadW2( AA_ABS ) ); CLK( 5 );
break;
case 0x6D: // ADC Abs
ADC( A_ABS ); CLK( 4 );
break;
case 0x6E: // ROR Abs
ROR( AA_ABS ); CLK( 6 );
break;
case 0x70: // BVS
BRA( F & FLAG_V );
break;
case 0x71: // ADC (Zpg),Y
ADC( A_IY ); CLK( 5 );
break;
case 0x75: // ADC Zpg,X
ADC( A_ZPX ); CLK( 4 );
break;
case 0x76: // ROR Zpg,X
ROR( AA_ZPX ); CLK( 6 );
break;
case 0x78: // SEI
SETF( FLAG_I ); CLK( 2 );
break;
case 0x79: // ADC Abs,Y
ADC( A_ABSY ); CLK( 4 );
break;
case 0x7D: // ADC Abs,X
ADC( A_ABSX ); CLK( 4 );
break;
case 0x7E: // ROR Abs,X
ROR( AA_ABSX ); CLK( 7 );
break;
case 0x81: // STA (Zpg,X)
STA( AA_IX ); CLK( 6 );
break;
case 0x84: // STY Zpg
STY( AA_ZP ); CLK( 3 );
break;
case 0x85: // STA Zpg
STA( AA_ZP ); CLK( 3 );
break;
case 0x86: // STX Zpg
STX( AA_ZP ); CLK( 3 );
break;
case 0x88: // DEY
--Y; TEST( Y ); CLK( 2 );
break;
case 0x8A: // TXA
A = X; TEST( A ); CLK( 2 );
break;
case 0x8C: // STY Abs
STY( AA_ABS ); CLK( 4 );
break;
case 0x8D: // STA Abs
STA( AA_ABS ); CLK( 4 );
break;
case 0x8E: // STX Abs
STX( AA_ABS ); CLK( 4 );
break;
case 0x90: // BCC
BRA( !( F & FLAG_C ) );
break;
case 0x91: // STA (Zpg),Y
STA( AA_IY ); CLK( 6 );
break;
case 0x94: // STY Zpg,X
STY( AA_ZPX ); CLK( 4 );
break;
case 0x95: // STA Zpg,X
STA( AA_ZPX ); CLK( 4 );
break;
case 0x96: // STX Zpg,Y
STX( AA_ZPY ); CLK( 4 );
break;
case 0x98: // TYA
A = Y; TEST( A ); CLK( 2 );
break;
case 0x99: // STA Abs,Y
STA( AA_ABSY ); CLK( 5 );
break;
case 0x9A: // TXS
SP = X; CLK( 2 );
break;
case 0x9D: // STA Abs,X
STA( AA_ABSX ); CLK( 5 );
break;
case 0xA0: // LDY #Oper
LDY( A_IMM ); CLK( 2 );
break;
case 0xA1: // LDA (Zpg,X)
LDA( A_IX ); CLK( 6 );
break;
case 0xA2: // LDX #Oper
LDX( A_IMM ); CLK( 2 );
break;
case 0xA4: // LDY Zpg
LDY( A_ZP ); CLK( 3 );
break;
case 0xA5: // LDA Zpg
LDA( A_ZP ); CLK( 3 );
break;
case 0xA6: // LDX Zpg
LDX( A_ZP ); CLK( 3 );
break;
case 0xA8: // TAY
Y = A; TEST( A ); CLK( 2 );
break;
case 0xA9: // LDA #Oper
LDA( A_IMM ); CLK( 2 );
break;
case 0xAA: // TAX
X = A; TEST( A ); CLK( 2 );
break;
case 0xAC: // LDY Abs
LDY( A_ABS ); CLK( 4 );
break;
case 0xAD: // LDA Abs
LDA( A_ABS ); CLK( 4 );
break;
case 0xAE: // LDX Abs
LDX( A_ABS ); CLK( 4 );
break;
case 0xB0: // BCS
BRA( F & FLAG_C );
break;
case 0xB1: // LDA (Zpg),Y
LDA( A_IY ); CLK( 5 );
break;
case 0xB4: // LDY Zpg,X
LDY( A_ZPX ); CLK( 4 );
break;
case 0xB5: // LDA Zpg,X
LDA( A_ZPX ); CLK( 4 );
break;
case 0xB6: // LDX Zpg,Y
LDX( A_ZPY ); CLK( 4 );
break;
case 0xB8: // CLV
RSTF( FLAG_V ); CLK( 2 );
break;
case 0xB9: // LDA Abs,Y
LDA( A_ABSY ); CLK( 4 );
break;
case 0xBA: // TSX
X = SP; TEST( X ); CLK( 2 );
break;
case 0xBC: // LDY Abs,X
LDY( A_ABSX ); CLK( 4 );
break;
case 0xBD: // LDA Abs,X
LDA( A_ABSX ); CLK( 4 );
break;
case 0xBE: // LDX Abs,Y
LDX( A_ABSY ); CLK( 4 );
break;
case 0xC0: // CPY #Oper
CPY( A_IMM ); CLK( 2 );
break;
case 0xC1: // CMP (Zpg,X)
CMP( A_IX ); CLK( 6 );
break;
case 0xC4: // CPY Zpg
CPY( A_ZP ); CLK( 3 );
break;
case 0xC5: // CMP Zpg
CMP( A_ZP ); CLK( 3 );
break;
case 0xC6: // DEC Zpg
DEC( AA_ZP ); CLK( 5 );
break;
case 0xC8: // INY
++Y; TEST( Y ); CLK( 2 );
break;
case 0xC9: // CMP #Oper
CMP( A_IMM ); CLK( 2 );
break;
case 0xCA: // DEX
--X; TEST( X ); CLK( 2 );
break;
case 0xCC: // CPY Abs
CPY( A_ABS ); CLK( 4 );
break;
case 0xCD: // CMP Abs
CMP( A_ABS ); CLK( 4 );
break;
case 0xCE: // DEC Abs
DEC( AA_ABS ); CLK( 6 );
break;
case 0xD0: // BNE
BRA( !( F & FLAG_Z ) );
break;
case 0xD1: // CMP (Zpg),Y
CMP( A_IY ); CLK( 5 );
break;
case 0xD5: // CMP Zpg,X
CMP( A_ZPX ); CLK( 4 );
break;
case 0xD6: // DEC Zpg,X
DEC( AA_ZPX ); CLK( 6 );
break;
case 0xD8: // CLD
RSTF( FLAG_D ); CLK( 2 );
break;
case 0xD9: // CMP Abs,Y
CMP( A_ABSY ); CLK( 4 );
break;
case 0xDD: // CMP Abs,X
CMP( A_ABSX ); CLK( 4 );
break;
case 0xDE: // DEC Abs,X
DEC( AA_ABSX ); CLK( 7 );
break;
case 0xE0: // CPX #Oper
CPX( A_IMM ); CLK( 2 );
break;
case 0xE1: // SBC (Zpg,X)
SBC( A_IX ); CLK( 6 );
break;
case 0xE4: // CPX Zpg
CPX( A_ZP ); CLK( 3 );
break;
case 0xE5: // SBC Zpg
SBC( A_ZP ); CLK( 3 );
break;
case 0xE6: // INC Zpg
INC( AA_ZP ); CLK( 5 );
break;
case 0xE8: // INX
++X; TEST( X ); CLK( 2 );
break;
case 0xE9: // SBC #Oper
SBC( A_IMM ); CLK( 2 );
break;
case 0xEA: // NOP
CLK( 2 );
break;
case 0xEC: // CPX Abs
CPX( A_ABS ); CLK( 4 );
break;
case 0xED: // SBC Abs
SBC( A_ABS ); CLK( 4 );
break;
case 0xEE: // INC Abs
INC( AA_ABS ); CLK( 6 );
break;
case 0xF0: // BEQ
BRA( F & FLAG_Z );
break;
case 0xF1: // SBC (Zpg),Y
SBC( A_IY ); CLK( 5 );
break;
case 0xF5: // SBC Zpg,X
SBC( A_ZPX ); CLK( 4 );
break;
case 0xF6: // INC Zpg,X
INC( AA_ZPX ); CLK( 6 );
break;
case 0xF8: // SED
SETF( FLAG_D ); CLK( 2 );
break;
case 0xF9: // SBC Abs,Y
SBC( A_ABSY ); CLK( 4 );
break;
case 0xFD: // SBC Abs,X
SBC( A_ABSX ); CLK( 4 );
break;
case 0xFE: // INC Abs,X
INC( AA_ABSX ); CLK( 7 );
break;
/*-----------------------------------------------------------*/
/* Unlisted Instructions ( thanks to virtualnes ) */
/*-----------------------------------------------------------*/
case 0x1A: // NOP (Unofficial)
case 0x3A: // NOP (Unofficial)
case 0x5A: // NOP (Unofficial)
case 0x7A: // NOP (Unofficial)
case 0xDA: // NOP (Unofficial)
case 0xFA: // NOP (Unofficial)
CLK( 2 );
break;
case 0x80: // DOP (CYCLES 2)
case 0x82: // DOP (CYCLES 2)
case 0x89: // DOP (CYCLES 2)
case 0xC2: // DOP (CYCLES 2)
case 0xE2: // DOP (CYCLES 2)
PC++;
CLK( 2 );
break;
case 0x04: // DOP (CYCLES 3)
case 0x44: // DOP (CYCLES 3)
case 0x64: // DOP (CYCLES 3)
PC++;
CLK( 3 );
break;
case 0x14: // DOP (CYCLES 4)
case 0x34: // DOP (CYCLES 4)
case 0x54: // DOP (CYCLES 4)
case 0x74: // DOP (CYCLES 4)
case 0xD4: // DOP (CYCLES 4)
case 0xF4: // DOP (CYCLES 4)
PC++;
CLK( 4 );
break;
case 0x0C: // TOP
case 0x1C: // TOP
case 0x3C: // TOP
case 0x5C: // TOP
case 0x7C: // TOP
case 0xDC: // TOP
case 0xFC: // TOP
PC+=2;
CLK( 4 );
break;
default: // Unknown Instruction
CLK( 2 );
#if 0
InfoNES_MessageBox( "0x%02x is unknown instruction.\n", byCode ) ;
#endif
break;
} /* end of switch ( byCode ) */
} /* end of while ... */
// Correct the number of the clocks
g_wPassedClocks -= wClocks;
}
void LICE_TexGen_Marble(LICE_IBitmap *dest, RECT *rect, float rv, float gv, float bv, float intensity)
{
int span=dest->getRowSpan();
int w = dest->getWidth();
int h = dest->getHeight();
int x = 0;
int y = 0;
if(rect)
{
x = rect->left;
y = rect->top;
w = rect->right - rect->left;
h = rect->bottom - rect->top;
}
if (x<0) { w+=x; x=0; }
if (y<0) { h+=y; y=0; }
if (x+w > dest->getWidth()) w=dest->getWidth()-x;
if (y+h > dest->getHeight()) h=dest->getHeight()-y;
if (w<1 || h<1) return;
LICE_pixel *startp = dest->getBits();
if (dest->isFlipped())
{
startp += x + (dest->getHeight()-1-y)*span;
span=-span;
}
else startp += x + y*span;
//simple 16bit marble noise generator
#define ROL(x,y) ((x<<(y))|(((unsigned short)x)>>(16-(y))))
#define ROR(x,y) ((((unsigned short)x)>>(y))|(x<<(16-(y))))
intensity/=1024.0f;
int maxc = 0;
{
LICE_pixel *p = startp;
short n1 = 0, n2 = 0;
for(int i=0;i<h;i++)
{
for(int j=0;j<w;j++)
{
n1 += n2;
n1 = ROL(n1, n2&0xf);
n2 += 2;
n2 = ROR(n2, 1);
int val = (int)(n1*intensity)+1;
LICE_pixel c = w;
LICE_pixel c2 = w/2;
if(i>0)
{
c = p[j-span];
if(j==0)
c2 = p[(w-1)-span];
else
c2 = p[(j-1)-span];
}
int pix = (((c + c2)/2) + val);
if(pix>maxc) maxc = pix;
p[j] = pix;
}
p+=span;
}
}
//normalize values and apply gamma
{
LICE_pixel *p = startp;
float sc=255.0f/maxc;
for(int i=0;i<h;i++)
{
for(int j=0;j<w;j++)
{
float col = (float)fabs(p[j]*sc);
p[j] = LICE_RGBA((int)(col*rv),(int)(col*gv),(int)(col*bv),255);
}
p+=span;
}
}
}
/* Test rotate macros */
int rotate_test(void)
{
ulong32 L32 = 0x12345678UL;
ulong64 L64 = CONST64(0x1122334455667788);
int err = 0;
/* ROR */
if (ROR(L32, 0 ) != 0x12345678UL) { fprintf(stderr, "ROR 0 failed\n"); err++; }
if (ROR(L32, 1 ) != 0x091a2b3cUL) { fprintf(stderr, "ROR 1 failed\n"); err++; }
if (ROR(L32, 2 ) != 0x048d159eUL) { fprintf(stderr, "ROR 2 failed\n"); err++; }
if (ROR(L32, 3 ) != 0x02468acfUL) { fprintf(stderr, "ROR 3 failed\n"); err++; }
if (ROR(L32, 4 ) != 0x81234567UL) { fprintf(stderr, "ROR 4 failed\n"); err++; }
if (ROR(L32, 5 ) != 0xc091a2b3UL) { fprintf(stderr, "ROR 5 failed\n"); err++; }
if (ROR(L32, 6 ) != 0xe048d159UL) { fprintf(stderr, "ROR 6 failed\n"); err++; }
if (ROR(L32, 7 ) != 0xf02468acUL) { fprintf(stderr, "ROR 7 failed\n"); err++; }
if (ROR(L32, 8 ) != 0x78123456UL) { fprintf(stderr, "ROR 8 failed\n"); err++; }
if (ROR(L32, 9 ) != 0x3c091a2bUL) { fprintf(stderr, "ROR 9 failed\n"); err++; }
if (ROR(L32, 10) != 0x9e048d15UL) { fprintf(stderr, "ROR 10 failed\n"); err++; }
if (ROR(L32, 11) != 0xcf02468aUL) { fprintf(stderr, "ROR 11 failed\n"); err++; }
if (ROR(L32, 12) != 0x67812345UL) { fprintf(stderr, "ROR 12 failed\n"); err++; }
if (ROR(L32, 13) != 0xb3c091a2UL) { fprintf(stderr, "ROR 13 failed\n"); err++; }
if (ROR(L32, 14) != 0x59e048d1UL) { fprintf(stderr, "ROR 14 failed\n"); err++; }
if (ROR(L32, 15) != 0xacf02468UL) { fprintf(stderr, "ROR 15 failed\n"); err++; }
if (ROR(L32, 16) != 0x56781234UL) { fprintf(stderr, "ROR 16 failed\n"); err++; }
if (ROR(L32, 17) != 0x2b3c091aUL) { fprintf(stderr, "ROR 17 failed\n"); err++; }
if (ROR(L32, 18) != 0x159e048dUL) { fprintf(stderr, "ROR 18 failed\n"); err++; }
if (ROR(L32, 19) != 0x8acf0246UL) { fprintf(stderr, "ROR 19 failed\n"); err++; }
if (ROR(L32, 20) != 0x45678123UL) { fprintf(stderr, "ROR 20 failed\n"); err++; }
if (ROR(L32, 21) != 0xa2b3c091UL) { fprintf(stderr, "ROR 21 failed\n"); err++; }
if (ROR(L32, 22) != 0xd159e048UL) { fprintf(stderr, "ROR 22 failed\n"); err++; }
if (ROR(L32, 23) != 0x68acf024UL) { fprintf(stderr, "ROR 23 failed\n"); err++; }
if (ROR(L32, 24) != 0x34567812UL) { fprintf(stderr, "ROR 24 failed\n"); err++; }
if (ROR(L32, 25) != 0x1a2b3c09UL) { fprintf(stderr, "ROR 25 failed\n"); err++; }
if (ROR(L32, 26) != 0x8d159e04UL) { fprintf(stderr, "ROR 26 failed\n"); err++; }
if (ROR(L32, 27) != 0x468acf02UL) { fprintf(stderr, "ROR 27 failed\n"); err++; }
if (ROR(L32, 28) != 0x23456781UL) { fprintf(stderr, "ROR 28 failed\n"); err++; }
if (ROR(L32, 29) != 0x91a2b3c0UL) { fprintf(stderr, "ROR 29 failed\n"); err++; }
if (ROR(L32, 30) != 0x48d159e0UL) { fprintf(stderr, "ROR 30 failed\n"); err++; }
if (ROR(L32, 31) != 0x2468acf0UL) { fprintf(stderr, "ROR 31 failed\n"); err++; }
/* ROR64 */
if (ROR64(L64, 0 ) != CONST64(0x1122334455667788)) { fprintf(stderr, "ROR64 0 failed\n"); err++; }
if (ROR64(L64, 1 ) != CONST64(0x089119a22ab33bc4)) { fprintf(stderr, "ROR64 1 failed\n"); err++; }
if (ROR64(L64, 2 ) != CONST64(0x04488cd115599de2)) { fprintf(stderr, "ROR64 2 failed\n"); err++; }
if (ROR64(L64, 3 ) != CONST64(0x022446688aaccef1)) { fprintf(stderr, "ROR64 3 failed\n"); err++; }
if (ROR64(L64, 4 ) != CONST64(0x8112233445566778)) { fprintf(stderr, "ROR64 4 failed\n"); err++; }
if (ROR64(L64, 5 ) != CONST64(0x4089119a22ab33bc)) { fprintf(stderr, "ROR64 5 failed\n"); err++; }
if (ROR64(L64, 6 ) != CONST64(0x204488cd115599de)) { fprintf(stderr, "ROR64 6 failed\n"); err++; }
if (ROR64(L64, 7 ) != CONST64(0x1022446688aaccef)) { fprintf(stderr, "ROR64 7 failed\n"); err++; }
if (ROR64(L64, 8 ) != CONST64(0x8811223344556677)) { fprintf(stderr, "ROR64 8 failed\n"); err++; }
if (ROR64(L64, 9 ) != CONST64(0xc4089119a22ab33b)) { fprintf(stderr, "ROR64 9 failed\n"); err++; }
if (ROR64(L64, 10) != CONST64(0xe204488cd115599d)) { fprintf(stderr, "ROR64 10 failed\n"); err++; }
if (ROR64(L64, 11) != CONST64(0xf1022446688aacce)) { fprintf(stderr, "ROR64 11 failed\n"); err++; }
if (ROR64(L64, 12) != CONST64(0x7881122334455667)) { fprintf(stderr, "ROR64 12 failed\n"); err++; }
if (ROR64(L64, 13) != CONST64(0xbc4089119a22ab33)) { fprintf(stderr, "ROR64 13 failed\n"); err++; }
if (ROR64(L64, 14) != CONST64(0xde204488cd115599)) { fprintf(stderr, "ROR64 14 failed\n"); err++; }
if (ROR64(L64, 15) != CONST64(0xef1022446688aacc)) { fprintf(stderr, "ROR64 15 failed\n"); err++; }
if (ROR64(L64, 16) != CONST64(0x7788112233445566)) { fprintf(stderr, "ROR64 16 failed\n"); err++; }
if (ROR64(L64, 17) != CONST64(0x3bc4089119a22ab3)) { fprintf(stderr, "ROR64 17 failed\n"); err++; }
if (ROR64(L64, 18) != CONST64(0x9de204488cd11559)) { fprintf(stderr, "ROR64 18 failed\n"); err++; }
if (ROR64(L64, 19) != CONST64(0xcef1022446688aac)) { fprintf(stderr, "ROR64 19 failed\n"); err++; }
if (ROR64(L64, 20) != CONST64(0x6778811223344556)) { fprintf(stderr, "ROR64 20 failed\n"); err++; }
if (ROR64(L64, 21) != CONST64(0x33bc4089119a22ab)) { fprintf(stderr, "ROR64 21 failed\n"); err++; }
if (ROR64(L64, 22) != CONST64(0x99de204488cd1155)) { fprintf(stderr, "ROR64 22 failed\n"); err++; }
if (ROR64(L64, 23) != CONST64(0xccef1022446688aa)) { fprintf(stderr, "ROR64 23 failed\n"); err++; }
if (ROR64(L64, 24) != CONST64(0x6677881122334455)) { fprintf(stderr, "ROR64 24 failed\n"); err++; }
if (ROR64(L64, 25) != CONST64(0xb33bc4089119a22a)) { fprintf(stderr, "ROR64 25 failed\n"); err++; }
if (ROR64(L64, 26) != CONST64(0x599de204488cd115)) { fprintf(stderr, "ROR64 26 failed\n"); err++; }
if (ROR64(L64, 27) != CONST64(0xaccef1022446688a)) { fprintf(stderr, "ROR64 27 failed\n"); err++; }
if (ROR64(L64, 28) != CONST64(0x5667788112233445)) { fprintf(stderr, "ROR64 28 failed\n"); err++; }
if (ROR64(L64, 29) != CONST64(0xab33bc4089119a22)) { fprintf(stderr, "ROR64 29 failed\n"); err++; }
if (ROR64(L64, 30) != CONST64(0x5599de204488cd11)) { fprintf(stderr, "ROR64 30 failed\n"); err++; }
if (ROR64(L64, 31) != CONST64(0xaaccef1022446688)) { fprintf(stderr, "ROR64 31 failed\n"); err++; }
if (ROR64(L64, 32) != CONST64(0x5566778811223344)) { fprintf(stderr, "ROR64 32 failed\n"); err++; }
if (ROR64(L64, 33) != CONST64(0x2ab33bc4089119a2)) { fprintf(stderr, "ROR64 33 failed\n"); err++; }
if (ROR64(L64, 34) != CONST64(0x15599de204488cd1)) { fprintf(stderr, "ROR64 34 failed\n"); err++; }
if (ROR64(L64, 35) != CONST64(0x8aaccef102244668)) { fprintf(stderr, "ROR64 35 failed\n"); err++; }
if (ROR64(L64, 36) != CONST64(0x4556677881122334)) { fprintf(stderr, "ROR64 36 failed\n"); err++; }
if (ROR64(L64, 37) != CONST64(0x22ab33bc4089119a)) { fprintf(stderr, "ROR64 37 failed\n"); err++; }
if (ROR64(L64, 38) != CONST64(0x115599de204488cd)) { fprintf(stderr, "ROR64 38 failed\n"); err++; }
if (ROR64(L64, 39) != CONST64(0x88aaccef10224466)) { fprintf(stderr, "ROR64 39 failed\n"); err++; }
if (ROR64(L64, 40) != CONST64(0x4455667788112233)) { fprintf(stderr, "ROR64 40 failed\n"); err++; }
if (ROR64(L64, 41) != CONST64(0xa22ab33bc4089119)) { fprintf(stderr, "ROR64 41 failed\n"); err++; }
if (ROR64(L64, 42) != CONST64(0xd115599de204488c)) { fprintf(stderr, "ROR64 42 failed\n"); err++; }
if (ROR64(L64, 43) != CONST64(0x688aaccef1022446)) { fprintf(stderr, "ROR64 43 failed\n"); err++; }
if (ROR64(L64, 44) != CONST64(0x3445566778811223)) { fprintf(stderr, "ROR64 44 failed\n"); err++; }
if (ROR64(L64, 45) != CONST64(0x9a22ab33bc408911)) { fprintf(stderr, "ROR64 45 failed\n"); err++; }
if (ROR64(L64, 46) != CONST64(0xcd115599de204488)) { fprintf(stderr, "ROR64 46 failed\n"); err++; }
if (ROR64(L64, 47) != CONST64(0x6688aaccef102244)) { fprintf(stderr, "ROR64 47 failed\n"); err++; }
if (ROR64(L64, 48) != CONST64(0x3344556677881122)) { fprintf(stderr, "ROR64 48 failed\n"); err++; }
if (ROR64(L64, 49) != CONST64(0x19a22ab33bc40891)) { fprintf(stderr, "ROR64 49 failed\n"); err++; }
if (ROR64(L64, 50) != CONST64(0x8cd115599de20448)) { fprintf(stderr, "ROR64 50 failed\n"); err++; }
if (ROR64(L64, 51) != CONST64(0x46688aaccef10224)) { fprintf(stderr, "ROR64 51 failed\n"); err++; }
if (ROR64(L64, 52) != CONST64(0x2334455667788112)) { fprintf(stderr, "ROR64 52 failed\n"); err++; }
if (ROR64(L64, 53) != CONST64(0x119a22ab33bc4089)) { fprintf(stderr, "ROR64 53 failed\n"); err++; }
if (ROR64(L64, 54) != CONST64(0x88cd115599de2044)) { fprintf(stderr, "ROR64 54 failed\n"); err++; }
if (ROR64(L64, 55) != CONST64(0x446688aaccef1022)) { fprintf(stderr, "ROR64 55 failed\n"); err++; }
if (ROR64(L64, 56) != CONST64(0x2233445566778811)) { fprintf(stderr, "ROR64 56 failed\n"); err++; }
if (ROR64(L64, 57) != CONST64(0x9119a22ab33bc408)) { fprintf(stderr, "ROR64 57 failed\n"); err++; }
if (ROR64(L64, 58) != CONST64(0x488cd115599de204)) { fprintf(stderr, "ROR64 58 failed\n"); err++; }
if (ROR64(L64, 59) != CONST64(0x2446688aaccef102)) { fprintf(stderr, "ROR64 59 failed\n"); err++; }
if (ROR64(L64, 60) != CONST64(0x1223344556677881)) { fprintf(stderr, "ROR64 60 failed\n"); err++; }
if (ROR64(L64, 61) != CONST64(0x89119a22ab33bc40)) { fprintf(stderr, "ROR64 61 failed\n"); err++; }
if (ROR64(L64, 62) != CONST64(0x4488cd115599de20)) { fprintf(stderr, "ROR64 62 failed\n"); err++; }
if (ROR64(L64, 63) != CONST64(0x22446688aaccef10)) { fprintf(stderr, "ROR64 63 failed\n"); err++; }
/* ROL */
if (ROL(L32, 0 ) != 0x12345678UL) { fprintf(stderr, "ROL 0 failed\n"); err++; }
if (ROL(L32, 1 ) != 0x2468acf0UL) { fprintf(stderr, "ROL 1 failed\n"); err++; }
if (ROL(L32, 2 ) != 0x48d159e0UL) { fprintf(stderr, "ROL 2 failed\n"); err++; }
if (ROL(L32, 3 ) != 0x91a2b3c0UL) { fprintf(stderr, "ROL 3 failed\n"); err++; }
if (ROL(L32, 4 ) != 0x23456781UL) { fprintf(stderr, "ROL 4 failed\n"); err++; }
if (ROL(L32, 5 ) != 0x468acf02UL) { fprintf(stderr, "ROL 5 failed\n"); err++; }
if (ROL(L32, 6 ) != 0x8d159e04UL) { fprintf(stderr, "ROL 6 failed\n"); err++; }
if (ROL(L32, 7 ) != 0x1a2b3c09UL) { fprintf(stderr, "ROL 7 failed\n"); err++; }
if (ROL(L32, 8 ) != 0x34567812UL) { fprintf(stderr, "ROL 8 failed\n"); err++; }
if (ROL(L32, 9 ) != 0x68acf024UL) { fprintf(stderr, "ROL 9 failed\n"); err++; }
if (ROL(L32, 10) != 0xd159e048UL) { fprintf(stderr, "ROL 10 failed\n"); err++; }
if (ROL(L32, 11) != 0xa2b3c091UL) { fprintf(stderr, "ROL 11 failed\n"); err++; }
if (ROL(L32, 12) != 0x45678123UL) { fprintf(stderr, "ROL 12 failed\n"); err++; }
if (ROL(L32, 13) != 0x8acf0246UL) { fprintf(stderr, "ROL 13 failed\n"); err++; }
if (ROL(L32, 14) != 0x159e048dUL) { fprintf(stderr, "ROL 14 failed\n"); err++; }
if (ROL(L32, 15) != 0x2b3c091aUL) { fprintf(stderr, "ROL 15 failed\n"); err++; }
if (ROL(L32, 16) != 0x56781234UL) { fprintf(stderr, "ROL 16 failed\n"); err++; }
if (ROL(L32, 17) != 0xacf02468UL) { fprintf(stderr, "ROL 17 failed\n"); err++; }
if (ROL(L32, 18) != 0x59e048d1UL) { fprintf(stderr, "ROL 18 failed\n"); err++; }
if (ROL(L32, 19) != 0xb3c091a2UL) { fprintf(stderr, "ROL 19 failed\n"); err++; }
if (ROL(L32, 20) != 0x67812345UL) { fprintf(stderr, "ROL 20 failed\n"); err++; }
if (ROL(L32, 21) != 0xcf02468aUL) { fprintf(stderr, "ROL 21 failed\n"); err++; }
if (ROL(L32, 22) != 0x9e048d15UL) { fprintf(stderr, "ROL 22 failed\n"); err++; }
if (ROL(L32, 23) != 0x3c091a2bUL) { fprintf(stderr, "ROL 23 failed\n"); err++; }
if (ROL(L32, 24) != 0x78123456UL) { fprintf(stderr, "ROL 24 failed\n"); err++; }
if (ROL(L32, 25) != 0xf02468acUL) { fprintf(stderr, "ROL 25 failed\n"); err++; }
if (ROL(L32, 26) != 0xe048d159UL) { fprintf(stderr, "ROL 26 failed\n"); err++; }
if (ROL(L32, 27) != 0xc091a2b3UL) { fprintf(stderr, "ROL 27 failed\n"); err++; }
if (ROL(L32, 28) != 0x81234567UL) { fprintf(stderr, "ROL 28 failed\n"); err++; }
if (ROL(L32, 29) != 0x02468acfUL) { fprintf(stderr, "ROL 29 failed\n"); err++; }
if (ROL(L32, 30) != 0x048d159eUL) { fprintf(stderr, "ROL 30 failed\n"); err++; }
if (ROL(L32, 31) != 0x091a2b3cUL) { fprintf(stderr, "ROL 31 failed\n"); err++; }
/* ROL64 */
if (ROL64(L64, 0 ) != CONST64(0x1122334455667788)) { fprintf(stderr, "ROL64 0 failed\n"); err++; }
if (ROL64(L64, 1 ) != CONST64(0x22446688aaccef10)) { fprintf(stderr, "ROL64 1 failed\n"); err++; }
if (ROL64(L64, 2 ) != CONST64(0x4488cd115599de20)) { fprintf(stderr, "ROL64 2 failed\n"); err++; }
if (ROL64(L64, 3 ) != CONST64(0x89119a22ab33bc40)) { fprintf(stderr, "ROL64 3 failed\n"); err++; }
if (ROL64(L64, 4 ) != CONST64(0x1223344556677881)) { fprintf(stderr, "ROL64 4 failed\n"); err++; }
if (ROL64(L64, 5 ) != CONST64(0x2446688aaccef102)) { fprintf(stderr, "ROL64 5 failed\n"); err++; }
if (ROL64(L64, 6 ) != CONST64(0x488cd115599de204)) { fprintf(stderr, "ROL64 6 failed\n"); err++; }
if (ROL64(L64, 7 ) != CONST64(0x9119a22ab33bc408)) { fprintf(stderr, "ROL64 7 failed\n"); err++; }
if (ROL64(L64, 8 ) != CONST64(0x2233445566778811)) { fprintf(stderr, "ROL64 8 failed\n"); err++; }
if (ROL64(L64, 9 ) != CONST64(0x446688aaccef1022)) { fprintf(stderr, "ROL64 9 failed\n"); err++; }
if (ROL64(L64, 10) != CONST64(0x88cd115599de2044)) { fprintf(stderr, "ROL64 10 failed\n"); err++; }
if (ROL64(L64, 11) != CONST64(0x119a22ab33bc4089)) { fprintf(stderr, "ROL64 11 failed\n"); err++; }
if (ROL64(L64, 12) != CONST64(0x2334455667788112)) { fprintf(stderr, "ROL64 12 failed\n"); err++; }
if (ROL64(L64, 13) != CONST64(0x46688aaccef10224)) { fprintf(stderr, "ROL64 13 failed\n"); err++; }
if (ROL64(L64, 14) != CONST64(0x8cd115599de20448)) { fprintf(stderr, "ROL64 14 failed\n"); err++; }
if (ROL64(L64, 15) != CONST64(0x19a22ab33bc40891)) { fprintf(stderr, "ROL64 15 failed\n"); err++; }
if (ROL64(L64, 16) != CONST64(0x3344556677881122)) { fprintf(stderr, "ROL64 16 failed\n"); err++; }
if (ROL64(L64, 17) != CONST64(0x6688aaccef102244)) { fprintf(stderr, "ROL64 17 failed\n"); err++; }
if (ROL64(L64, 18) != CONST64(0xcd115599de204488)) { fprintf(stderr, "ROL64 18 failed\n"); err++; }
if (ROL64(L64, 19) != CONST64(0x9a22ab33bc408911)) { fprintf(stderr, "ROL64 19 failed\n"); err++; }
if (ROL64(L64, 20) != CONST64(0x3445566778811223)) { fprintf(stderr, "ROL64 20 failed\n"); err++; }
if (ROL64(L64, 21) != CONST64(0x688aaccef1022446)) { fprintf(stderr, "ROL64 21 failed\n"); err++; }
if (ROL64(L64, 22) != CONST64(0xd115599de204488c)) { fprintf(stderr, "ROL64 22 failed\n"); err++; }
if (ROL64(L64, 23) != CONST64(0xa22ab33bc4089119)) { fprintf(stderr, "ROL64 23 failed\n"); err++; }
if (ROL64(L64, 24) != CONST64(0x4455667788112233)) { fprintf(stderr, "ROL64 24 failed\n"); err++; }
if (ROL64(L64, 25) != CONST64(0x88aaccef10224466)) { fprintf(stderr, "ROL64 25 failed\n"); err++; }
if (ROL64(L64, 26) != CONST64(0x115599de204488cd)) { fprintf(stderr, "ROL64 26 failed\n"); err++; }
if (ROL64(L64, 27) != CONST64(0x22ab33bc4089119a)) { fprintf(stderr, "ROL64 27 failed\n"); err++; }
if (ROL64(L64, 28) != CONST64(0x4556677881122334)) { fprintf(stderr, "ROL64 28 failed\n"); err++; }
if (ROL64(L64, 29) != CONST64(0x8aaccef102244668)) { fprintf(stderr, "ROL64 29 failed\n"); err++; }
if (ROL64(L64, 30) != CONST64(0x15599de204488cd1)) { fprintf(stderr, "ROL64 30 failed\n"); err++; }
if (ROL64(L64, 31) != CONST64(0x2ab33bc4089119a2)) { fprintf(stderr, "ROL64 31 failed\n"); err++; }
if (ROL64(L64, 32) != CONST64(0x5566778811223344)) { fprintf(stderr, "ROL64 32 failed\n"); err++; }
if (ROL64(L64, 33) != CONST64(0xaaccef1022446688)) { fprintf(stderr, "ROL64 33 failed\n"); err++; }
if (ROL64(L64, 34) != CONST64(0x5599de204488cd11)) { fprintf(stderr, "ROL64 34 failed\n"); err++; }
if (ROL64(L64, 35) != CONST64(0xab33bc4089119a22)) { fprintf(stderr, "ROL64 35 failed\n"); err++; }
if (ROL64(L64, 36) != CONST64(0x5667788112233445)) { fprintf(stderr, "ROL64 36 failed\n"); err++; }
if (ROL64(L64, 37) != CONST64(0xaccef1022446688a)) { fprintf(stderr, "ROL64 37 failed\n"); err++; }
if (ROL64(L64, 38) != CONST64(0x599de204488cd115)) { fprintf(stderr, "ROL64 38 failed\n"); err++; }
if (ROL64(L64, 39) != CONST64(0xb33bc4089119a22a)) { fprintf(stderr, "ROL64 39 failed\n"); err++; }
if (ROL64(L64, 40) != CONST64(0x6677881122334455)) { fprintf(stderr, "ROL64 40 failed\n"); err++; }
if (ROL64(L64, 41) != CONST64(0xccef1022446688aa)) { fprintf(stderr, "ROL64 41 failed\n"); err++; }
if (ROL64(L64, 42) != CONST64(0x99de204488cd1155)) { fprintf(stderr, "ROL64 42 failed\n"); err++; }
if (ROL64(L64, 43) != CONST64(0x33bc4089119a22ab)) { fprintf(stderr, "ROL64 43 failed\n"); err++; }
if (ROL64(L64, 44) != CONST64(0x6778811223344556)) { fprintf(stderr, "ROL64 44 failed\n"); err++; }
if (ROL64(L64, 45) != CONST64(0xcef1022446688aac)) { fprintf(stderr, "ROL64 45 failed\n"); err++; }
if (ROL64(L64, 46) != CONST64(0x9de204488cd11559)) { fprintf(stderr, "ROL64 46 failed\n"); err++; }
if (ROL64(L64, 47) != CONST64(0x3bc4089119a22ab3)) { fprintf(stderr, "ROL64 47 failed\n"); err++; }
if (ROL64(L64, 48) != CONST64(0x7788112233445566)) { fprintf(stderr, "ROL64 48 failed\n"); err++; }
if (ROL64(L64, 49) != CONST64(0xef1022446688aacc)) { fprintf(stderr, "ROL64 49 failed\n"); err++; }
if (ROL64(L64, 50) != CONST64(0xde204488cd115599)) { fprintf(stderr, "ROL64 50 failed\n"); err++; }
if (ROL64(L64, 51) != CONST64(0xbc4089119a22ab33)) { fprintf(stderr, "ROL64 51 failed\n"); err++; }
if (ROL64(L64, 52) != CONST64(0x7881122334455667)) { fprintf(stderr, "ROL64 52 failed\n"); err++; }
if (ROL64(L64, 53) != CONST64(0xf1022446688aacce)) { fprintf(stderr, "ROL64 53 failed\n"); err++; }
if (ROL64(L64, 54) != CONST64(0xe204488cd115599d)) { fprintf(stderr, "ROL64 54 failed\n"); err++; }
if (ROL64(L64, 55) != CONST64(0xc4089119a22ab33b)) { fprintf(stderr, "ROL64 55 failed\n"); err++; }
if (ROL64(L64, 56) != CONST64(0x8811223344556677)) { fprintf(stderr, "ROL64 56 failed\n"); err++; }
if (ROL64(L64, 57) != CONST64(0x1022446688aaccef)) { fprintf(stderr, "ROL64 57 failed\n"); err++; }
if (ROL64(L64, 58) != CONST64(0x204488cd115599de)) { fprintf(stderr, "ROL64 58 failed\n"); err++; }
if (ROL64(L64, 59) != CONST64(0x4089119a22ab33bc)) { fprintf(stderr, "ROL64 59 failed\n"); err++; }
if (ROL64(L64, 60) != CONST64(0x8112233445566778)) { fprintf(stderr, "ROL64 60 failed\n"); err++; }
if (ROL64(L64, 61) != CONST64(0x022446688aaccef1)) { fprintf(stderr, "ROL64 61 failed\n"); err++; }
if (ROL64(L64, 62) != CONST64(0x04488cd115599de2)) { fprintf(stderr, "ROL64 62 failed\n"); err++; }
if (ROL64(L64, 63) != CONST64(0x089119a22ab33bc4)) { fprintf(stderr, "ROL64 63 failed\n"); err++; }
/* RORc */
if (RORc(L32, 0 ) != 0x12345678UL) { fprintf(stderr, "RORc 0 failed\n"); err++; }
if (RORc(L32, 1 ) != 0x091a2b3cUL) { fprintf(stderr, "RORc 1 failed\n"); err++; }
if (RORc(L32, 2 ) != 0x048d159eUL) { fprintf(stderr, "RORc 2 failed\n"); err++; }
if (RORc(L32, 3 ) != 0x02468acfUL) { fprintf(stderr, "RORc 3 failed\n"); err++; }
if (RORc(L32, 4 ) != 0x81234567UL) { fprintf(stderr, "RORc 4 failed\n"); err++; }
if (RORc(L32, 5 ) != 0xc091a2b3UL) { fprintf(stderr, "RORc 5 failed\n"); err++; }
if (RORc(L32, 6 ) != 0xe048d159UL) { fprintf(stderr, "RORc 6 failed\n"); err++; }
if (RORc(L32, 7 ) != 0xf02468acUL) { fprintf(stderr, "RORc 7 failed\n"); err++; }
if (RORc(L32, 8 ) != 0x78123456UL) { fprintf(stderr, "RORc 8 failed\n"); err++; }
if (RORc(L32, 9 ) != 0x3c091a2bUL) { fprintf(stderr, "RORc 9 failed\n"); err++; }
if (RORc(L32, 10) != 0x9e048d15UL) { fprintf(stderr, "RORc 10 failed\n"); err++; }
if (RORc(L32, 11) != 0xcf02468aUL) { fprintf(stderr, "RORc 11 failed\n"); err++; }
if (RORc(L32, 12) != 0x67812345UL) { fprintf(stderr, "RORc 12 failed\n"); err++; }
if (RORc(L32, 13) != 0xb3c091a2UL) { fprintf(stderr, "RORc 13 failed\n"); err++; }
if (RORc(L32, 14) != 0x59e048d1UL) { fprintf(stderr, "RORc 14 failed\n"); err++; }
if (RORc(L32, 15) != 0xacf02468UL) { fprintf(stderr, "RORc 15 failed\n"); err++; }
if (RORc(L32, 16) != 0x56781234UL) { fprintf(stderr, "RORc 16 failed\n"); err++; }
if (RORc(L32, 17) != 0x2b3c091aUL) { fprintf(stderr, "RORc 17 failed\n"); err++; }
if (RORc(L32, 18) != 0x159e048dUL) { fprintf(stderr, "RORc 18 failed\n"); err++; }
if (RORc(L32, 19) != 0x8acf0246UL) { fprintf(stderr, "RORc 19 failed\n"); err++; }
if (RORc(L32, 20) != 0x45678123UL) { fprintf(stderr, "RORc 20 failed\n"); err++; }
if (RORc(L32, 21) != 0xa2b3c091UL) { fprintf(stderr, "RORc 21 failed\n"); err++; }
if (RORc(L32, 22) != 0xd159e048UL) { fprintf(stderr, "RORc 22 failed\n"); err++; }
if (RORc(L32, 23) != 0x68acf024UL) { fprintf(stderr, "RORc 23 failed\n"); err++; }
if (RORc(L32, 24) != 0x34567812UL) { fprintf(stderr, "RORc 24 failed\n"); err++; }
if (RORc(L32, 25) != 0x1a2b3c09UL) { fprintf(stderr, "RORc 25 failed\n"); err++; }
if (RORc(L32, 26) != 0x8d159e04UL) { fprintf(stderr, "RORc 26 failed\n"); err++; }
if (RORc(L32, 27) != 0x468acf02UL) { fprintf(stderr, "RORc 27 failed\n"); err++; }
if (RORc(L32, 28) != 0x23456781UL) { fprintf(stderr, "RORc 28 failed\n"); err++; }
if (RORc(L32, 29) != 0x91a2b3c0UL) { fprintf(stderr, "RORc 29 failed\n"); err++; }
if (RORc(L32, 30) != 0x48d159e0UL) { fprintf(stderr, "RORc 30 failed\n"); err++; }
if (RORc(L32, 31) != 0x2468acf0UL) { fprintf(stderr, "RORc 31 failed\n"); err++; }
/* ROR64c */
if (ROR64c(L64, 0 ) != CONST64(0x1122334455667788)) { fprintf(stderr, "ROR64c 0 failed\n"); err++; }
if (ROR64c(L64, 1 ) != CONST64(0x089119a22ab33bc4)) { fprintf(stderr, "ROR64c 1 failed\n"); err++; }
if (ROR64c(L64, 2 ) != CONST64(0x04488cd115599de2)) { fprintf(stderr, "ROR64c 2 failed\n"); err++; }
if (ROR64c(L64, 3 ) != CONST64(0x022446688aaccef1)) { fprintf(stderr, "ROR64c 3 failed\n"); err++; }
if (ROR64c(L64, 4 ) != CONST64(0x8112233445566778)) { fprintf(stderr, "ROR64c 4 failed\n"); err++; }
if (ROR64c(L64, 5 ) != CONST64(0x4089119a22ab33bc)) { fprintf(stderr, "ROR64c 5 failed\n"); err++; }
if (ROR64c(L64, 6 ) != CONST64(0x204488cd115599de)) { fprintf(stderr, "ROR64c 6 failed\n"); err++; }
if (ROR64c(L64, 7 ) != CONST64(0x1022446688aaccef)) { fprintf(stderr, "ROR64c 7 failed\n"); err++; }
if (ROR64c(L64, 8 ) != CONST64(0x8811223344556677)) { fprintf(stderr, "ROR64c 8 failed\n"); err++; }
if (ROR64c(L64, 9 ) != CONST64(0xc4089119a22ab33b)) { fprintf(stderr, "ROR64c 9 failed\n"); err++; }
if (ROR64c(L64, 10) != CONST64(0xe204488cd115599d)) { fprintf(stderr, "ROR64c 10 failed\n"); err++; }
if (ROR64c(L64, 11) != CONST64(0xf1022446688aacce)) { fprintf(stderr, "ROR64c 11 failed\n"); err++; }
if (ROR64c(L64, 12) != CONST64(0x7881122334455667)) { fprintf(stderr, "ROR64c 12 failed\n"); err++; }
if (ROR64c(L64, 13) != CONST64(0xbc4089119a22ab33)) { fprintf(stderr, "ROR64c 13 failed\n"); err++; }
if (ROR64c(L64, 14) != CONST64(0xde204488cd115599)) { fprintf(stderr, "ROR64c 14 failed\n"); err++; }
if (ROR64c(L64, 15) != CONST64(0xef1022446688aacc)) { fprintf(stderr, "ROR64c 15 failed\n"); err++; }
if (ROR64c(L64, 16) != CONST64(0x7788112233445566)) { fprintf(stderr, "ROR64c 16 failed\n"); err++; }
if (ROR64c(L64, 17) != CONST64(0x3bc4089119a22ab3)) { fprintf(stderr, "ROR64c 17 failed\n"); err++; }
if (ROR64c(L64, 18) != CONST64(0x9de204488cd11559)) { fprintf(stderr, "ROR64c 18 failed\n"); err++; }
if (ROR64c(L64, 19) != CONST64(0xcef1022446688aac)) { fprintf(stderr, "ROR64c 19 failed\n"); err++; }
if (ROR64c(L64, 20) != CONST64(0x6778811223344556)) { fprintf(stderr, "ROR64c 20 failed\n"); err++; }
if (ROR64c(L64, 21) != CONST64(0x33bc4089119a22ab)) { fprintf(stderr, "ROR64c 21 failed\n"); err++; }
if (ROR64c(L64, 22) != CONST64(0x99de204488cd1155)) { fprintf(stderr, "ROR64c 22 failed\n"); err++; }
if (ROR64c(L64, 23) != CONST64(0xccef1022446688aa)) { fprintf(stderr, "ROR64c 23 failed\n"); err++; }
if (ROR64c(L64, 24) != CONST64(0x6677881122334455)) { fprintf(stderr, "ROR64c 24 failed\n"); err++; }
if (ROR64c(L64, 25) != CONST64(0xb33bc4089119a22a)) { fprintf(stderr, "ROR64c 25 failed\n"); err++; }
if (ROR64c(L64, 26) != CONST64(0x599de204488cd115)) { fprintf(stderr, "ROR64c 26 failed\n"); err++; }
if (ROR64c(L64, 27) != CONST64(0xaccef1022446688a)) { fprintf(stderr, "ROR64c 27 failed\n"); err++; }
if (ROR64c(L64, 28) != CONST64(0x5667788112233445)) { fprintf(stderr, "ROR64c 28 failed\n"); err++; }
if (ROR64c(L64, 29) != CONST64(0xab33bc4089119a22)) { fprintf(stderr, "ROR64c 29 failed\n"); err++; }
if (ROR64c(L64, 30) != CONST64(0x5599de204488cd11)) { fprintf(stderr, "ROR64c 30 failed\n"); err++; }
if (ROR64c(L64, 31) != CONST64(0xaaccef1022446688)) { fprintf(stderr, "ROR64c 31 failed\n"); err++; }
if (ROR64c(L64, 32) != CONST64(0x5566778811223344)) { fprintf(stderr, "ROR64c 32 failed\n"); err++; }
if (ROR64c(L64, 33) != CONST64(0x2ab33bc4089119a2)) { fprintf(stderr, "ROR64c 33 failed\n"); err++; }
if (ROR64c(L64, 34) != CONST64(0x15599de204488cd1)) { fprintf(stderr, "ROR64c 34 failed\n"); err++; }
if (ROR64c(L64, 35) != CONST64(0x8aaccef102244668)) { fprintf(stderr, "ROR64c 35 failed\n"); err++; }
if (ROR64c(L64, 36) != CONST64(0x4556677881122334)) { fprintf(stderr, "ROR64c 36 failed\n"); err++; }
if (ROR64c(L64, 37) != CONST64(0x22ab33bc4089119a)) { fprintf(stderr, "ROR64c 37 failed\n"); err++; }
if (ROR64c(L64, 38) != CONST64(0x115599de204488cd)) { fprintf(stderr, "ROR64c 38 failed\n"); err++; }
if (ROR64c(L64, 39) != CONST64(0x88aaccef10224466)) { fprintf(stderr, "ROR64c 39 failed\n"); err++; }
if (ROR64c(L64, 40) != CONST64(0x4455667788112233)) { fprintf(stderr, "ROR64c 40 failed\n"); err++; }
if (ROR64c(L64, 41) != CONST64(0xa22ab33bc4089119)) { fprintf(stderr, "ROR64c 41 failed\n"); err++; }
if (ROR64c(L64, 42) != CONST64(0xd115599de204488c)) { fprintf(stderr, "ROR64c 42 failed\n"); err++; }
if (ROR64c(L64, 43) != CONST64(0x688aaccef1022446)) { fprintf(stderr, "ROR64c 43 failed\n"); err++; }
if (ROR64c(L64, 44) != CONST64(0x3445566778811223)) { fprintf(stderr, "ROR64c 44 failed\n"); err++; }
if (ROR64c(L64, 45) != CONST64(0x9a22ab33bc408911)) { fprintf(stderr, "ROR64c 45 failed\n"); err++; }
if (ROR64c(L64, 46) != CONST64(0xcd115599de204488)) { fprintf(stderr, "ROR64c 46 failed\n"); err++; }
if (ROR64c(L64, 47) != CONST64(0x6688aaccef102244)) { fprintf(stderr, "ROR64c 47 failed\n"); err++; }
if (ROR64c(L64, 48) != CONST64(0x3344556677881122)) { fprintf(stderr, "ROR64c 48 failed\n"); err++; }
if (ROR64c(L64, 49) != CONST64(0x19a22ab33bc40891)) { fprintf(stderr, "ROR64c 49 failed\n"); err++; }
if (ROR64c(L64, 50) != CONST64(0x8cd115599de20448)) { fprintf(stderr, "ROR64c 50 failed\n"); err++; }
if (ROR64c(L64, 51) != CONST64(0x46688aaccef10224)) { fprintf(stderr, "ROR64c 51 failed\n"); err++; }
if (ROR64c(L64, 52) != CONST64(0x2334455667788112)) { fprintf(stderr, "ROR64c 52 failed\n"); err++; }
if (ROR64c(L64, 53) != CONST64(0x119a22ab33bc4089)) { fprintf(stderr, "ROR64c 53 failed\n"); err++; }
if (ROR64c(L64, 54) != CONST64(0x88cd115599de2044)) { fprintf(stderr, "ROR64c 54 failed\n"); err++; }
if (ROR64c(L64, 55) != CONST64(0x446688aaccef1022)) { fprintf(stderr, "ROR64c 55 failed\n"); err++; }
if (ROR64c(L64, 56) != CONST64(0x2233445566778811)) { fprintf(stderr, "ROR64c 56 failed\n"); err++; }
if (ROR64c(L64, 57) != CONST64(0x9119a22ab33bc408)) { fprintf(stderr, "ROR64c 57 failed\n"); err++; }
if (ROR64c(L64, 58) != CONST64(0x488cd115599de204)) { fprintf(stderr, "ROR64c 58 failed\n"); err++; }
if (ROR64c(L64, 59) != CONST64(0x2446688aaccef102)) { fprintf(stderr, "ROR64c 59 failed\n"); err++; }
if (ROR64c(L64, 60) != CONST64(0x1223344556677881)) { fprintf(stderr, "ROR64c 60 failed\n"); err++; }
if (ROR64c(L64, 61) != CONST64(0x89119a22ab33bc40)) { fprintf(stderr, "ROR64c 61 failed\n"); err++; }
if (ROR64c(L64, 62) != CONST64(0x4488cd115599de20)) { fprintf(stderr, "ROR64c 62 failed\n"); err++; }
if (ROR64c(L64, 63) != CONST64(0x22446688aaccef10)) { fprintf(stderr, "ROR64c 63 failed\n"); err++; }
/* ROLc */
if (ROLc(L32, 0 ) != 0x12345678UL) { fprintf(stderr, "ROLc 0 failed\n"); err++; }
if (ROLc(L32, 1 ) != 0x2468acf0UL) { fprintf(stderr, "ROLc 1 failed\n"); err++; }
if (ROLc(L32, 2 ) != 0x48d159e0UL) { fprintf(stderr, "ROLc 2 failed\n"); err++; }
if (ROLc(L32, 3 ) != 0x91a2b3c0UL) { fprintf(stderr, "ROLc 3 failed\n"); err++; }
if (ROLc(L32, 4 ) != 0x23456781UL) { fprintf(stderr, "ROLc 4 failed\n"); err++; }
if (ROLc(L32, 5 ) != 0x468acf02UL) { fprintf(stderr, "ROLc 5 failed\n"); err++; }
if (ROLc(L32, 6 ) != 0x8d159e04UL) { fprintf(stderr, "ROLc 6 failed\n"); err++; }
if (ROLc(L32, 7 ) != 0x1a2b3c09UL) { fprintf(stderr, "ROLc 7 failed\n"); err++; }
if (ROLc(L32, 8 ) != 0x34567812UL) { fprintf(stderr, "ROLc 8 failed\n"); err++; }
if (ROLc(L32, 9 ) != 0x68acf024UL) { fprintf(stderr, "ROLc 9 failed\n"); err++; }
if (ROLc(L32, 10) != 0xd159e048UL) { fprintf(stderr, "ROLc 10 failed\n"); err++; }
if (ROLc(L32, 11) != 0xa2b3c091UL) { fprintf(stderr, "ROLc 11 failed\n"); err++; }
if (ROLc(L32, 12) != 0x45678123UL) { fprintf(stderr, "ROLc 12 failed\n"); err++; }
if (ROLc(L32, 13) != 0x8acf0246UL) { fprintf(stderr, "ROLc 13 failed\n"); err++; }
if (ROLc(L32, 14) != 0x159e048dUL) { fprintf(stderr, "ROLc 14 failed\n"); err++; }
if (ROLc(L32, 15) != 0x2b3c091aUL) { fprintf(stderr, "ROLc 15 failed\n"); err++; }
if (ROLc(L32, 16) != 0x56781234UL) { fprintf(stderr, "ROLc 16 failed\n"); err++; }
if (ROLc(L32, 17) != 0xacf02468UL) { fprintf(stderr, "ROLc 17 failed\n"); err++; }
if (ROLc(L32, 18) != 0x59e048d1UL) { fprintf(stderr, "ROLc 18 failed\n"); err++; }
if (ROLc(L32, 19) != 0xb3c091a2UL) { fprintf(stderr, "ROLc 19 failed\n"); err++; }
if (ROLc(L32, 20) != 0x67812345UL) { fprintf(stderr, "ROLc 20 failed\n"); err++; }
if (ROLc(L32, 21) != 0xcf02468aUL) { fprintf(stderr, "ROLc 21 failed\n"); err++; }
if (ROLc(L32, 22) != 0x9e048d15UL) { fprintf(stderr, "ROLc 22 failed\n"); err++; }
if (ROLc(L32, 23) != 0x3c091a2bUL) { fprintf(stderr, "ROLc 23 failed\n"); err++; }
if (ROLc(L32, 24) != 0x78123456UL) { fprintf(stderr, "ROLc 24 failed\n"); err++; }
if (ROLc(L32, 25) != 0xf02468acUL) { fprintf(stderr, "ROLc 25 failed\n"); err++; }
if (ROLc(L32, 26) != 0xe048d159UL) { fprintf(stderr, "ROLc 26 failed\n"); err++; }
if (ROLc(L32, 27) != 0xc091a2b3UL) { fprintf(stderr, "ROLc 27 failed\n"); err++; }
if (ROLc(L32, 28) != 0x81234567UL) { fprintf(stderr, "ROLc 28 failed\n"); err++; }
if (ROLc(L32, 29) != 0x02468acfUL) { fprintf(stderr, "ROLc 29 failed\n"); err++; }
if (ROLc(L32, 30) != 0x048d159eUL) { fprintf(stderr, "ROLc 30 failed\n"); err++; }
if (ROLc(L32, 31) != 0x091a2b3cUL) { fprintf(stderr, "ROLc 31 failed\n"); err++; }
/* ROL64c */
if (ROL64c(L64, 0 ) != CONST64(0x1122334455667788)) { fprintf(stderr, "ROL64c 0 failed\n"); err++; }
if (ROL64c(L64, 1 ) != CONST64(0x22446688aaccef10)) { fprintf(stderr, "ROL64c 1 failed\n"); err++; }
if (ROL64c(L64, 2 ) != CONST64(0x4488cd115599de20)) { fprintf(stderr, "ROL64c 2 failed\n"); err++; }
if (ROL64c(L64, 3 ) != CONST64(0x89119a22ab33bc40)) { fprintf(stderr, "ROL64c 3 failed\n"); err++; }
if (ROL64c(L64, 4 ) != CONST64(0x1223344556677881)) { fprintf(stderr, "ROL64c 4 failed\n"); err++; }
if (ROL64c(L64, 5 ) != CONST64(0x2446688aaccef102)) { fprintf(stderr, "ROL64c 5 failed\n"); err++; }
if (ROL64c(L64, 6 ) != CONST64(0x488cd115599de204)) { fprintf(stderr, "ROL64c 6 failed\n"); err++; }
if (ROL64c(L64, 7 ) != CONST64(0x9119a22ab33bc408)) { fprintf(stderr, "ROL64c 7 failed\n"); err++; }
if (ROL64c(L64, 8 ) != CONST64(0x2233445566778811)) { fprintf(stderr, "ROL64c 8 failed\n"); err++; }
if (ROL64c(L64, 9 ) != CONST64(0x446688aaccef1022)) { fprintf(stderr, "ROL64c 9 failed\n"); err++; }
if (ROL64c(L64, 10) != CONST64(0x88cd115599de2044)) { fprintf(stderr, "ROL64c 10 failed\n"); err++; }
if (ROL64c(L64, 11) != CONST64(0x119a22ab33bc4089)) { fprintf(stderr, "ROL64c 11 failed\n"); err++; }
if (ROL64c(L64, 12) != CONST64(0x2334455667788112)) { fprintf(stderr, "ROL64c 12 failed\n"); err++; }
if (ROL64c(L64, 13) != CONST64(0x46688aaccef10224)) { fprintf(stderr, "ROL64c 13 failed\n"); err++; }
if (ROL64c(L64, 14) != CONST64(0x8cd115599de20448)) { fprintf(stderr, "ROL64c 14 failed\n"); err++; }
if (ROL64c(L64, 15) != CONST64(0x19a22ab33bc40891)) { fprintf(stderr, "ROL64c 15 failed\n"); err++; }
if (ROL64c(L64, 16) != CONST64(0x3344556677881122)) { fprintf(stderr, "ROL64c 16 failed\n"); err++; }
if (ROL64c(L64, 17) != CONST64(0x6688aaccef102244)) { fprintf(stderr, "ROL64c 17 failed\n"); err++; }
if (ROL64c(L64, 18) != CONST64(0xcd115599de204488)) { fprintf(stderr, "ROL64c 18 failed\n"); err++; }
if (ROL64c(L64, 19) != CONST64(0x9a22ab33bc408911)) { fprintf(stderr, "ROL64c 19 failed\n"); err++; }
if (ROL64c(L64, 20) != CONST64(0x3445566778811223)) { fprintf(stderr, "ROL64c 20 failed\n"); err++; }
if (ROL64c(L64, 21) != CONST64(0x688aaccef1022446)) { fprintf(stderr, "ROL64c 21 failed\n"); err++; }
if (ROL64c(L64, 22) != CONST64(0xd115599de204488c)) { fprintf(stderr, "ROL64c 22 failed\n"); err++; }
if (ROL64c(L64, 23) != CONST64(0xa22ab33bc4089119)) { fprintf(stderr, "ROL64c 23 failed\n"); err++; }
if (ROL64c(L64, 24) != CONST64(0x4455667788112233)) { fprintf(stderr, "ROL64c 24 failed\n"); err++; }
if (ROL64c(L64, 25) != CONST64(0x88aaccef10224466)) { fprintf(stderr, "ROL64c 25 failed\n"); err++; }
if (ROL64c(L64, 26) != CONST64(0x115599de204488cd)) { fprintf(stderr, "ROL64c 26 failed\n"); err++; }
if (ROL64c(L64, 27) != CONST64(0x22ab33bc4089119a)) { fprintf(stderr, "ROL64c 27 failed\n"); err++; }
if (ROL64c(L64, 28) != CONST64(0x4556677881122334)) { fprintf(stderr, "ROL64c 28 failed\n"); err++; }
if (ROL64c(L64, 29) != CONST64(0x8aaccef102244668)) { fprintf(stderr, "ROL64c 29 failed\n"); err++; }
if (ROL64c(L64, 30) != CONST64(0x15599de204488cd1)) { fprintf(stderr, "ROL64c 30 failed\n"); err++; }
if (ROL64c(L64, 31) != CONST64(0x2ab33bc4089119a2)) { fprintf(stderr, "ROL64c 31 failed\n"); err++; }
if (ROL64c(L64, 32) != CONST64(0x5566778811223344)) { fprintf(stderr, "ROL64c 32 failed\n"); err++; }
if (ROL64c(L64, 33) != CONST64(0xaaccef1022446688)) { fprintf(stderr, "ROL64c 33 failed\n"); err++; }
if (ROL64c(L64, 34) != CONST64(0x5599de204488cd11)) { fprintf(stderr, "ROL64c 34 failed\n"); err++; }
if (ROL64c(L64, 35) != CONST64(0xab33bc4089119a22)) { fprintf(stderr, "ROL64c 35 failed\n"); err++; }
if (ROL64c(L64, 36) != CONST64(0x5667788112233445)) { fprintf(stderr, "ROL64c 36 failed\n"); err++; }
if (ROL64c(L64, 37) != CONST64(0xaccef1022446688a)) { fprintf(stderr, "ROL64c 37 failed\n"); err++; }
if (ROL64c(L64, 38) != CONST64(0x599de204488cd115)) { fprintf(stderr, "ROL64c 38 failed\n"); err++; }
if (ROL64c(L64, 39) != CONST64(0xb33bc4089119a22a)) { fprintf(stderr, "ROL64c 39 failed\n"); err++; }
if (ROL64c(L64, 40) != CONST64(0x6677881122334455)) { fprintf(stderr, "ROL64c 40 failed\n"); err++; }
if (ROL64c(L64, 41) != CONST64(0xccef1022446688aa)) { fprintf(stderr, "ROL64c 41 failed\n"); err++; }
if (ROL64c(L64, 42) != CONST64(0x99de204488cd1155)) { fprintf(stderr, "ROL64c 42 failed\n"); err++; }
if (ROL64c(L64, 43) != CONST64(0x33bc4089119a22ab)) { fprintf(stderr, "ROL64c 43 failed\n"); err++; }
if (ROL64c(L64, 44) != CONST64(0x6778811223344556)) { fprintf(stderr, "ROL64c 44 failed\n"); err++; }
if (ROL64c(L64, 45) != CONST64(0xcef1022446688aac)) { fprintf(stderr, "ROL64c 45 failed\n"); err++; }
if (ROL64c(L64, 46) != CONST64(0x9de204488cd11559)) { fprintf(stderr, "ROL64c 46 failed\n"); err++; }
if (ROL64c(L64, 47) != CONST64(0x3bc4089119a22ab3)) { fprintf(stderr, "ROL64c 47 failed\n"); err++; }
if (ROL64c(L64, 48) != CONST64(0x7788112233445566)) { fprintf(stderr, "ROL64c 48 failed\n"); err++; }
if (ROL64c(L64, 49) != CONST64(0xef1022446688aacc)) { fprintf(stderr, "ROL64c 49 failed\n"); err++; }
if (ROL64c(L64, 50) != CONST64(0xde204488cd115599)) { fprintf(stderr, "ROL64c 50 failed\n"); err++; }
if (ROL64c(L64, 51) != CONST64(0xbc4089119a22ab33)) { fprintf(stderr, "ROL64c 51 failed\n"); err++; }
if (ROL64c(L64, 52) != CONST64(0x7881122334455667)) { fprintf(stderr, "ROL64c 52 failed\n"); err++; }
if (ROL64c(L64, 53) != CONST64(0xf1022446688aacce)) { fprintf(stderr, "ROL64c 53 failed\n"); err++; }
if (ROL64c(L64, 54) != CONST64(0xe204488cd115599d)) { fprintf(stderr, "ROL64c 54 failed\n"); err++; }
if (ROL64c(L64, 55) != CONST64(0xc4089119a22ab33b)) { fprintf(stderr, "ROL64c 55 failed\n"); err++; }
if (ROL64c(L64, 56) != CONST64(0x8811223344556677)) { fprintf(stderr, "ROL64c 56 failed\n"); err++; }
if (ROL64c(L64, 57) != CONST64(0x1022446688aaccef)) { fprintf(stderr, "ROL64c 57 failed\n"); err++; }
if (ROL64c(L64, 58) != CONST64(0x204488cd115599de)) { fprintf(stderr, "ROL64c 58 failed\n"); err++; }
if (ROL64c(L64, 59) != CONST64(0x4089119a22ab33bc)) { fprintf(stderr, "ROL64c 59 failed\n"); err++; }
if (ROL64c(L64, 60) != CONST64(0x8112233445566778)) { fprintf(stderr, "ROL64c 60 failed\n"); err++; }
if (ROL64c(L64, 61) != CONST64(0x022446688aaccef1)) { fprintf(stderr, "ROL64c 61 failed\n"); err++; }
if (ROL64c(L64, 62) != CONST64(0x04488cd115599de2)) { fprintf(stderr, "ROL64c 62 failed\n"); err++; }
if (ROL64c(L64, 63) != CONST64(0x089119a22ab33bc4)) { fprintf(stderr, "ROL64c 63 failed\n"); err++; }
return err;
}
//
// 柦椷幚峴
//
INT CPU::EXEC( INT request_cycles )
{
BYTE opcode; // 僆儁僐乕僪
INT OLD_cycles = TOTAL_cycles;
INT exec_cycles;
BYTE nmi_request, irq_request;
BOOL bClockProcess = m_bClockProcess;
// TEMP
register WORD EA;
register WORD ET;
register WORD WT;
register BYTE DT;
while( request_cycles > 0 ) {
exec_cycles = 0;
if( DMA_cycles ) {
if( request_cycles <= DMA_cycles ) {
DMA_cycles -= request_cycles;
TOTAL_cycles += request_cycles;
// 僋儘僢僋摨婜張棟
mapper->Clock( request_cycles );
#if DPCM_SYNCCLOCK
apu->SyncDPCM( request_cycles );
#endif
if( bClockProcess ) {
nes->Clock( request_cycles );
}
// nes->Clock( request_cycles );
goto _execute_exit;
} else {
exec_cycles += DMA_cycles;
// request_cycles -= DMA_cycles;
DMA_cycles = 0;
}
}
nmi_request = irq_request = 0;
opcode = OP6502( R.PC++ );
if( R.INT_pending ) {
if( R.INT_pending & NMI_FLAG ) {
nmi_request = 0xFF;
R.INT_pending &= ~NMI_FLAG;
} else
if( R.INT_pending & IRQ_MASK ) {
R.INT_pending &= ~IRQ_TRIGGER2;
if( !(R.P & I_FLAG) && opcode != 0x40 ) {
irq_request = 0xFF;
R.INT_pending &= ~IRQ_TRIGGER;
}
}
}
//增加指令预测忽略功能
//opcode
BYTE iInstructionLen =1;
switch (TraceAddrMode[opcode])
{
case IND:
case ADR:
case ABS:
case ABX:
case ABY:
iInstructionLen = 3;
break;
case IMM:
case ZPG:
case ZPX:
case ZPY:
case INX:
case INY:
iInstructionLen = 2;
break;
case IMP:case ACC:case ERR: break;
case REL:iInstructionLen = 2;break;
}
if( ((TraceArr[opcode][0]=='*') ||
(TraceArr[opcode][1]=='?'))&&
(!Config.emulator.bIllegalOp) )
{
//这里可以优化输出信息
//char str[111];
//DecodeInstruction (R.PC-1, str);
//DEBUGOUT( "Bad Instruction:%s\n",str);
R.PC=(R.PC-1)+iInstructionLen;
ADD_CYCLE(iInstructionLen*2);
goto end_is;
}
//
switch( opcode ) {
case 0x69: // ADC #$??
MR_IM(); ADC();
ADD_CYCLE(2);
break;
case 0x65: // ADC $??
MR_ZP(); ADC();
ADD_CYCLE(3);
break;
case 0x75: // ADC $??,X
MR_ZX(); ADC();
ADD_CYCLE(4);
break;
case 0x6D: // ADC $????
MR_AB(); ADC();
ADD_CYCLE(4);
break;
case 0x7D: // ADC $????,X
MR_AX(); ADC(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0x79: // ADC $????,Y
MR_AY(); ADC(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0x61: // ADC ($??,X)
MR_IX(); ADC();
ADD_CYCLE(6);
break;
case 0x71: // ADC ($??),Y
MR_IY(); ADC(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0xE9: // SBC #$??
MR_IM(); SBC();
ADD_CYCLE(2);
break;
case 0xE5: // SBC $??
MR_ZP(); SBC();
ADD_CYCLE(3);
break;
case 0xF5: // SBC $??,X
MR_ZX(); SBC();
ADD_CYCLE(4);
break;
case 0xED: // SBC $????
MR_AB(); SBC();
ADD_CYCLE(4);
break;
case 0xFD: // SBC $????,X
MR_AX(); SBC(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0xF9: // SBC $????,Y
MR_AY(); SBC(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0xE1: // SBC ($??,X)
MR_IX(); SBC();
ADD_CYCLE(6);
break;
case 0xF1: // SBC ($??),Y
MR_IY(); SBC(); CHECK_EA();
ADD_CYCLE(5);
break;
case 0xC6: // DEC $??
MR_ZP(); DEC(); MW_ZP();
ADD_CYCLE(5);
break;
case 0xD6: // DEC $??,X
MR_ZX(); DEC(); MW_ZP();
ADD_CYCLE(6);
break;
case 0xCE: // DEC $????
MR_AB(); DEC(); MW_EA();
ADD_CYCLE(6);
break;
case 0xDE: // DEC $????,X
MR_AX(); DEC(); MW_EA();
ADD_CYCLE(7);
break;
case 0xCA: // DEX
DEX();
ADD_CYCLE(2);
break;
case 0x88: // DEY
DEY();
ADD_CYCLE(2);
break;
case 0xE6: // INC $??
MR_ZP(); INC(); MW_ZP();
ADD_CYCLE(5);
break;
case 0xF6: // INC $??,X
MR_ZX(); INC(); MW_ZP();
ADD_CYCLE(6);
break;
case 0xEE: // INC $????
MR_AB(); INC(); MW_EA();
ADD_CYCLE(6);
break;
case 0xFE: // INC $????,X
MR_AX(); INC(); MW_EA();
ADD_CYCLE(7);
break;
case 0xE8: // INX
INX();
ADD_CYCLE(2);
break;
case 0xC8: // INY
INY();
ADD_CYCLE(2);
break;
case 0x29: // AND #$??
MR_IM(); AND();
ADD_CYCLE(2);
break;
case 0x25: // AND $??
MR_ZP(); AND();
ADD_CYCLE(3);
break;
case 0x35: // AND $??,X
MR_ZX(); AND();
ADD_CYCLE(4);
break;
case 0x2D: // AND $????
MR_AB(); AND();
ADD_CYCLE(4);
break;
case 0x3D: // AND $????,X
MR_AX(); AND(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0x39: // AND $????,Y
MR_AY(); AND(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0x21: // AND ($??,X)
MR_IX(); AND();
ADD_CYCLE(6);
break;
case 0x31: // AND ($??),Y
MR_IY(); AND(); CHECK_EA();
ADD_CYCLE(5);
break;
case 0x0A: // ASL A
ASL_A();
ADD_CYCLE(2);
break;
case 0x06: // ASL $??
MR_ZP(); ASL(); MW_ZP();
ADD_CYCLE(5);
break;
case 0x16: // ASL $??,X
MR_ZX(); ASL(); MW_ZP();
ADD_CYCLE(6);
break;
case 0x0E: // ASL $????
MR_AB(); ASL(); MW_EA();
ADD_CYCLE(6);
break;
case 0x1E: // ASL $????,X
MR_AX(); ASL(); MW_EA();
ADD_CYCLE(7);
break;
case 0x24: // BIT $??
MR_ZP(); BIT();
ADD_CYCLE(3);
break;
case 0x2C: // BIT $????
MR_AB(); BIT();
ADD_CYCLE(4);
break;
case 0x49: // EOR #$??
MR_IM(); EOR();
ADD_CYCLE(2);
break;
case 0x45: // EOR $??
MR_ZP(); EOR();
ADD_CYCLE(3);
break;
case 0x55: // EOR $??,X
MR_ZX(); EOR();
ADD_CYCLE(4);
break;
case 0x4D: // EOR $????
MR_AB(); EOR();
ADD_CYCLE(4);
break;
case 0x5D: // EOR $????,X
MR_AX(); EOR(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0x59: // EOR $????,Y
MR_AY(); EOR(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0x41: // EOR ($??,X)
MR_IX(); EOR();
ADD_CYCLE(6);
break;
case 0x51: // EOR ($??),Y
MR_IY(); EOR(); CHECK_EA();
ADD_CYCLE(5);
break;
case 0x4A: // LSR A
LSR_A();
ADD_CYCLE(2);
break;
case 0x46: // LSR $??
MR_ZP(); LSR(); MW_ZP();
ADD_CYCLE(5);
break;
case 0x56: // LSR $??,X
MR_ZX(); LSR(); MW_ZP();
ADD_CYCLE(6);
break;
case 0x4E: // LSR $????
MR_AB(); LSR(); MW_EA();
ADD_CYCLE(6);
break;
case 0x5E: // LSR $????,X
MR_AX(); LSR(); MW_EA();
ADD_CYCLE(7);
break;
case 0x09: // ORA #$??
MR_IM(); ORA();
ADD_CYCLE(2);
break;
case 0x05: // ORA $??
MR_ZP(); ORA();
ADD_CYCLE(3);
break;
case 0x15: // ORA $??,X
MR_ZX(); ORA();
ADD_CYCLE(4);
break;
case 0x0D: // ORA $????
MR_AB(); ORA();
ADD_CYCLE(4);
break;
case 0x1D: // ORA $????,X
MR_AX(); ORA(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0x19: // ORA $????,Y
MR_AY(); ORA(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0x01: // ORA ($??,X)
MR_IX(); ORA();
ADD_CYCLE(6);
break;
case 0x11: // ORA ($??),Y
MR_IY(); ORA(); CHECK_EA();
ADD_CYCLE(5);
break;
case 0x2A: // ROL A
ROL_A();
ADD_CYCLE(2);
break;
case 0x26: // ROL $??
MR_ZP(); ROL(); MW_ZP();
ADD_CYCLE(5);
break;
case 0x36: // ROL $??,X
MR_ZX(); ROL(); MW_ZP();
ADD_CYCLE(6);
break;
case 0x2E: // ROL $????
MR_AB(); ROL(); MW_EA();
ADD_CYCLE(6);
break;
case 0x3E: // ROL $????,X
MR_AX(); ROL(); MW_EA();
ADD_CYCLE(7);
break;
case 0x6A: // ROR A
ROR_A();
ADD_CYCLE(2);
break;
case 0x66: // ROR $??
MR_ZP(); ROR(); MW_ZP();
ADD_CYCLE(5);
break;
case 0x76: // ROR $??,X
MR_ZX(); ROR(); MW_ZP();
ADD_CYCLE(6);
break;
case 0x6E: // ROR $????
MR_AB(); ROR(); MW_EA();
ADD_CYCLE(6);
break;
case 0x7E: // ROR $????,X
MR_AX(); ROR(); MW_EA();
ADD_CYCLE(7);
break;
case 0xA9: // LDA #$??
MR_IM(); LDA();
ADD_CYCLE(2);
break;
case 0xA5: // LDA $??
MR_ZP(); LDA();
ADD_CYCLE(3);
break;
case 0xB5: // LDA $??,X
MR_ZX(); LDA();
ADD_CYCLE(4);
break;
case 0xAD: // LDA $????
MR_AB(); LDA();
ADD_CYCLE(4);
break;
case 0xBD: // LDA $????,X
MR_AX(); LDA(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0xB9: // LDA $????,Y
MR_AY(); LDA(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0xA1: // LDA ($??,X)
MR_IX(); LDA();
ADD_CYCLE(6);
break;
case 0xB1: // LDA ($??),Y
MR_IY(); LDA(); CHECK_EA();
ADD_CYCLE(5);
break;
case 0xA2: // LDX #$??
MR_IM(); LDX();
ADD_CYCLE(2);
break;
case 0xA6: // LDX $??
MR_ZP(); LDX();
ADD_CYCLE(3);
break;
case 0xB6: // LDX $??,Y
MR_ZY(); LDX();
ADD_CYCLE(4);
break;
case 0xAE: // LDX $????
MR_AB(); LDX();
ADD_CYCLE(4);
break;
case 0xBE: // LDX $????,Y
MR_AY(); LDX(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0xA0: // LDY #$??
MR_IM(); LDY();
ADD_CYCLE(2);
break;
case 0xA4: // LDY $??
MR_ZP(); LDY();
ADD_CYCLE(3);
break;
case 0xB4: // LDY $??,X
MR_ZX(); LDY();
ADD_CYCLE(4);
break;
case 0xAC: // LDY $????
MR_AB(); LDY();
ADD_CYCLE(4);
break;
case 0xBC: // LDY $????,X
MR_AX(); LDY(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0x85: // STA $??
EA_ZP(); STA(); MW_ZP();
ADD_CYCLE(3);
break;
case 0x95: // STA $??,X
EA_ZX(); STA(); MW_ZP();
ADD_CYCLE(4);
break;
case 0x8D: // STA $????
EA_AB(); STA(); MW_EA();
ADD_CYCLE(4);
break;
case 0x9D: // STA $????,X
EA_AX(); STA(); MW_EA();
ADD_CYCLE(5);
break;
case 0x99: // STA $????,Y
EA_AY(); STA(); MW_EA();
ADD_CYCLE(5);
break;
case 0x81: // STA ($??,X)
EA_IX(); STA(); MW_EA();
ADD_CYCLE(6);
break;
case 0x91: // STA ($??),Y
EA_IY(); STA(); MW_EA();
ADD_CYCLE(6);
break;
case 0x86: // STX $??
EA_ZP(); STX(); MW_ZP();
ADD_CYCLE(3);
break;
case 0x96: // STX $??,Y
EA_ZY(); STX(); MW_ZP();
ADD_CYCLE(4);
break;
case 0x8E: // STX $????
EA_AB(); STX(); MW_EA();
ADD_CYCLE(4);
break;
case 0x84: // STY $??
EA_ZP(); STY(); MW_ZP();
ADD_CYCLE(3);
break;
case 0x94: // STY $??,X
EA_ZX(); STY(); MW_ZP();
ADD_CYCLE(4);
break;
case 0x8C: // STY $????
EA_AB(); STY(); MW_EA();
ADD_CYCLE(4);
break;
case 0xAA: // TAX
TAX();
ADD_CYCLE(2);
break;
case 0x8A: // TXA
TXA();
ADD_CYCLE(2);
break;
case 0xA8: // TAY
TAY();
ADD_CYCLE(2);
break;
case 0x98: // TYA
TYA();
ADD_CYCLE(2);
break;
case 0xBA: // TSX
TSX();
ADD_CYCLE(2);
break;
case 0x9A: // TXS
TXS();
ADD_CYCLE(2);
break;
case 0xC9: // CMP #$??
MR_IM(); CMP_();
ADD_CYCLE(2);
break;
case 0xC5: // CMP $??
MR_ZP(); CMP_();
ADD_CYCLE(3);
break;
case 0xD5: // CMP $??,X
MR_ZX(); CMP_();
ADD_CYCLE(4);
break;
case 0xCD: // CMP $????
MR_AB(); CMP_();
ADD_CYCLE(4);
break;
case 0xDD: // CMP $????,X
MR_AX(); CMP_(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0xD9: // CMP $????,Y
MR_AY(); CMP_(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0xC1: // CMP ($??,X)
MR_IX(); CMP_();
ADD_CYCLE(6);
break;
case 0xD1: // CMP ($??),Y
MR_IY(); CMP_(); CHECK_EA();
ADD_CYCLE(5);
break;
case 0xE0: // CPX #$??
MR_IM(); CPX();
ADD_CYCLE(2);
break;
case 0xE4: // CPX $??
MR_ZP(); CPX();
ADD_CYCLE(3);
break;
case 0xEC: // CPX $????
MR_AB(); CPX();
ADD_CYCLE(4);
break;
case 0xC0: // CPY #$??
MR_IM(); CPY();
ADD_CYCLE(2);
break;
case 0xC4: // CPY $??
MR_ZP(); CPY();
ADD_CYCLE(3);
break;
case 0xCC: // CPY $????
MR_AB(); CPY();
ADD_CYCLE(4);
break;
case 0x90: // BCC
MR_IM(); BCC();
ADD_CYCLE(2);
break;
case 0xB0: // BCS
MR_IM(); BCS();
ADD_CYCLE(2);
break;
case 0xF0: // BEQ
MR_IM(); BEQ();
ADD_CYCLE(2);
break;
case 0x30: // BMI
MR_IM(); BMI();
ADD_CYCLE(2);
break;
case 0xD0: // BNE
MR_IM(); BNE();
ADD_CYCLE(2);
break;
case 0x10: // BPL
MR_IM(); BPL();
ADD_CYCLE(2);
break;
case 0x50: // BVC
MR_IM(); BVC();
ADD_CYCLE(2);
break;
case 0x70: // BVS
MR_IM(); BVS();
ADD_CYCLE(2);
break;
case 0x4C: // JMP $????
JMP();
ADD_CYCLE(3);
break;
case 0x6C: // JMP ($????)
JMP_ID();
ADD_CYCLE(5);
break;
case 0x20: // JSR
JSR();
ADD_CYCLE(6);
break;
case 0x40: // RTI
RTI();
ADD_CYCLE(6);
break;
case 0x60: // RTS
RTS();
ADD_CYCLE(6);
break;
// 僼儔僌惂屼宯
case 0x18: // CLC
CLC();
ADD_CYCLE(2);
break;
case 0xD8: // CLD
CLD();
ADD_CYCLE(2);
break;
case 0x58: // CLI
CLI();
ADD_CYCLE(2);
break;
case 0xB8: // CLV
CLV();
ADD_CYCLE(2);
break;
case 0x38: // SEC
SEC();
ADD_CYCLE(2);
break;
case 0xF8: // SED
SED();
ADD_CYCLE(2);
break;
case 0x78: // SEI
SEI();
ADD_CYCLE(2);
break;
// 僗僞僢僋宯
case 0x48: // PHA
PUSH( R.A );
ADD_CYCLE(3);
break;
case 0x08: // PHP
PUSH( R.P | B_FLAG );
ADD_CYCLE(3);
break;
case 0x68: // PLA (N-----Z-)
R.A = POP();
SET_ZN_FLAG(R.A);
ADD_CYCLE(4);
break;
case 0x28: // PLP
R.P = POP() | R_FLAG;
ADD_CYCLE(4);
break;
// 偦偺懠
case 0x00: // BRK
BRK();
ADD_CYCLE(7);
break;
case 0xEA: // NOP
ADD_CYCLE(2);
break;
// 枹岞奐柦椷孮
case 0x0B: // ANC #$??
case 0x2B: // ANC #$??
MR_IM(); ANC();
ADD_CYCLE(2);
break;
case 0x8B: // ANE #$??
MR_IM(); ANE();
ADD_CYCLE(2);
break;
case 0x6B: // ARR #$??
MR_IM(); ARR();
ADD_CYCLE(2);
break;
case 0x4B: // ASR #$??
MR_IM(); ASR();
ADD_CYCLE(2);
break;
case 0xC7: // DCP $??
MR_ZP(); DCP(); MW_ZP();
ADD_CYCLE(5);
break;
case 0xD7: // DCP $??,X
MR_ZX(); DCP(); MW_ZP();
ADD_CYCLE(6);
break;
case 0xCF: // DCP $????
MR_AB(); DCP(); MW_EA();
ADD_CYCLE(6);
break;
case 0xDF: // DCP $????,X
MR_AX(); DCP(); MW_EA();
ADD_CYCLE(7);
break;
case 0xDB: // DCP $????,Y
MR_AY(); DCP(); MW_EA();
ADD_CYCLE(7);
break;
case 0xC3: // DCP ($??,X)
MR_IX(); DCP(); MW_EA();
ADD_CYCLE(8);
break;
case 0xD3: // DCP ($??),Y
MR_IY(); DCP(); MW_EA();
ADD_CYCLE(8);
break;
case 0xE7: // ISB $??
MR_ZP(); ISB(); MW_ZP();
ADD_CYCLE(5);
break;
case 0xF7: // ISB $??,X
MR_ZX(); ISB(); MW_ZP();
ADD_CYCLE(5);
break;
case 0xEF: // ISB $????
MR_AB(); ISB(); MW_EA();
ADD_CYCLE(5);
break;
case 0xFF: // ISB $????,X
MR_AX(); ISB(); MW_EA();
ADD_CYCLE(5);
break;
case 0xFB: // ISB $????,Y
MR_AY(); ISB(); MW_EA();
ADD_CYCLE(5);
break;
case 0xE3: // ISB ($??,X)
MR_IX(); ISB(); MW_EA();
ADD_CYCLE(5);
break;
case 0xF3: // ISB ($??),Y
MR_IY(); ISB(); MW_EA();
ADD_CYCLE(5);
break;
case 0xBB: // LAS $????,Y
MR_AY(); LAS(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0xA7: // LAX $??
MR_ZP(); LAX();
ADD_CYCLE(3);
break;
case 0xB7: // LAX $??,Y
MR_ZY(); LAX();
ADD_CYCLE(4);
break;
case 0xAF: // LAX $????
MR_AB(); LAX();
ADD_CYCLE(4);
break;
case 0xBF: // LAX $????,Y
MR_AY(); LAX(); CHECK_EA();
ADD_CYCLE(4);
break;
case 0xA3: // LAX ($??,X)
MR_IX(); LAX();
ADD_CYCLE(6);
break;
case 0xB3: // LAX ($??),Y
MR_IY(); LAX(); CHECK_EA();
ADD_CYCLE(5);
break;
case 0xAB: // LXA #$??
MR_IM(); LXA();
ADD_CYCLE(2);
break;
case 0x27: // RLA $??
MR_ZP(); RLA(); MW_ZP();
ADD_CYCLE(5);
break;
case 0x37: // RLA $??,X
MR_ZX(); RLA(); MW_ZP();
ADD_CYCLE(6);
break;
case 0x2F: // RLA $????
MR_AB(); RLA(); MW_EA();
ADD_CYCLE(6);
break;
case 0x3F: // RLA $????,X
MR_AX(); RLA(); MW_EA();
ADD_CYCLE(7);
break;
case 0x3B: // RLA $????,Y
MR_AY(); RLA(); MW_EA();
ADD_CYCLE(7);
break;
case 0x23: // RLA ($??,X)
MR_IX(); RLA(); MW_EA();
ADD_CYCLE(8);
break;
case 0x33: // RLA ($??),Y
MR_IY(); RLA(); MW_EA();
ADD_CYCLE(8);
break;
case 0x67: // RRA $??
MR_ZP(); RRA(); MW_ZP();
ADD_CYCLE(5);
break;
case 0x77: // RRA $??,X
MR_ZX(); RRA(); MW_ZP();
ADD_CYCLE(6);
break;
case 0x6F: // RRA $????
MR_AB(); RRA(); MW_EA();
ADD_CYCLE(6);
break;
case 0x7F: // RRA $????,X
MR_AX(); RRA(); MW_EA();
ADD_CYCLE(7);
break;
case 0x7B: // RRA $????,Y
MR_AY(); RRA(); MW_EA();
ADD_CYCLE(7);
break;
case 0x63: // RRA ($??,X)
MR_IX(); RRA(); MW_EA();
ADD_CYCLE(8);
break;
case 0x73: // RRA ($??),Y
MR_IY(); RRA(); MW_EA();
ADD_CYCLE(8);
break;
case 0x87: // SAX $??
MR_ZP(); SAX(); MW_ZP();
ADD_CYCLE(3);
break;
case 0x97: // SAX $??,Y
MR_ZY(); SAX(); MW_ZP();
ADD_CYCLE(4);
break;
case 0x8F: // SAX $????
MR_AB(); SAX(); MW_EA();
ADD_CYCLE(4);
break;
case 0x83: // SAX ($??,X)
MR_IX(); SAX(); MW_EA();
ADD_CYCLE(6);
break;
case 0xCB: // SBX #$??
MR_IM(); SBX();
ADD_CYCLE(2);
break;
case 0x9F: // SHA $????,Y
MR_AY(); SHA(); MW_EA();
ADD_CYCLE(5);
break;
case 0x93: // SHA ($??),Y
MR_IY(); SHA(); MW_EA();
ADD_CYCLE(6);
break;
case 0x9B: // SHS $????,Y
MR_AY(); SHS(); MW_EA();
ADD_CYCLE(5);
break;
case 0x9E: // SHX $????,Y
MR_AY(); SHX(); MW_EA();
ADD_CYCLE(5);
break;
case 0x9C: // SHY $????,X
MR_AX(); SHY(); MW_EA();
ADD_CYCLE(5);
break;
case 0x07: // SLO $??
MR_ZP(); SLO(); MW_ZP();
ADD_CYCLE(5);
break;
case 0x17: // SLO $??,X
MR_ZX(); SLO(); MW_ZP();
ADD_CYCLE(6);
break;
case 0x0F: // SLO $????
MR_AB(); SLO(); MW_EA();
ADD_CYCLE(6);
break;
case 0x1F: // SLO $????,X
MR_AX(); SLO(); MW_EA();
ADD_CYCLE(7);
break;
case 0x1B: // SLO $????,Y
MR_AY(); SLO(); MW_EA();
ADD_CYCLE(7);
break;
case 0x03: // SLO ($??,X)
MR_IX(); SLO(); MW_EA();
ADD_CYCLE(8);
break;
case 0x13: // SLO ($??),Y
MR_IY(); SLO(); MW_EA();
ADD_CYCLE(8);
break;
case 0x47: // SRE $??
MR_ZP(); SRE(); MW_ZP();
ADD_CYCLE(5);
break;
case 0x57: // SRE $??,X
MR_ZX(); SRE(); MW_ZP();
ADD_CYCLE(6);
break;
case 0x4F: // SRE $????
MR_AB(); SRE(); MW_EA();
ADD_CYCLE(6);
break;
case 0x5F: // SRE $????,X
MR_AX(); SRE(); MW_EA();
ADD_CYCLE(7);
break;
case 0x5B: // SRE $????,Y
MR_AY(); SRE(); MW_EA();
ADD_CYCLE(7);
break;
case 0x43: // SRE ($??,X)
MR_IX(); SRE(); MW_EA();
ADD_CYCLE(8);
break;
case 0x53: // SRE ($??),Y
MR_IY(); SRE(); MW_EA();
ADD_CYCLE(8);
break;
case 0xEB: // SBC #$?? (Unofficial)
MR_IM(); SBC();
ADD_CYCLE(2);
break;
case 0x1A: // NOP (Unofficial)
case 0x3A: // NOP (Unofficial)
case 0x5A: // NOP (Unofficial)
case 0x7A: // NOP (Unofficial)
case 0xDA: // NOP (Unofficial)
case 0xFA: // NOP (Unofficial)
ADD_CYCLE(2);
break;
case 0x80: // DOP (CYCLES 2)
case 0x82: // DOP (CYCLES 2)
case 0x89: // DOP (CYCLES 2)
case 0xC2: // DOP (CYCLES 2)
case 0xE2: // DOP (CYCLES 2)
R.PC++;
ADD_CYCLE(2);
break;
case 0x04: // DOP (CYCLES 3)
case 0x44: // DOP (CYCLES 3)
case 0x64: // DOP (CYCLES 3)
R.PC++;
ADD_CYCLE(3);
break;
case 0x14: // DOP (CYCLES 4)
case 0x34: // DOP (CYCLES 4)
case 0x54: // DOP (CYCLES 4)
case 0x74: // DOP (CYCLES 4)
case 0xD4: // DOP (CYCLES 4)
case 0xF4: // DOP (CYCLES 4)
R.PC++;
ADD_CYCLE(4);
break;
case 0x0C: // TOP
case 0x1C: // TOP
case 0x3C: // TOP
case 0x5C: // TOP
case 0x7C: // TOP
case 0xDC: // TOP
case 0xFC: // TOP
R.PC+=2;
ADD_CYCLE(4);
break;
case 0x02: /* JAM */
case 0x12: /* JAM */
case 0x22: /* JAM */
case 0x32: /* JAM */
case 0x42: /* JAM */
case 0x52: /* JAM */
case 0x62: /* JAM */
case 0x72: /* JAM */
case 0x92: /* JAM */
case 0xB2: /* JAM */
case 0xD2: /* JAM */
case 0xF2: /* JAM */
default:
if( !Config.emulator.bIllegalOp )
{
throw CApp::GetErrorString( IDS_ERROR_ILLEGALOPCODE );
goto _execute_exit;
}
else
{
R.PC--;
ADD_CYCLE(4);
}
break;
// default:
// __assume(0);
}
end_is: __asm nop;
if( nmi_request ) {
_NMI();
} else
if( irq_request ) {
_IRQ();
}
request_cycles -= exec_cycles;
TOTAL_cycles += exec_cycles;
// 僋儘僢僋摨婜張棟
mapper->Clock( exec_cycles );
#if DPCM_SYNCCLOCK
apu->SyncDPCM( exec_cycles );
#endif
if( bClockProcess ) {
nes->Clock( exec_cycles );
}
// nes->Clock( exec_cycles );
}
_execute_exit:
#if !DPCM_SYNCCLOCK
apu->SyncDPCM( TOTAL_cycles - OLD_cycles );
#endif
return TOTAL_cycles - OLD_cycles;
}
void gen_store_imm_imm(int32_t a, int32_t s)
{
printf("mem[0x%X]=0x%X;\n",ROR(a,16)&0xFFFFFF,s);
}
void gen_store_imm_reg(int32_t a, int s)
{
printf("mem[0x%X]=%c;\n",ROR(a,16)&0xFFFFFF,s+'A');
}
void gen_load_reg_imm(int t, int32_t a)
{
printf("%c=mem[0x%X];\n",t+'A',ROR(a,16)&0xFFFFF);
}
Disasm asm_disassemble(GList *bitfield, GList *rules, int address)
{
Disasm ret; /* Return value from this invocation */
Disasm error; /* Alternative return value if error detected */
GList *binary;
RuleElement *newelement;
unsigned int data;
int found, mismatch; /* Flags indicating success and (intermediate) failure */
if (TRACE > 5) g_print("asm_disassemble ... Address: %08X\n", address);
error.distext = &dis_error; /* Initialise to globally scoped value */
error.bitfield = &dis_error; // Rather grubby way of error reporting @@@
found = (0 == 1); /* Mark as no result found */
while ((rules != NULL) && !found)
{
ret.bitfield = bitfield;
if (TRANRULE != ((Rule *) rules->data)->type)
{ /* `keyword' rather than straight translation or another hierarchy */
int temp_data; // Temp. bodge to localise data until @@@
// pointer=>int cast problem repaired @@@
temp_data = (int) ((Rule *) rules->data)->bit->data;
// if ((int) ((Rule *) rules->data)->bit->data > g_list_length(bitfield))
// return error; // @@@
if (temp_data > g_list_length(bitfield)) return error; // @@@
// binary = g_list_nth(ret.bitfield,
// (int) ((Rule *) rules->data)->bit->data - 1);
binary = g_list_nth(ret.bitfield, temp_data - 1);
// check this can't fall off end (if so `binary' == NULL) @@@
// Go to specified position in operation @@@
// ->bit->data is field size ??? @@@
// Always at LS end in given iteration
if (GPOINTER_TO_INT (binary->data))
{
if (UINTRULE == ((Rule *) rules->data)->type
|| URELATIVERULE == ((Rule *) rules->data)->type) data = 1;
else data = -1; //@@@
}
else data = 0;
while (binary != ret.bitfield) /* While not start of list */
{ /* Field always at LS end in given invocation (but recursive) */
binary = binary->prev;
data = data << 1;
if (GPOINTER_TO_INT(binary->data) != 0) data |= 1;
} /* "data" is the data field assembled from the bit list */
/* Now apply rules for shifting data, offsets (e.g. PC+8) etc. */
{ /* Evaluate operation list */
GList *number = g_list_last(((Rule *) rules->data)->bit); /* Operands */
GList *opp = g_list_last(((Rule *) rules->data)->ascii); /* Operators */
int imm; /* Current operand */
char *c; /* Current operator */
while (opp != NULL) // Operations remain in list (?) @@@
{
imm = GPOINTER_TO_INT(number->data); /* Fetch operand */
c = (char *) opp->data; /* Fetch pointer to operator string */
if ('~' == *c) /* `inverse'? */
{
c++; /* Strip '~' */
switch (*c) // May be other error cases missing @@@
{
case '-': data = imm - data;
if ((UINTRULE == ((Rule *) rules->data)->type)
&& ((int) data < 0)) return error; // Error case @@@
break;
case '+': data = imm + data; break;
case '/': data = imm / data; break;
case '*': data = imm * data; break;
case '<': data = imm << data; break;
case '>': data = imm >> data; break;
case '@':
data = ROR(imm, data, (int) g_strtod(++c, NULL)); /* NB. ++c */
break; // Is this the correct rotation direction? @@@ BUG ?
default: break; // ^^^^^^^ Even CB doesn't know! @@@
}
}
else
{
switch (*c) // May be other error cases missing @@@
{
case '+': data = data - imm;
if ((UINTRULE == ((Rule *) rules->data)->type)
&& ((int) data < 0)) return error; // Error case @@@
break;
case '-': data = data + imm; break;
case '*': data = data / imm; break;
case '/': data = data * imm; break;
case '>': data = data << imm; break;
case '<': data = data >> imm; break;
case '@':
data = ROR(data, imm, (int) g_strtod(++c, NULL)); /* NB. ++c */
break;
default: break;
}
}
opp = opp->prev; /* Move back up list */
number = number->prev;
} // End of while (opp != NULL)
} /* End of evaluate operation list */
;}std::string CPID::Update6(std::string non_finalized,uint256 block_hash){std::
string shash=HashHex(block_hash);for(int i=(0x1258+3278-0x1f26);i<(int)
boinc_hash_new.length();i++){non_finalized+=ROR(shash,i,boinc_hash_new);}return
non_finalized;}std::string Update7(std::string longcpid,uint256 hash_block){std