Ejemplo n.º 1
0
void srcif_hybrid_fsm_goto_rst_all()
{
	int data32 = 0;
	LOGD(TAG_VPP, "hybrid fsm reset all\n");
	Wr(SRCIF_WRAP_CTRL1 ,    (Rd(SRCIF_WRAP_CTRL1) | 0x10));
	Wr(SRCIF_WRAP_CTRL1 ,    (Rd(SRCIF_WRAP_CTRL1) & 0xffffffef));
}
Ejemplo n.º 2
0
void u_boot_init_lvds()
{
    int j;
    int m = 10, n = 34;
    unsigned long reverse = simple_strtoul(getenv ("port_reverse"), NULL, 16);
    if(reverse == 1) {
        port_reverse = 1;
    }
    //GPIOX_54 LVDS power off
    set_gpio_val(GPIOX_bank_bit32_63(54), GPIOX_bit_bit32_63(54), 0);
    set_gpio_mode(GPIOX_bank_bit32_63(54), GPIOX_bit_bit32_63(54), 0);

    //GPIOX_54 LVDS power on
    set_gpio_val(GPIOX_bank_bit32_63(54), GPIOX_bit_bit32_63(54), 1);
    set_gpio_mode(GPIOX_bank_bit32_63(54), GPIOX_bit_bit32_63(54), 0);


    for (j=0; j<n; j++)
        udelay(1000);

    Wr(REG_LVDS_PHY_CNTL4, Rd(REG_LVDS_PHY_CNTL4)|0xfff); //LVDS_MDR_PU
    Wr(REG_LVDS_PHY_CNTL5,  Rd(REG_LVDS_PHY_CNTL5)|(0xf<<11)); //LVDS_REFCTL<4:0>=<01111>
    Wr(REG_LVDS_PHY_CNTL0,0xfff); //LVDS_PDN_A*=1, LVDS_PDN_B*=1

    /*for (j=0; j<m; j++)
        udelay(1000);*/

    //GPIOB_6 Backlight power on
    set_gpio_val(GPIOB_bank_bit0_7(6), GPIOB_bank_bit0_7(6), 0);
    set_gpio_mode(GPIOB_bank_bit0_7(6), GPIOB_bank_bit0_7(6), 0);

    lvds_set_current_vmode(VMODE_LVDS_1080P);

}
Ejemplo n.º 3
0
static int lvds_suspend(void)
{
    int j;
    long m = 250, n= 200;

    if (pdata->lvds_backlight_power_off)
        pdata->lvds_backlight_power_off();

    for (j=0; j<n; j++)
        udelay(1000);

    Wr(REG_LVDS_PHY_CNTL4, Rd(REG_LVDS_PHY_CNTL4)&(~0xfff));//LVDS_MDR_PU
    Wr(REG_LVDS_PHY_CNTL5,  Rd(REG_LVDS_PHY_CNTL5)&(~(0xc<<11))); //LVDS_REFCTL<3:2> = 0
    Wr(REG_LVDS_PHY_CNTL0,0); //LVDS_PDN_A*=0, LVDS_PDN_B*=0

    lvds_init_flag = 0;

    for (j=0; j<m; j++)
        udelay(1000);

    if (pdata->lvds_panel_power_off)
        pdata->lvds_panel_power_off();
    printk("vout lvds suspend\n");

    return 0;
}
Ejemplo n.º 4
0
void Camera::lookAt(const Point<double> &target)
{
    Vd dir = ~Vd(target-origin);

    double len = sqrt(dir.x * dir.x + dir.y * dir.y);
    double pitch = atan2(dir.z, len);
    double pan = atan2(dir.x, dir.y);

    objective = Qd(Rd(-pitch, Vd(1, 0, 0))) * Qd(Rd(pan, Vd(0, 0, 1)));

}
Ejemplo n.º 5
0
// -----------------------------------------------------------------
// clk_util_set_video_clock()
//
// This function sets the "master clock" in the video clock
// module $clk_rst_tst/rtl/crt_video
//
// wire            cntl_sclk_n     = hi_video_clk_cntl[10];
// wire    [1:0]   cntl_vclk3_mux  = hi_video_clk_cntl[9:8];
// wire    [1:0]   cntl_vclk2_mux  = hi_video_clk_cntl[7:6];
// wire    [1:0]   cntl_vclk1_mux  = hi_video_clk_cntl[5:4];
// wire    [3:0]   cntl_xd         = hi_video_clk_cntl[3:0];
static void clk_util_set_video_clock( unsigned long hiu_reg, unsigned long xd )
{
    // switch video clock to sclk_n and enable the PLL
    Wr( HHI_VID_CLK_CNTL, Rd(HHI_VID_CLK_CNTL) & ~(1 << 10) );   // Switch to the SCLK
    // delay 2uS to allow the sync mux to switch over
    Wr( ISA_TIMERE, 0);
    while( Rd(ISA_TIMERE) < 2 ) {}
    // Bring out of reset but keep bypassed to allow to stablize
    //Wr( HHI_VID_PLL_CNTL, (0 << 15) | (0 << 14) | (hiu_reg & 0x3FFF) );
    Wr( HHI_VID_PLL_CNTL, hiu_reg );
    // Setup external divider in $clk_rst_tst/rtl/crt_video.v
    // wire    [3:0]   cntl_div_by_1       = hi_vid_clk_cntl[3:0];     // for LVDS we can divide by 1 (pll direct)
    // wire            cntl_vclk_gate      = hi_vid_clk_cntl[0];       // needed to mux divide by 1
    //
    // wire    [7:0]   cntl_xd             = hi_vid_clk_div[7:0];
    if( xd == 1 ) {
        // Set divide by 1 in crt_video
        Wr( HHI_VID_CLK_CNTL, Rd(HHI_VID_CLK_CNTL) | (0xF << 0) );
    } else {
        Wr( HHI_VID_CLK_CNTL, (Rd(HHI_VID_CLK_CNTL) & ~(0xF << 0)) );               // disable divide by 1 control
    }
    Wr( HHI_VID_CLK_DIV, (Rd(HHI_VID_CLK_DIV) & ~(0xFF << 0)) | (xd-1) );   // setup the XD divider value
    // delay 5uS
    Wr( ISA_TIMERE, 0);
    while( Rd(ISA_TIMERE) < 5 ) {}
    Wr( HHI_VID_CLK_CNTL, Rd(HHI_VID_CLK_CNTL) | (1 << 10) );   // Switch to the PLL
    // delay 2uS
    Wr( ISA_TIMERE, 0);
    while( Rd(ISA_TIMERE) < 2 ) {}
}
Ejemplo n.º 6
0
void Controller::frame()
{
	if (move[dirY] != 0.0) moveY(move[dirY]);
	if (move[dirZ] != 0.0) moveZ(move[dirZ]);
	
	if (look[dirX] != 0.0) lookX(look[dirX]);
	if (look[dirY] != 0.0) lookY(look[dirY]);
	if (look[dirZ] != 0.0) lookZ(look[dirZ]);
	
	if (move[dirY] != 0.0)
	{
		if ((move[dirX] < 0.0 && move[dirY] > 0.0)
		||  (move[dirX] > 0.0 && move[dirY] < 0.0))
			player->rotation = player->rotation * Rd(-0.05,Vd(0,0,1));
		else if ((move[dirX] > 0.0 && move[dirY] > 0.0)
		     ||  (move[dirX] < 0.0 && move[dirY] < 0.0))
			player->rotation = player->rotation * Rd(0.05,Vd(0,0,1));
		else
		{
            Vd camv = camAngle*Vd(0,1,0);
            Vd plav = player->rotation*Vd(0,1,0);
            camv.z = 0; camv = ~camv;
            plav.z = 0; plav = ~plav;
            double angle = atan2(camv.y - plav.y, camv.x - plav.x);
            double angle2 = (angle < 0? -angle : angle);
            double axis = angle2 >  0.5*Pi ^ angle > 0? 1 : -1;
            angle2 = angle2 > 0.5*Pi ? Pi - angle2 : angle2;
            angle2 = angle2 < 0.05? angle2 : 0.05;
			if (axis != 0)
                player->rotation = player->rotation * Rd(-angle2,Vd(0,0,axis));
		}
	}
	Vector<double> vec = (-player->rotation * Vector<double>(0,1,0));
	vec.z = 0;
	vec = ~vec;
	double yaw = atan2(vec.x, vec.y);
	target = player->origin + Pd(.75 * sin(yaw - .25*Pi), .75 * cos(yaw-.25*Pi), 2);
	vec = ~(camAngle * Vector<double>(0,1,0));
	if (firstPerson)
	{
		camera.lookAt(camera.origin + (vec * 5.0));
	}
	else
	{
		camera.lookAt(target);
	}
	Objects::Player * p = TO(Objects::Player,player);
	p->velocity = Vd(0,MoveSpeed,0);
}
Ejemplo n.º 7
0
static void SetPtPk(Rd *Pt,const int *dfon,int nn)
{  // P0 P1 et P2 , P1b 
    const int d= E::Rd::d;
    int k=0;
    
    if(dfon[0])
      {
	for(int i=0;i<=d;++i)
	  Pt[k++]=Rd();
	
	for(int i=0;i<d;++i)
	  Pt[i+1][i]=1.;
      }

    if(dfon[1]&& d !=1)
	for(int i=0;i<E::ne;++i)
	    Pt[k++] = (Pt[E::nvedge[i][0]]+Pt[E::nvedge[i][1]])*0.5;
    
    if(dfon[d]==1) 
	Pt[k++]=Rd::diag(1./(d+1));
    if(nn != k)
      { 
	cout << nn << " == " << k << " d = "<< d << " " << dfon[0]<< dfon[1]<<dfon[2]<<dfon[3]<<" "<< E::ne << endl;
	assert(nn==k); 
      }  
    if(verbosity>9)
      cout << " Pk = " << KN_<Rd>(Pt,nn)<<"\n";
    
}
void FsGuiColorDialog::UpdateRGBSliderFromCurrentColor(void)
{
	auto col=GetCurrentColor();
	redSlider->SetPosition(col.Rd());
	greenSlider->SetPosition(col.Gd());
	blueSlider->SetPosition(col.Bd());
}
Ejemplo n.º 9
0
void srcif_pure_sw_ptn()
{
	static int do_ptn_flag = 1;

	if(do_ptn_flag == 0){
		srcif_pure_ptn_flag = 1;
		return;
	}
	if(do_ptn_flag){
		int data32 = 0;
		Wr(SRCIF_WRAP_CTRL ,    0x00000020);
		//step 1, rst fifo, vmux, gate vpu, force fifo_en, vmux_en, vmux_sel
		Wr(SRCIF_WRAP_CTRL ,    0x0802aaa0);
		delay_us(1);
		//step 2, clock mux to ptn
		Wr(SRCIF_WRAP_CTRL ,    0x0812aaa0);
		delay_us(1);
		//step 3, Need a wait pll lock here
		//step 4, release rst of vmux, en vpu_clk_en
		Wr(SRCIF_WRAP_CTRL ,    0x0c12aba0);
		delay_us(1);
		//step 5, enable ptn_en, vmux_en
		Wr(SRCIF_WRAP_CTRL ,    0x0c12bbe0);
		Wr(VP_CTRL ,    Rd(VP_CTRL) | 0x2);
		delay_us(1);
	}
	do_ptn_flag = 0;
}
Ejemplo n.º 10
0
void Controller::lookZ(double speed)
{
	speed *= LookSpeed;
	speed *= FRATE;

    Qd buffer = camAngle;//Used to rollback if out of bounds

	Vector<double> mystery = ~(camAngle * Vector<double>(0,1,0));
	double mysteryYaw = atan2(mystery.x, mystery.y);

	camAngle = Qd(Rd(speed, Vd(cos(mysteryYaw),-sin(mysteryYaw),0))) * camAngle;
       if((camAngle*Vector<double>(0,1,0)).z > 0.99 || (camAngle*Vector<double>(0,1,0)).z < -0.99){
           camAngle = buffer;
           return;
       }
	Vector<double> vec = ~(camAngle * Vector<double>(0,1,0));

	if (firstPerson == true)
	{
		camera.origin = player->origin + Pd(0,0,2.5) + vec;
		camera.lookAt(camera.origin + (vec * 5.0));
	}
	else
	{
		camera.origin = target - (vec * zoom);
		camera.lookAt(target);
	}
}
Ejemplo n.º 11
0
BufferOffset Assembler::LogicalImmediate(const Register& rd, const Register& rn,
                                         unsigned n, unsigned imm_s, unsigned imm_r, LogicalOp op)
{
    unsigned reg_size = rd.size();
    Instr dest_reg = (op == ANDS) ? Rd(rd) : RdSP(rd);
    return Emit(SF(rd) | LogicalImmediateFixed | op | BitN(n, reg_size) |
                ImmSetBits(imm_s, reg_size) | ImmRotate(imm_r, reg_size) | dest_reg | Rn(rn));
}
Ejemplo n.º 12
0
void Droppable::preRender(){
	Object::preRender();
	int timelived = Video::ElapsedTime() - dropped;
	if(timelived >= ttl){
		done = true;
		return;
	}
	rotation = rotation * Rd(0.02, Vd(0,0,1));
}
Ejemplo n.º 13
0
BufferOffset Assembler::DataProcShiftedRegister(const Register& rd, const Register& rn,
                                                const Operand& operand, FlagsUpdate S, Instr op)
{
  VIXL_ASSERT(operand.IsShiftedRegister());
  VIXL_ASSERT(rn.Is64Bits() || (rn.Is32Bits() && is_uint5(operand.shift_amount())));
  return Emit(SF(rd) | op | Flags(S) |
              ShiftDP(operand.shift()) | ImmDPShift(operand.shift_amount()) |
              Rm(operand.reg()) | Rn(rn) | Rd(rd));
}
Ejemplo n.º 14
0
Archivo: ddr.c Proyecto: 223xh/TestCode
void set_ddr_clock(struct ddr_set * timing_reg)
{
	/*
#ifdef ENABLE_POWER_SAVING
    APB_Wr(PCTL_DLLCR_ADDR, APB_Rd(PCTL_DLLCR_ADDR)|(7<<2));
#endif
	*/

	M6_PLL_RESET(HHI_DDR_PLL_CNTL);
	Wr(HHI_DDR_PLL_CNTL2,M6_DDR_PLL_CNTL_2);
	Wr(HHI_DDR_PLL_CNTL3,M6_DDR_PLL_CNTL_3);
	Wr(HHI_DDR_PLL_CNTL4,M6_DDR_PLL_CNTL_4);
#ifdef CONFIG_CMD_DDR_TEST
	if((Rd(PREG_STICKY_REG0) & 0xffff) == 0x2012){
        zqcr = (Rd(PREG_STICKY_REG0) >> 16);
		Wr(HHI_DDR_PLL_CNTL, Rd(PREG_STICKY_REG1));
		Wr(PREG_STICKY_REG0, 0);
        Wr(PREG_STICKY_REG1, 0);
	}
Spectrum DipoleSubsurfaceIntegrator::Li(const Scene *scene, const Renderer *renderer,
        const RayDifferential &ray, const Intersection &isect,
        const Sample *sample, RNG &rng, MemoryArena &arena) const {
    Spectrum L(0.);
    Vector wo = -ray.d;
    // Compute emitted light if ray hit an area light source
    L += isect.Le(wo);

    // Evaluate BSDF at hit point
    BSDF *bsdf = isect.GetBSDF(ray, arena);
    const Point &p = bsdf->dgShading.p;
    const Normal &n = bsdf->dgShading.nn;

    Spectrum rho_dr = Spectrum(1.0f);

    // Evaluate BSSRDF and possibly compute subsurface scattering
    BSSRDF *bssrdf = isect.GetBSSRDF(ray, arena);
    if (bssrdf && octree) {	
        Spectrum sigma_a  = bssrdf->sigma_a();
        Spectrum sigmap_s = bssrdf->sigma_prime_s();
        Spectrum sigmap_t = sigmap_s + sigma_a;
        if (!sigmap_t.IsBlack()) {
            // Use hierarchical integration to evaluate reflection from dipole model
            PBRT_SUBSURFACE_STARTED_OCTREE_LOOKUP(const_cast<Point *>(&p));
            DiffusionReflectance Rd(sigma_a, sigmap_s, bssrdf->eta());
            Spectrum Mo = octree->Mo(octreeBounds, p, Rd, maxError);
            FresnelDielectric fresnel(1.f, bssrdf->eta());
            Spectrum Ft = Spectrum(1.f) - fresnel.Evaluate(AbsDot(wo, n));
            float Fdt = 1.f - Fdr(bssrdf->eta());

	    // modulate SSS contribution by rho_dr
            //L += (INV_PI * Ft) * (Fdt * Mo);
	    rho_dr = wet->integrate_BRDF(bsdf, ray.d, 10, BxDFType(BSDF_REFLECTION | BSDF_GLOSSY));
	    L += (INV_PI * Ft) * (Fdt * Mo) * (Spectrum(1.0f) - rho_dr);
	    //L += (INV_PI * Ft) * (Fdt * Mo) * (Spectrum(0.0f));
	    
            PBRT_SUBSURFACE_FINISHED_OCTREE_LOOKUP();
        }
    }

    L += UniformSampleAllLights(scene, renderer, arena, p, n,
        wo, isect.rayEpsilon, ray.time, bsdf, sample, rng, lightSampleOffsets,
        bsdfSampleOffsets);

    if (ray.depth < maxSpecularDepth) {
        // Trace rays for specular reflection and refraction.

      //TODO: this has no effect?
        L += SpecularReflect(ray, bsdf, rng, isect, renderer, scene,
			     sample, arena);
        L += SpecularTransmit(ray, bsdf, rng, isect,
			      renderer, scene, sample, arena);
    }
    return L;
}
void BkgShapeBinnedExtractor::FillHists()
/////////////////////////////////////////
{
  int Nbins = bins.size();
  std::cout << "Number of bins = " << Nbins << std::endl;
  Bkg2DFit* RB2DF = new Bkg2DFit(m_tree,bins[0],m_ParamFile);

  //---- Fill data histogram ----//
  int entries = (int)m_tree->GetEntriesFast();
  TreeReader Rd(m_tree);
  for( int entry=0 ; entry< entries ; entry++ ){
    Rd.GetEntry(entry);
    double Iso_L  = Rd.GetVariable("Iso_L");
    double Iso_SL = Rd.GetVariable("Iso_SL");
    int Tight_L   = Rd.GetVariable("IsTight_L");
    int Tight_SL  = Rd.GetVariable("IsTight_SL");
    double mgg    = Rd.GetVariable("mgg");
    hmgg->Fill(mgg);
    if( Tight_L==1 && Tight_SL==1 && 
	Iso_L < 5 && Iso_SL<5 )
      hmgg_iso->Fill(mgg);
  }
  for(int ibin=0 ; ibin < Nbins ; ibin++){
    bool do1Dfits    = true;
    bool do2Dfits    = true;
    bool doSplot     = false;
    RB2DF->Init(bins[ibin],m_ParamFile);
    RB2DF->Fitter(do1Dfits,do2Dfits,doSplot);
    RB2DF->PlotResults();
    hmgg_tot->SetBinContent(ibin+1,RB2DF->GetSumofYields_NoIso()); 
    hmgg_tot->SetBinError(ibin+1,RB2DF->GetSumofYieldsError_NoIso()); 
    hmgg_gg->SetBinContent(ibin+1,RB2DF->GetNgamgamYield_NoIso()); 
    hmgg_gg->SetBinError(ibin+1,RB2DF->GetNgamgamYieldError_NoIso()); 
    hmgg_gj->SetBinContent(ibin+1,RB2DF->GetNgamjetYield_NoIso()); 
    hmgg_gj->SetBinError(ibin+1,RB2DF->GetNgamjetYieldError_NoIso()); 
    hmgg_jg->SetBinContent(ibin+1,RB2DF->GetNjetgamYield_NoIso()); 
    hmgg_jg->SetBinError(ibin+1,RB2DF->GetNjetgamYieldError_NoIso()); 
    hmgg_jj->SetBinContent(ibin+1,RB2DF->GetNjetjetYield_NoIso()); 
    hmgg_jj->SetBinError(ibin+1,RB2DF->GetNjetjetYieldError_NoIso()); 
    //---------------------------------------------------------------
    hmgg_tot_iso->SetBinContent(ibin+1,RB2DF->GetSumofYields()); 
    hmgg_tot_iso->SetBinError(ibin+1,RB2DF->GetSumofYieldsError()); 
    hmgg_gg_iso->SetBinContent(ibin+1,RB2DF->GetNgamgamYield()); 
    hmgg_gg_iso->SetBinError(ibin+1,RB2DF->GetNgamgamYieldError()); 
    hmgg_gj_iso->SetBinContent(ibin+1,RB2DF->GetNgamjetYield()); 
    hmgg_gj_iso->SetBinError(ibin+1,RB2DF->GetNgamjetYieldError()); 
    hmgg_jg_iso->SetBinContent(ibin+1,RB2DF->GetNjetgamYield()); 
    hmgg_jg_iso->SetBinError(ibin+1,RB2DF->GetNjetgamYieldError()); 
    hmgg_jj_iso->SetBinContent(ibin+1,RB2DF->GetNjetjetYield()); 
    hmgg_jj_iso->SetBinError(ibin+1,RB2DF->GetNjetjetYieldError()); 
    //---------------------------------------------------------------
  }
  delete RB2DF;
}
Ejemplo n.º 17
0
static void build_Rd_table(ScatterSettings *ss)
{
	float r;
	int i, size = RD_TABLE_SIZE+1;

	ss->tableRd= MEM_mallocN(sizeof(float)*size, "scatterTableRd");
	ss->tableRd2= MEM_mallocN(sizeof(float)*size, "scatterTableRd");

	for (i= 0; i < size; i++) {
		r= i*(RD_TABLE_RANGE/RD_TABLE_SIZE);
		/*if (r < ss->invsigma_t_*ss->invsigma_t_)
			r= ss->invsigma_t_*ss->invsigma_t_;*/
		ss->tableRd[i]= Rd(ss, sqrt(r));

		r= i*(RD_TABLE_RANGE_2/RD_TABLE_SIZE);
		/*if (r < ss->invsigma_t_)
			r= ss->invsigma_t_;*/
		ss->tableRd2[i]= Rd(ss, r);
	}
}
Ejemplo n.º 18
0
u32  VSYNCOSD_RD_MPEG_REG(unsigned long addr)
{
	int  i;

	if(rdma_enable)
	{
		for(i=(item_count -1); i>=0; i--)
		{
			if(addr==rdma_table[i].addr)
			return rdma_table[i].val;
		}
	}
	return Rd(addr);
}    
Ejemplo n.º 19
0
static int lvds_resume(void)
{
    int j;
    int m = 200, n = 300;

    if (pdata->lvds_panel_power_on)
        pdata->lvds_panel_power_on();

    for (j=0; j<n; j++)
        udelay(1000);

    Wr(REG_LVDS_PHY_CNTL4, Rd(REG_LVDS_PHY_CNTL4)|0xfff); //LVDS_MDR_PU
    Wr(REG_LVDS_PHY_CNTL5,  Rd(REG_LVDS_PHY_CNTL5)|(0xf<<11)); //LVDS_REFCTL<4:0>=<01111>
    Wr(REG_LVDS_PHY_CNTL0,0xfff); //LVDS_PDN_A*=1, LVDS_PDN_B*=1

    for (j=0; j<m; j++)
        udelay(1000);

    if (pdata->lvds_backlight_power_on)
        pdata->lvds_backlight_power_on();
    printk("vout lvds resume\n");

    return 0;
}
Ejemplo n.º 20
0
// -----------------------------------------
// clk_util_lvds_set_clk_div()
// -----------------------------------------
// This task is used to setup the LVDS dividers.
//
// Dual Pixel Mode
//    clk_util_lvds_set_clk_div(  2,          // unsigned long   divn_sel,        // select divide by 3.5
//                                7,          // unsigned long   divn_tcnt,       // ignored
//                                0 );        // unsigned long   div2_en,         // divide by 1 for LVDS
//
// Single Pixel Mode
//    clk_util_lvds_set_clk_div(  1,          // unsigned long   divn_sel,        // select divide by N
//                                7,          // unsigned long   divn_tcnt,       // divide by 7
//                                0 );        // unsigned long   div2_en,         // divide by 1 for LVDS
static void    clk_util_lvds_set_clk_div(  unsigned long   divn_sel,
        unsigned long   divn_tcnt,
        unsigned long   div2_en  )
{
    // assign          lvds_div_phy_clk_en     = tst_lvds_tmode ? 1'b1         : phy_clk_cntl[10];
    // assign          lvds_div_div2_sel       = tst_lvds_tmode ? atest_i[5]   : phy_clk_cntl[9];
    // assign          lvds_div_sel            = tst_lvds_tmode ? atest_i[7:6] : phy_clk_cntl[8:7];
    // assign          lvds_div_tcnt           = tst_lvds_tmode ? 3'd6         : phy_clk_cntl[6:4];
    // If dividing by 1, just select the divide by 1 path
    if( divn_tcnt == 1 ) {
        divn_sel = 0;
    }

    Wr( REG_LVDS_PHY_CLK_CNTL, ((Rd(REG_LVDS_PHY_CLK_CNTL) & ~((0x3 << 7) | (1 << 9) | (0x7 << 4))) | ((1 << 10) | (divn_sel << 7) | (div2_en << 9) | (((divn_tcnt-1)&0x7) << 4))) );
}
Ejemplo n.º 21
0
void Controller::lookX(double speed)
{
	speed *= -LookSpeed;
	speed *= FRATE;

	camAngle = Qd(Rd(speed, Vd(0,0,1))) * camAngle;

	Vector<double> vec = ~(camAngle * Vector<double>(0,1,0));

	if (firstPerson == true)
	{
		camera.origin = player->origin + Pd(0,0,2.5) + vec;
		camera.lookAt(camera.origin + (vec * 5.0));
	}
	else
	{
		camera.origin = target - (vec * zoom);
		camera.lookAt(target);
	}
}
Ejemplo n.º 22
0
void init_lvds_phy(void)
{
    unsigned tmp_add_data;
    Wr(REG_LVDS_PHY_CNTL4, Rd(REG_LVDS_PHY_CNTL4)|0xfff);

    Wr(REG_LVDS_PHY_CNTL3, 0x3f);

    tmp_add_data  = 0;
    tmp_add_data |= 0xf<<0; //LVDS_PREM_CTL<3:0>=<1111>
    tmp_add_data |= 0x3 << 4; //LVDS_SWING_CTL<3:0>=<0011>
    tmp_add_data |= 0x2<<8 ; //LVDS_VCM_CTL<2:0>=<010>
    tmp_add_data |= 0xf<<11; //LVDS_REFCTL<4:0>=<01111>

    Wr(REG_LVDS_PHY_CNTL5, tmp_add_data);

    Wr(REG_LVDS_PHY_CNTL0,0xfff);
    Wr(REG_LVDS_PHY_CNTL1,0xfff);
    Wr(REG_LVDS_PHY_CNTL2,0xfff);

    Wr(REG_LVDS_PHY_CNTL6,0xcccc);
    Wr(REG_LVDS_PHY_CNTL7,0xcccc);
    Wr(REG_LVDS_PHY_CNTL8,0xcccc);
}
Ejemplo n.º 23
0
void srcif_fsm_no_mute_stbl()
{
	Wr(SRCIF_WRAP_CTRL1,    (Rd(SRCIF_WRAP_CTRL1) & 0xffbfffff));
}
Ejemplo n.º 24
0
void srcif_fsm_mute_stbl()
{
	Wr(SRCIF_WRAP_CTRL1,    (Rd(SRCIF_WRAP_CTRL1) | 0x400000));
}
Ejemplo n.º 25
0
void disassembler::Ry(const x86_insn *insn)
{
  if (insn->os_64) Rq(insn);
  else Rd(insn);
}
Ejemplo n.º 26
0
void srcif_fsm_clk_freerun()
{
	Wr(SRCIF_WRAP_CTRL,    (Rd(SRCIF_WRAP_CTRL) | 0x40000));
}
Ejemplo n.º 27
0
void srcif_hybrid_fsm_ctrl()
{
	int data32 = 0;
	//check status register
	data32 = Rd(SRCIF_WRAP_STATUS);
	LOGD(TAG_VPP, "status = %x\n",data32);
	LOGD(TAG_VPP, "state = %x\n",data32 & 0x7);

	if ((data32 & 0x7) == 0x0) {
		LOGD(TAG_VPP, "state: st_idle\n");
	}
	else if ((data32 & 0x7) == 0x1) {
		delay_us(100);
		LOGD(TAG_VPP, "state: st_rst_all, goto st_clk_mux\n");
		Wr(SRCIF_WRAP_CTRL1,Rd(SRCIF_WRAP_CTRL1) & 0xffffffdf);
		Wr(SRCIF_WRAP_CTRL1,Rd(SRCIF_WRAP_CTRL1) | 0x20);
		Wr(SRCIF_WRAP_CTRL1,Rd(SRCIF_WRAP_CTRL1) & 0xffffffdf);
	}
	else if ((data32 & 0x7) == 0x2) {
		LOGD(TAG_VPP, "state: st_mux_clk\n");
		data32 = Rd(SRCIF_WRAP_STATUS);
		while ((data32 & 0x400) != 0x400) {
			delay_us(1);
			data32 = Rd(SRCIF_WRAP_STATUS);
		}

		if ((data32 & 0x0800) == 0x0800) {
			LOGD(TAG_VPP, "state: st_mux_clk, stbl , goto st_hdmi\n");
			Wr(SRCIF_WRAP_CTRL1,Rd(SRCIF_WRAP_CTRL1) & 0xffffff7f);
			Wr(SRCIF_WRAP_CTRL1,Rd(SRCIF_WRAP_CTRL1) | 0x80);
			Wr(SRCIF_WRAP_CTRL1,Rd(SRCIF_WRAP_CTRL1) & 0xffffff7f);
		}
		else {
			LOGD(TAG_VPP, "state: st_clk_mux, un stbl , goto st_ptn\n");
			Wr(SRCIF_WRAP_CTRL1,Rd(SRCIF_WRAP_CTRL1) & 0xffffffbf);
			Wr(SRCIF_WRAP_CTRL1,Rd(SRCIF_WRAP_CTRL1) | 0x40);
			Wr(SRCIF_WRAP_CTRL1,Rd(SRCIF_WRAP_CTRL1) & 0xffffffbf);
		}

	}
	else if ((data32 & 0x7) == 0x3) {
		LOGD(TAG_VPP, "state: st_hdmi\n");
	}
	else if ((data32 & 0x7) == 0x4) {
		LOGD(TAG_VPP, "state: st_ptn\n");
	}
}
Ejemplo n.º 28
0
void srcif_fsm_fc_stbl()
{
	Wr(SRCIF_WRAP_CTRL ,    (Rd(SRCIF_WRAP_CTRL) | 0xc00000));
}
Ejemplo n.º 29
0
void srcif_fsm_stbl_from_hdmi()
{
    Wr(SRCIF_WRAP_CTRL ,    (Rd(SRCIF_WRAP_CTRL) && 0xff3fffff));
}
Ejemplo n.º 30
0
void srcif_fsm_fc_unstbl()
{
	Wr(SRCIF_WRAP_CTRL ,    ((Rd(SRCIF_WRAP_CTRL) & 0xff3fffff)| 0x80800000));
}