void
AllCtrlRegs_r10b::ValidateCtlRegisterROAttribute(CtlSpc reg)
{
uint64_t value = 0;
uint64_t expectedValue = 0;
const CtlSpcType *ctlMetrics = gRegisters->GetCtlMetrics();
if (ctlMetrics[reg].size > MAX_SUPPORTED_REG_SIZE) {
for (int k = 0; (k*sizeof(value)) < ctlMetrics[reg].size; k++) {
if (gRegisters->Read(NVMEIO_BAR01, sizeof(value),
ctlMetrics[reg].offset + (k * sizeof(value)),
(uint8_t *)&value) == false) {
throw exception();
} else {
// Ignore the implementation specific bits, and bits that the
// manufacturer can make a decision as to their type of access
value &= ~ctlMetrics[reg].impSpec;
// Verify that the RO bits are set to correct default values, no
// reset needed to achieve this because there's no way to change.
value &= ctlMetrics[reg].maskRO;
expectedValue =
(ctlMetrics[reg].dfltValue & ctlMetrics[reg].maskRO);
if (value != expectedValue) {
LOG_ERR("%s RO bit #%d has incorrect value",
ctlMetrics[reg].desc,
ReportOffendingBitPos(value, expectedValue));
throw exception();
}
}
}
} else if (gRegisters->Read(reg, value) == false) {
throw exception();
} else {
// Ignore the implementation specific bits, and bits that the
// manufacturer can make a decision as to their type of access RW/RO
value &= ~ctlMetrics[reg].impSpec;
// Verify that the RO bits are set to correct default values, no
// reset needed to achieve this because there's no way to change.
value &= ctlMetrics[reg].maskRO;
expectedValue = (ctlMetrics[reg].dfltValue & ctlMetrics[reg].maskRO);
if (value != expectedValue) {
LOG_ERR("%s RO bit #%d has incorrect value",
ctlMetrics[reg].desc,
ReportOffendingBitPos(value, expectedValue));
throw exception();
}
}
}
void
CtrlrResetDefaults_r10b::ValidateCtrlrRWDefaultsAfterReset(std::map <int,
uint64_t>& ctrlRegsMap)
{
uint64_t value = 0;
uint64_t expectedVal = 0;
const CtlSpcType *ctlMetrics = gRegisters->GetCtlMetrics();
/// Traverse the ctrl'r registers
for (int j = 0; j < CTLSPC_FENCE; j++) {
if (ctlMetrics[j].specRev != mSpecRev)
continue;
// Reserved areas at NOT suppose to be written so not validated
if ((j == CTLSPC_RES1) || (j == CTLSPC_RES2) || (j == CTLSPC_RES3))
continue;
// AQA, ASQ and ACQ register vals are checked against remembered values
if ((j == CTLSPC_AQA) || (j == CTLSPC_ASQ) || (j == CTLSPC_ACQ)) {
if (gRegisters->Read((CtlSpc)j, value) == false)
throw FrmwkEx(HERE);
if (value != ctrlRegsMap[j]) {
LOG_ERR("%s is incorrectly modified expected value is 0x%lX "
"but actual value 0x%lX", ctlMetrics[j].desc, ctrlRegsMap[j],
value);
throw FrmwkEx(HERE);
}
continue;
}
// Validate RW bits are reset to default values
if (gRegisters->Read((CtlSpc)j, value) == false)
throw FrmwkEx(HERE);
value &= ~ctlMetrics[j].maskRO;
if (value != expectedVal) {
throw FrmwkEx(HERE,
"%s RW bit #%d has incorrect value", ctlMetrics[j].desc,
ReportOffendingBitPos(value, expectedVal));
}
}
}
