static void setup_sdhci0_irq_cd (void)
{
/* init GPIO as a ext irq */
s3c_gpio_cfgpin(S5P64XX_GPN(13), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5P64XX_GPN(13), S3C_GPIO_PULL_NONE);
set_irq_type(S3C_EINT(13), IRQ_TYPE_EDGE_BOTH);
}
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
};
/*
* Configuring Ethernet on SMDK6410
*
* Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
* The constant address below corresponds to nCS1
*
* 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
* 2) CFG6 needs to be switched to "LAN9115" side
*/
static struct resource smdk6410_smsc911x_resources[] = {
[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),
[1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \
| IRQ_TYPE_LEVEL_LOW),
};
static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
.flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
.phy_interface = PHY_INTERFACE_MODE_MII,
};
static struct platform_device smdk6410_smsc911x = {
.name = "smsc911x",
.id = -1,
.num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.win[0] = &smdk6410_fb_win0,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
};
static struct resource smdk6410_smsc911x_resources[] = {
[0] = {
.start = S3C64XX_PA_XM0CSN1,
.end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = S3C_EINT(10),
.end = S3C_EINT(10),
.flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
},
};
static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
.flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
.phy_interface = PHY_INTERFACE_MODE_MII,
};
static struct platform_device smdk6410_smsc911x = {
.name = "smsc911x",
static struct gpio_keys_platform_data crag6410_gpio_keydata = {
.buttons = crag6410_gpio_keys,
.nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
};
static struct platform_device crag6410_gpio_keydev = {
.name = "gpio-keys",
.id = 0,
.dev.platform_data = &crag6410_gpio_keydata,
};
static struct resource crag6410_dm9k_resource[] = {
[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
[2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHLEVEL),
};
static struct dm9000_plat_data mini6410_dm9k_pdata = {
.flags = DM9000_PLATF_16BITONLY,
};
static struct platform_device crag6410_dm9k_device = {
.name = "dm9000",
.id = -1,
.num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
.resource = crag6410_dm9k_resource,
.dev.platform_data = &mini6410_dm9k_pdata,
};
.dev.platform_data = &crag6410_gpio_keydata,
};
static struct resource crag6410_dm9k_resource[] = {
[0] = {
.start = S3C64XX_PA_XM0CSN5,
.end = S3C64XX_PA_XM0CSN5 + 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = S3C64XX_PA_XM0CSN5 + (1 << 8),
.end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = S3C_EINT(17),
.end = S3C_EINT(17),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
static struct dm9000_plat_data mini6410_dm9k_pdata = {
.flags = DM9000_PLATF_16BITONLY,
};
static struct platform_device crag6410_dm9k_device = {
.name = "dm9000",
.id = -1,
.num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
.resource = crag6410_dm9k_resource,
.dev.platform_data = &mini6410_dm9k_pdata,
/* DM9000AEP 10/100 ethernet controller */
static struct resource real6410_dm9k_resource[] = {
[0] = {
.start = S3C64XX_PA_XM0CSN1,
.end = S3C64XX_PA_XM0CSN1 + 1,
.flags = IORESOURCE_MEM
},
[1] = {
.start = S3C64XX_PA_XM0CSN1 + 4,
.end = S3C64XX_PA_XM0CSN1 + 5,
.flags = IORESOURCE_MEM
},
[2] = {
.start = S3C_EINT(7),
.end = S3C_EINT(7),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
}
};
static struct dm9000_plat_data real6410_dm9k_pdata = {
.flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
};
static struct platform_device real6410_device_eth = {
.name = "dm9000",
.id = -1,
.num_resources = ARRAY_SIZE(real6410_dm9k_resource),
.resource = real6410_dm9k_resource,
.dev = {
},
[3] = {
.hwport = 3,
.flags = 0,
.ucon = UCON,
.ulcon = ULCON,
.ufcon = UFCON,
},
};
/* DM9000AEP 10/100 ethernet controller */
static struct resource real6410_dm9k_resource[] = {
[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
[2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHLEVEL),
};
static struct dm9000_plat_data real6410_dm9k_pdata = {
.flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
};
static struct platform_device real6410_device_eth = {
.name = "dm9000",
.id = -1,
.num_resources = ARRAY_SIZE(real6410_dm9k_resource),
.resource = real6410_dm9k_resource,
.dev = {
.platform_data = &real6410_dm9k_pdata,
},
s3c_gpio_cfgpin(S5P64XX_GPN(13), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5P64XX_GPN(13), S3C_GPIO_PULL_NONE);
set_irq_type(S3C_EINT(13), IRQ_TYPE_EDGE_BOTH);
}
static uint detect_sdhci0_irq_cd (void)
{
uint detect;
detect = readl(S5P64XX_GPNDAT);
detect &= 0x2000; /* GPN13 */
return (!detect);
}
static struct s3c_sdhci_platdata s3c_hsmmc0_platdata = {
.max_width = 4,
.host_caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED |
MMC_CAP_SD_HIGHSPEED | MMC_CAP_BOOT_ONTHEFLY),
.cfg_ext_cd = setup_sdhci0_irq_cd,
.detect_ext_cd = detect_sdhci0_irq_cd,
.ext_cd = S3C_EINT(13),
};
void smdk6440_setup_sdhci0 (void)
{
s3c_sdhci0_set_platdata(&s3c_hsmmc0_platdata);
}
s3c_gpio_cfgpin(S3C64XX_GPN(12), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_NONE);
set_irq_type(S3C_EINT(12), IRQ_TYPE_EDGE_BOTH);
}
static uint detect_sdhci0_irq_cd (void)
{
uint detect;
detect = readl(S3C64XX_GPNDAT);
detect &= 0x1000; /* GPN12 */
return (!detect);
}
static struct s3c_sdhci_platdata s3c_hsmmc0_platdata = {
.max_width = 4,
.host_caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED |
MMC_CAP_SD_HIGHSPEED | MMC_CAP_BOOT_ONTHEFLY),
.cfg_ext_cd = setup_sdhci0_irq_cd,
.detect_ext_cd = detect_sdhci0_irq_cd,
.ext_cd = S3C_EINT(12),
};
void smdk6410_setup_sdhci0 (void)
{
s3c_sdhci0_set_platdata(&s3c_hsmmc0_platdata);
}
.line = S3C64XX_GPC(3),
};
static struct wm0010_pdata wm0010_pdata = {
.gpio_reset = S3C64XX_GPN(6),
.reset_active_high = 1, /* Active high for Glenfarclas Rev 2 */
};
static struct spi_board_info wm1253_devs[] = {
[0] = {
.modalias = "wm0010",
.max_speed_hz = 26 * 1000 * 1000,
.bus_num = 0,
.chip_select = 0,
.mode = SPI_MODE_0,
.irq = S3C_EINT(4),
.controller_data = &wm0010_spi_csinfo,
.platform_data = &wm0010_pdata,
},
};
static struct spi_board_info balblair_devs[] = {
[0] = {
.modalias = "wm0010",
.max_speed_hz = 26 * 1000 * 1000,
.bus_num = 0,
.chip_select = 0,
.mode = SPI_MODE_0,
.irq = S3C_EINT(4),
.controller_data = &wm0010_spi_csinfo,
.platform_data = &wm0010_pdata,
},
.status = {
&wm1192_led7_pdata,
&wm1192_led8_pdata,
},
};
#endif
static struct i2c_board_info i2c_devs0[] __initdata = {
{ I2C_BOARD_INFO("24c08", 0x50), },
{ I2C_BOARD_INFO("wm8580", 0x1b), },
#ifdef CONFIG_SMDK6410_WM1192_EV1
{ I2C_BOARD_INFO("wm8312", 0x34),
.platform_data = &ok6410_wm1192_pdata,
.irq = S3C_EINT(12),
},
#endif
#ifdef CONFIG_SMDK6410_WM1190_EV1
{ I2C_BOARD_INFO("wm8350", 0x1a),
.platform_data = &ok6410_wm8350_pdata,
.irq = S3C_EINT(12),
},
#endif
};
static struct i2c_board_info i2c_devs1[] __initdata = {
{ I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
};
*
* Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
* The constant address below corresponds to nCS1
*
* 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
* 2) CFG6 needs to be switched to "LAN9115" side
*/
static struct resource smdk6410_smsc911x_resources[] = {
[0] = {
.start = S3C64XX_PA_XM0CSN1,
.end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = S3C_EINT(10),
.end = S3C_EINT(10),
.flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
},
};
static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
.flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
.phy_interface = PHY_INTERFACE_MODE_MII,
};
static struct platform_device smdk6410_smsc911x = {
.name = "smsc911x",
#include <plat/s3c64xx-spi.h>
#include <mach/crag6410.h>
static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
.line = S3C64XX_GPC(3),
};
static struct spi_board_info wm1253_devs[] = {
[0] = {
.modalias = "wm0010",
.bus_num = 0,
.chip_select = 0,
.mode = SPI_MODE_0,
.irq = S3C_EINT(5),
.controller_data = &wm0010_spi_csinfo,
},
};
static struct wm5100_pdata wm5100_pdata = {
.ldo_ena = S3C64XX_GPN(7),
.irq_flags = IRQF_TRIGGER_HIGH,
.gpio_base = CODEC_GPIO_BASE,
.in_mode = {
WM5100_IN_DIFF,
WM5100_IN_DIFF,
WM5100_IN_DIFF,
WM5100_IN_SE,
},
