static int da850_sata_init(struct device *dev, void __iomem *addr)
{
	int i, ret;
	unsigned int val;

	da850_sata_clk = clk_get(dev, NULL);
	if (IS_ERR(da850_sata_clk))
		return PTR_ERR(da850_sata_clk);

	ret = clk_enable(da850_sata_clk);
	if (ret)
		goto err0;

	/* Enable SATA clock receiver */
	val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
	val &= ~BIT(0);
	__raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));

	/* Get the multiplier needed for 1.5GHz PLL output */
	for (i = 0; i < ARRAY_SIZE(da850_sata_xtal); i++) {
		if (da850_sata_xtal[i] == da850_sata_refclkpn)
			break;
	}

	if (i == ARRAY_SIZE(da850_sata_xtal)) {
		ret = -EINVAL;
		goto err1;
	} else {
		val = SATA_PHY_MPY(i + 1);
	}

	val |= SATA_PHY_LB(0) |
		SATA_PHY_LOS(1) |
		SATA_PHY_RXINVPAIR(0) |
		SATA_PHY_RXTERM(0) |
		SATA_PHY_RXCDR(4) |
		SATA_PHY_RXEQ(1) |
		SATA_PHY_TXINVPAIR(0) |
		SATA_PHY_TXCM(0) |
		SATA_PHY_TXSWING(3) |
		SATA_PHY_TXDE(0) |
		SATA_PHY_OVERRIDE(0) |
		SATA_PHY_ENPLL(1);

	__raw_writel(val, addr + SATA_P0PHYCR_REG);

	return 0;

err1:
	clk_disable(da850_sata_clk);
err0:
	clk_put(da850_sata_clk);
	return ret;
}
Ejemplo n.º 2
0
static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg,
			    void __iomem *ahci_base, u32 mpy)
{
	unsigned int val;

	/* Enable SATA clock receiver */
	val = readl(pwrdn_reg);
	val &= ~BIT(0);
	writel(val, pwrdn_reg);

	val = SATA_PHY_MPY(mpy) | SATA_PHY_LOS(1) | SATA_PHY_RXCDR(4) |
	      SATA_PHY_RXEQ(1) | SATA_PHY_TXSWING(3) | SATA_PHY_ENPLL(1);

	writel(val, ahci_base + SATA_P0PHYCR_REG);
}