int clear_md_region_protection(int md_id) { unsigned int rom_mem_mpu_id, rw_mem_mpu_id; printk("[EEMCS/PLAT] Clear MD%d region protect...\n", md_id+1); switch(md_id) { case MD_SYS5: rom_mem_mpu_id = 1; //0; rw_mem_mpu_id = 2; //1; break; default: printk("[EEMCS/PLAT] [Error]clear_md_region_protection: invalid md_id=%d\n", md_id+1); return -1; } printk("[EEMCS/PLAT] Clear MPU protect MD%d ROM region<%d>\n", md_id+1, rom_mem_mpu_id); emi_mpu_set_region_protection(0, /*START_ADDR*/ 0, /*END_ADDR*/ rom_mem_mpu_id, /*region*/ SET_ACCESS_PERMISSON(NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION)); printk("[EEMCS/PLAT] Clear MPU protect MD%d R/W region<%d>\n", md_id+1, rw_mem_mpu_id); emi_mpu_set_region_protection(0, /*START_ADDR*/ 0, /*END_ADDR*/ rw_mem_mpu_id, /*region*/ SET_ACCESS_PERMISSON(NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION)); return 0; }
INT32 mtk_wcn_consys_hw_restore(struct device *device) { UINT32 addrPhy = 0; if (gConEmiPhyBase) { #if CONSYS_EMI_MPU_SETTING /*set MPU for EMI share Memory */ WMT_PLAT_INFO_FUNC("setting MPU for EMI share memory\n"); #if defined(CONFIG_ARCH_MT6735) emi_mpu_set_region_protection(gConEmiPhyBase + SZ_1M / 2, gConEmiPhyBase + SZ_1M - 1, 13, SET_ACCESS_PERMISSON(FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN, NO_PROTECTION)); #elif defined(CONFIG_ARCH_MT6735M) emi_mpu_set_region_protection(gConEmiPhyBase, gConEmiPhyBase + SZ_1M - 1, 6, SET_ACCESS_PERMISSON(FORBIDDEN, NO_PROTECTION, FORBIDDEN, NO_PROTECTION)); #elif defined(CONFIG_ARCH_MT6753) emi_mpu_set_region_protection(gConEmiPhyBase + SZ_1M / 2, gConEmiPhyBase + SZ_1M - 1, 13, SET_ACCESS_PERMISSON(FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN, NO_PROTECTION)); #else WMT_PLAT_WARN_FUNC("not define platform config\n"); #endif #endif /*consys to ap emi remapping register:10000320, cal remapping address */ addrPhy = (gConEmiPhyBase & 0xFFF00000) >> 20; /*enable consys to ap emi remapping bit12 */ addrPhy = addrPhy | 0x1000; CONSYS_REG_WRITE(conn_reg.topckgen_base + CONSYS_EMI_MAPPING_OFFSET, CONSYS_REG_READ(conn_reg.topckgen_base + CONSYS_EMI_MAPPING_OFFSET) | addrPhy); WMT_PLAT_INFO_FUNC("CONSYS_EMI_MAPPING dump in restore cb(0x%08x)\n", CONSYS_REG_READ(conn_reg.topckgen_base + CONSYS_EMI_MAPPING_OFFSET)); #if 1 pEmibaseaddr = ioremap_nocache(gConEmiPhyBase + SZ_1M / 2, CONSYS_EMI_MEM_SIZE); #else pEmibaseaddr = ioremap_nocache(CONSYS_EMI_AP_PHY_BASE, CONSYS_EMI_MEM_SIZE); #endif if (pEmibaseaddr) { WMT_PLAT_WARN_FUNC("EMI mapping OK(0x%p)\n", pEmibaseaddr); memset_io(pEmibaseaddr, 0, CONSYS_EMI_MEM_SIZE); } else { WMT_PLAT_ERR_FUNC("EMI mapping fail\n"); } } else {
/*----------------------------------------------------------------------------*/ VOID HifPdmaInit ( GL_HIF_INFO_T *HifInfo ) { /* IO remap GDMA register memory */ HifInfo->DmaRegBaseAddr = ioremap(AP_DMA_HIF_BASE, AP_DMA_HIF_0_LENGTH); /* assign GDMA operators */ HifInfo->DmaOps = &HifGdmaOps; /* enable GDMA mode */ HifInfo->fgDmaEnable = TRUE; #if 0 // MPU Setting, we need to enable it after MPU ready // WIFI using TOP 512KB printk("[wlan] MPU region 12, 0x%08x - 0x%08x\n", (UINT_32)gConEmiPhyBase, (UINT_32)(gConEmiPhyBase + 512*1024)); emi_mpu_set_region_protection(gConEmiPhyBase, gConEmiPhyBase + 512*1024 - 1, 12, SET_ACCESS_PERMISSON(NO_PROTECTION,FORBIDDEN,FORBIDDEN,FORBIDDEN,FORBIDDEN,NO_PROTECTION,FORBIDDEN,FORBIDDEN)); #endif GDMA_DBG(("GDMA> HifGdmaInit ok!\n")); }
INT32 mtk_wcn_consys_hw_init() { INT32 iRet = -1; UINT32 addrPhy = 0; /*set MPU for EMI share Memory*/ WMT_PLAT_INFO_FUNC("setting MPU for EMI share memory\n"); emi_mpu_set_region_protection(gConEmiPhyBase + SZ_1M/2, gConEmiPhyBase + SZ_1M, 5, SET_ACCESS_PERMISSON(FORBIDDEN,NO_PROTECTION,FORBIDDEN,NO_PROTECTION)); WMT_PLAT_INFO_FUNC("get consys start phy address(0x%x)\n",gConEmiPhyBase); /*consys to ap emi remapping register:10001310, cal remapping address*/ addrPhy = (gConEmiPhyBase & 0xFFF00000) >> 20; /*enable consys to ap emi remapping bit12*/ addrPhy = addrPhy | 0x1000; CONSYS_REG_WRITE(CONSYS_EMI_MAPPING,CONSYS_REG_READ(CONSYS_EMI_MAPPING) | addrPhy); WMT_PLAT_INFO_FUNC("CONSYS_EMI_MAPPING dump(0x%08x)\n",CONSYS_REG_READ(CONSYS_EMI_MAPPING)); #if 1 pEmibaseaddr = ioremap_nocache(gConEmiPhyBase + CONSYS_EMI_AP_PHY_OFFSET,CONSYS_EMI_MEM_SIZE); #else pEmibaseaddr = ioremap_nocache(CONSYS_EMI_AP_PHY_BASE,CONSYS_EMI_MEM_SIZE); #endif //pEmibaseaddr = ioremap_nocache(0x80090400,270*KBYTE); if(pEmibaseaddr) { WMT_PLAT_INFO_FUNC("EMI mapping OK(0x%p)\n",pEmibaseaddr); memset(pEmibaseaddr,0,CONSYS_EMI_MEM_SIZE); iRet = 0; }else{ WMT_PLAT_ERR_FUNC("EMI mapping fail\n"); } WMT_PLAT_INFO_FUNC("register connsys restore cb for complying with IPOH function\n"); register_swsusp_restore_noirq_func(ID_M_CONNSYS,mtk_wcn_consys_hw_restore,NULL); return iRet; }
/*----------------------------------------------------------------------------*/ VOID HifPdmaInit ( GL_HIF_INFO_T *HifInfo ) { extern phys_addr_t gConEmiPhyBase; /* IO remap PDMA register memory */ HifInfo->DmaRegBaseAddr = ioremap(AP_DMA_HIF_BASE, AP_DMA_HIF_0_LENGTH); /* assign PDMA operators */ HifInfo->DmaOps = &HifPdmaOps; /* enable PDMA mode */ HifInfo->fgDmaEnable = TRUE; #if 1 // MPU Setting // WIFI using TOP 512KB printk("[wlan] MPU region 12, 0x%08x - 0x%08x\n", (UINT_32)gConEmiPhyBase, (UINT_32)(gConEmiPhyBase + 512*1024)); #if defined(CONFIG_ARCH_MT6735) || defined(CONFIG_ARCH_MT6753) /* for denali 1 & denali 3 */ emi_mpu_set_region_protection(gConEmiPhyBase, gConEmiPhyBase + 512*1024 - 1, 12, SET_ACCESS_PERMISSON(FORBIDDEN,FORBIDDEN,FORBIDDEN,FORBIDDEN,FORBIDDEN,NO_PROTECTION,FORBIDDEN,FORBIDDEN)); //#else // emi_mpu_set_region_protection(gConEmiPhyBase, // gConEmiPhyBase + 512*1024 - 1, // 6, // SET_ACCESS_PERMISSON(FORBIDDEN,NO_PROTECTION,FORBIDDEN,FORBIDDEN)); #endif #endif #if !defined(CONFIG_MTK_LEGACY) g_clk_wifi_pdma = HifInfo->clk_wifi_dma; #endif PDMA_DBG(("PDMA> HifPdmaInit ok!\n")); }
void set_c2k_mpu(void) { unsigned int shr_mem_phy_start, shr_mem_phy_end, shr_mem_mpu_id, shr_mem_mpu_attr; unsigned int rom_mem_phy_start, rom_mem_phy_end, rom_mem_mpu_id, rom_mem_mpu_attr; unsigned int rw_mem_phy_start, rw_mem_phy_end, rw_mem_mpu_id, rw_mem_mpu_attr; rom_mem_mpu_id = MPU_REGION_ID_C2K_ROM; rw_mem_mpu_id = MPU_REGION_ID_C2K_RW; shr_mem_mpu_id = MPU_REGION_ID_C2K_SMEM; rom_mem_mpu_attr = SET_ACCESS_PERMISSON(FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, SEC_R_NSEC_R); rw_mem_mpu_attr = SET_ACCESS_PERMISSON(FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, SEC_R_NSEC_R); shr_mem_mpu_attr = SET_ACCESS_PERMISSON(FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, NO_PROTECTION); /* *if set start=0x0, end=0x10000, the actural protected area will be 0x0-0x1FFFF, *here we use 64KB align, MPU actually request 32KB align since MT6582, but this works... *we assume emi_mpu_set_region_protection will round end address down to 64KB align. */ rw_mem_phy_start = (unsigned int)md3_mem_base; rw_mem_phy_end = ((rw_mem_phy_start + MD3_RAM_SIZE_BOTTOM + MD3_ROM_SIZE + MD3_RAM_SIZE_TOP + 0xFFFF) & (~0xFFFF)) - 0x1; rom_mem_phy_start = (unsigned int)(rw_mem_phy_start + MD3_RAM_SIZE_BOTTOM); rom_mem_phy_end = ((rom_mem_phy_start + MD3_ROM_SIZE + 0xFFFF) & (~0xFFFF)) - 0x1; shr_mem_phy_start = rw_mem_phy_end + 0x1; shr_mem_phy_end = ((shr_mem_phy_start + md3_share_mem_size + 0xFFFF)&(~0xFFFF)) - 0x1; pr_debug("[C2K] MPU Start protect MD R/W region<%d:%08x:%08x> %x\n", rw_mem_mpu_id, rw_mem_phy_start, rw_mem_phy_end, rw_mem_mpu_attr); emi_mpu_set_region_protection(rw_mem_phy_start, /*START_ADDR */ rw_mem_phy_end, /*END_ADDR */ rw_mem_mpu_id, /*region */ rw_mem_mpu_attr); pr_debug("[C2K] MPU Start protect MD ROM region<%d:%08x:%08x> %x\n", rom_mem_mpu_id, rom_mem_phy_start, rom_mem_phy_end, rom_mem_mpu_attr); emi_mpu_set_region_protection(rom_mem_phy_start, /*START_ADDR */ rom_mem_phy_end, /*END_ADDR */ rom_mem_mpu_id, /*region */ rom_mem_mpu_attr); pr_debug("[C2K] MPU Start protect MD Share region<%d:%08x:%08x> %x\n", shr_mem_mpu_id, shr_mem_phy_start, shr_mem_phy_end, shr_mem_mpu_attr); emi_mpu_set_region_protection(shr_mem_phy_start, /*START_ADDR */ shr_mem_phy_end, /*END_ADDR */ shr_mem_mpu_id, /*region */ shr_mem_mpu_attr); }