void SPI_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init SPI */
/*---------------------------------------------------------------------------------------------------------*/
/* Configure SPI0 as a master, clock idle low, falling clock edge Tx, rising edge Rx and 32-bit transaction */
SPI0->CNTRL = SPI_CNTRL_MASTER_MODE | SPI_CNTRL_CLK_IDLE_LOW | SPI_CNTRL_TX_FALLING |
SPI_CNTRL_RX_RISING | SPI_CNTRL_TX_BIT_LEN(32);
/* Enable the automatic hardware slave select function. Select the SS pin and configure as low-active. */
SPI0->SSR = SPI_SSR_HW_AUTO_ACTIVE_LOW;
/* Set IP clock divider. SPI clock rate = HCLK / ((9+1)*2) = 2.5MHz */
SPI0->DIVIDER = SPI0->DIVIDER & (~SPI_DIVIDER_DIVIDER_Msk) | SPI_DIVIDER_DIV(9);
/* Configure SPI1 as a slave, clock idle low, falling clock edge Tx, rising edge Rx and 32-bit transaction */
SPI1->CNTRL = SPI_CNTRL_SLAVE_MODE | SPI_CNTRL_CLK_IDLE_LOW | SPI_CNTRL_TX_FALLING |
SPI_CNTRL_RX_RISING | SPI_CNTRL_TX_BIT_LEN(32);
/* Configure SPI1's slave select signal as a low level active device. */
SPI1->SSR = SPI_SSR_SLAVE_LOW_LEVEL_ACTIVE;
}
void LCD_Init(void)
{
/* Use SPI0 for LCD */
SPI = SPI0;
/* Initial SPI data format and SPI clock */
SPI->CNTRL = SPI_CNTRL_CLK_IDLE_HIGH | SPI_CNTRL_TX_FALLING |
SPI_CNTRL_RX_RISING | SPI_CNTRL_TX_BIT_LEN(9);
SPI->DIVIDER = SPI_DIVIDER_DIV(4); /* SPI clock freq = system clock / 4 */
SPI->SSR = SPI_SSR_HW_AUTO_ACTIVE_LOW;
// Set BR
SpiWrite(0xEB);
// Set PM
SpiWrite(0x81);
SpiWrite(0xA0);
SpiWrite(0xC0);
// Set Display Enable
SpiWrite(0xAF);
}
