/**************************************************************************************************
* \fn nRF_WriteTXPayload()
* \brief Send wireless packet
* Send block of 4 to be sure de SPI fifo is not overflown
*
**************************************************************************************************/
void nRF_WriteTXPayload(GPIO_Handle HandleGPIO,SPI_Handle HandleSPI,uint16_t payloadLenght)
{
uint8_t i=0;
uint8_t j=0;
uint16_t entireBlock = payloadLenght/4;
uint16_t restBlock = payloadLenght%4;
nRF_setCSN(false,HandleGPIO); // CSN pin LOW
SPI_write(HandleSPI, W_TX_PAYLOAD);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word);
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
for(i = 0; i < entireBlock; ++i){
for(j=0; j<4; ++j){SPI_write(HandleSPI, HandleRF.TXPayload[j+(4*i)]<<8);}
for(j=0;j<4;++j){
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
}
}
for(j=0; j<restBlock; ++j){SPI_write(HandleSPI, HandleRF.TXPayload[j+(4*entireBlock)]<<8);}
for(i = 0; i < restBlock; ++i){
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
}
nRF_setCSN(true,HandleGPIO);
//System_100usDelay(100);
//nRF_setCE(true,HandleGPIO); //minimum 10 us pulse to send data
//System_100usDelay(100);
//nRF_setCE(false,HandleGPIO);
}
/**************************************************************************************************
* \fn nRF_FlushTX()
* \brief Flush TX FIFO
*
**************************************************************************************************/
void nRF_FlushTX(SPI_Handle HandleSPI,GPIO_Handle HandleGPIO)
{
nRF_setCSN(false,HandleGPIO);
SPI_write(HandleSPI, FLUSH_TX);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word); //wait
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
}
/**************************************************************************************************
* \fn nRF_ReadRXPayload()
* \brief Receive wireless paket from nRF24L01
*
**************************************************************************************************/
void nRF_ReadTXPayload(GPIO_Handle HandleGPIO,SPI_Handle HandleSPI)
{
uint8_t i=0;
nRF_setCSN(false,HandleGPIO); // CE pin LOW
for(i=0; i<6; i++){SPI_write(HandleSPI, R_RX_PAYLOAD);}
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word); //wait??// Command + dummy data
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI); // Read received payload
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_2_Words); //wait
HandleRF.RXPayload[0] = SPI_read(HandleSPI);
HandleRF.RXPayload[1] = SPI_read(HandleSPI);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_3_Words); //wait
HandleRF.RXPayload[2] = SPI_read(HandleSPI);
HandleRF.RXPayload[3] = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
// Count the received packets
}
void nRF_ReadRXADDR(GPIO_Handle HandleGPIO,SPI_Handle HandleSPI, uint16_t pipe)
{
uint8_t i=0;
nRF_setCSN(false,HandleGPIO);
for(i=0; i<6; i++){SPI_write(HandleSPI, pipe); }
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word); //wait??
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_2_Words); //wait??
HandleRF.RXADDR[0] = SPI_read(HandleSPI);
HandleRF.RXADDR[1] = SPI_read(HandleSPI);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_3_Words); //wait??
HandleRF.RXADDR[2] = SPI_read(HandleSPI);
HandleRF.RXADDR[3] = SPI_read(HandleSPI);
HandleRF.RXADDR[4] = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
}
void nRF_WriteRegister (SPI_Handle HandleSPI,GPIO_Handle HandleGPIO,uint16_t Reg,uint16_t value)
{
nRF_setCSN(false,HandleGPIO);
SPI_write(HandleSPI,W_REGISTER | Reg); //register adress
SPI_write(HandleSPI, value << 8);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_2_Words); //wait for status and junk
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
}
uint16_t nRF_ReadRegister(SPI_Handle HandleSPI,GPIO_Handle HandleGPIO,uint16_t Reg){
uint16_t answer = 0;
nRF_setCSN(false,HandleGPIO); //Set csn for spi communication
SPI_write(HandleSPI, Reg); //register adress
SPI_write(HandleSPI, Reg); //dummy data
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_2_Words); //wait for two words (STATUS + REG)
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
answer = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
return answer;
}
void nRF_WriteRXADDR(SPI_Handle HandleSPI,GPIO_Handle HandleGPIO, uint8_t uiID, uint16_t pipe)
{
unsigned int i=0;
nRF_setCSN(false,HandleGPIO);
SPI_write(HandleSPI, W_REGISTER | pipe); //register adress
for(i=0; i<4; i++){SPI_write(HandleSPI, 0xE700);}SPI_write(HandleSPI, 0xE000 | (uiID<<8));
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_1_Word); //wait
HandleRF.Reg[R_STATUS] = SPI_read(HandleSPI);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_2_Words); //wait
HandleRF.Reg[R_JUNK]= SPI_read(HandleSPI);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
while(SPI_getRxFifoStatus(HandleSPI) < SPI_FifoStatus_3_Words); //wait
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
HandleRF.Reg[R_JUNK] = SPI_read(HandleSPI);
nRF_setCSN(true,HandleGPIO);
}
uint16_t DRV8301_readSpi(DRV8301_Handle handle,const DRV8301_RegName_e regName)
{
DRV8301_Obj *obj = (DRV8301_Obj *)handle;
uint16_t ctrlWord;
const uint16_t data = 0;
volatile uint16_t readWord;
static volatile uint16_t WaitTimeOut = 0;
volatile SPI_FifoStatus_e RxFifoCnt = SPI_FifoStatus_Empty;
// build the control word
ctrlWord = (uint16_t)DRV8301_buildCtrlWord(DRV8301_CtrlMode_Read,regName,data);
// reset the Rx fifo pointer to zero
SPI_resetRxFifo(obj->spiHandle);
SPI_enableRxFifo(obj->spiHandle);
// write the command
SPI_write(obj->spiHandle,ctrlWord);
// dummy write to return the reply from the 8301
SPI_write(obj->spiHandle,0x0000);
// wait for two words to populate the RX fifo, or a wait timeout will occur
while((RxFifoCnt < SPI_FifoStatus_2_Words) && (WaitTimeOut < 0xffff))
{
RxFifoCnt = SPI_getRxFifoStatus(obj->spiHandle);
if(++WaitTimeOut > 0xfffe)
{
obj->RxTimeOut = true;
}
}
// Read two words, the dummy word and the data
readWord = SPI_readEmu(obj->spiHandle);
readWord = SPI_readEmu(obj->spiHandle);
return(readWord & DRV8301_DATA_MASK);
} // end of DRV8301_readSpi() function
uint16_t SPIAslave_readSpi(SPIAslave_Handle handle)
{
SPIAslave_Obj *obj = (SPIAslave_Obj *)handle;
uint16_t ctrlWord;
const uint16_t data = 0;
volatile uint16_t readWord;
static volatile uint16_t WaitTimeOut = 0;
volatile SPI_FifoStatus_e RxFifoCnt = SPI_FifoStatus_Empty;
// reset the Rx fifo pointer to zero
SPI_resetRxFifo(obj->spiHandle);
SPI_enableRxFifo(obj->spiHandle);
/*NEED TO CHANGE IT FROM WRITING FIRST TO WAITING FOR THE MASTER TO COMMAND IT*/
// write the command
SPI_write(obj->spiHandle,ctrlWord);
// dummy write to return the reply from the 8301
SPI_write(obj->spiHandle,0x0000);
// wait for two words to populate the RX fifo, or a wait timeout will occur
while((RxFifoCnt < SPI_FifoStatus_2_Words) && (WaitTimeOut < 0xffff))
{
RxFifoCnt = SPI_getRxFifoStatus(obj->spiHandle);
if(++WaitTimeOut > 0xfffe)
{
obj->RxTimeOut = true;
}
}
/*NEED TO CHANGE IT FROM WRITING FIRST TO WAITING FOR THE MASTER TO COMMAND IT*/
// Read two words, the dummy word and the data
readWord = SPI_readEmu(obj->spiHandle); //not necessarily sure we need this
readWord = SPI_readEmu(obj->spiHandle);
return(readWord);
}
