static void mpc83xx_spi_chipselect(struct spi_device *spi, int value) { struct mpc83xx_spi *mpc83xx_spi; u8 pol = spi->mode & SPI_CS_HIGH ? 1 : 0; mpc83xx_spi = spi_master_get_devdata(spi->master); if (value == BITBANG_CS_INACTIVE) { if (mpc83xx_spi->deactivate_cs) mpc83xx_spi->deactivate_cs(spi->chip_select, pol); } if (value == BITBANG_CS_ACTIVE) { u32 regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); u32 len = spi->bits_per_word; if (len == 32) len = 0; else len = len - 1; /* mask out bits we are going to set */ regval &= ~0x38ff0000; if (spi->mode & SPI_CPHA) regval |= SPMODE_CP_BEGIN_EDGECLK; if (spi->mode & SPI_CPOL) regval |= SPMODE_CI_INACTIVEHIGH; regval |= SPMODE_LEN(len); if ((mpc83xx_spi->sysclk / spi->max_speed_hz) >= 64) { u8 pm = mpc83xx_spi->sysclk / (spi->max_speed_hz * 64); regval |= SPMODE_PM(pm) | SPMODE_DIV16; } else { u8 pm = mpc83xx_spi->sysclk / (spi->max_speed_hz * 4); regval |= SPMODE_PM(pm); } mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); if (mpc83xx_spi->activate_cs) mpc83xx_spi->activate_cs(spi->chip_select, pol); } }
static int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) { struct mpc83xx_spi *mpc83xx_spi; u32 regval; u8 bits_per_word; u32 hz; mpc83xx_spi = spi_master_get_devdata(spi->master); if (t) { bits_per_word = t->bits_per_word; hz = t->speed_hz; } else { bits_per_word = 0; hz = 0; } /* spi_transfer level calls that work per-word */ if (!bits_per_word) bits_per_word = spi->bits_per_word; /* Make sure its a bit width we support [4..16, 32] */ if ((bits_per_word < 4) || ((bits_per_word > 16) && (bits_per_word != 32))) return -EINVAL; mpc83xx_spi->rx_shift = 0; mpc83xx_spi->tx_shift = 0; if (bits_per_word <= 8) { mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8; mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8; if (mpc83xx_spi->qe_mode) { mpc83xx_spi->rx_shift = 16; mpc83xx_spi->tx_shift = 24; } } else if (bits_per_word <= 16) { mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u16; mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u16; if (mpc83xx_spi->qe_mode) { mpc83xx_spi->rx_shift = 16; mpc83xx_spi->tx_shift = 16; } } else if (bits_per_word <= 32) { mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u32; mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u32; } else return -EINVAL; if (mpc83xx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) { mpc83xx_spi->tx_shift = 0; if (bits_per_word <= 8) mpc83xx_spi->rx_shift = 8; else mpc83xx_spi->rx_shift = 0; } /* nsecs = (clock period)/2 */ if (!hz) hz = spi->max_speed_hz; mpc83xx_spi->nsecs = (1000000000 / 2) / hz; if (mpc83xx_spi->nsecs > MAX_UDELAY_MS * 1000) return -EINVAL; if (bits_per_word == 32) bits_per_word = 0; else bits_per_word = bits_per_word - 1; regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); /* mask out bits we are going to set */ regval &= ~(SPMODE_LEN(0xF) | SPMODE_REV); regval |= SPMODE_LEN(bits_per_word); if (!(spi->mode & SPI_LSB_FIRST)) regval |= SPMODE_REV; /* Turn off SPI unit prior changing mode */ mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, 0); mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); return 0; }
static void mpc83xx_spi_chipselect(struct spi_device *spi, int value) { struct mpc83xx_spi *mpc83xx_spi; u8 pol = spi->mode & SPI_CS_HIGH ? 1 : 0; mpc83xx_spi = spi_master_get_devdata(spi->master); if (value == BITBANG_CS_INACTIVE) { if (mpc83xx_spi->deactivate_cs) mpc83xx_spi->deactivate_cs(spi->chip_select, pol); } if (value == BITBANG_CS_ACTIVE) { u32 regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); u32 len = spi->bits_per_word; u8 pm; if (len == 32) len = 0; else len = len - 1; /* mask out bits we are going to set */ regval &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH | SPMODE_LEN(0xF) | SPMODE_DIV16 | SPMODE_PM(0xF) | SPMODE_REV | SPMODE_LOOP); if (spi->mode & SPI_CPHA) regval |= SPMODE_CP_BEGIN_EDGECLK; if (spi->mode & SPI_CPOL) regval |= SPMODE_CI_INACTIVEHIGH; if (!(spi->mode & SPI_LSB_FIRST)) regval |= SPMODE_REV; if (spi->mode & SPI_LOOP) regval |= SPMODE_LOOP; regval |= SPMODE_LEN(len); if ((mpc83xx_spi->spibrg / spi->max_speed_hz) >= 64) { pm = mpc83xx_spi->spibrg / (spi->max_speed_hz * 64) - 1; if (pm > 0x0f) { dev_err(&spi->dev, "Requested speed is too " "low: %d Hz. Will use %d Hz instead.\n", spi->max_speed_hz, mpc83xx_spi->spibrg / 1024); pm = 0x0f; } regval |= SPMODE_PM(pm) | SPMODE_DIV16; } else { pm = mpc83xx_spi->spibrg / (spi->max_speed_hz * 4); if (pm) pm--; regval |= SPMODE_PM(pm); } /* Turn off SPI unit prior changing mode */ mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, 0); mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); if (mpc83xx_spi->activate_cs) mpc83xx_spi->activate_cs(spi->chip_select, pol); } }
static int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) { struct mpc83xx_spi *mpc83xx_spi; u32 regval; u8 bits_per_word; u32 hz; mpc83xx_spi = spi_master_get_devdata(spi->master); if (t) { bits_per_word = t->bits_per_word; hz = t->speed_hz; } else { bits_per_word = 0; hz = 0; } /* spi_transfer level calls that work per-word */ if (!bits_per_word) bits_per_word = spi->bits_per_word; /* Make sure its a bit width we support [4..16, 32] */ if ((bits_per_word < 4) || ((bits_per_word > 16) && (bits_per_word != 32))) return -EINVAL; if (bits_per_word <= 8) { mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8; mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8; } else if (bits_per_word <= 16) { mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u16; mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u16; } else if (bits_per_word <= 32) { mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u32; mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u32; } else return -EINVAL; /* nsecs = (clock period)/2 */ if (!hz) hz = spi->max_speed_hz; mpc83xx_spi->nsecs = (1000000000 / 2) / hz; if (mpc83xx_spi->nsecs > MAX_UDELAY_MS * 1000) return -EINVAL; if (bits_per_word == 32) bits_per_word = 0; else bits_per_word = bits_per_word - 1; regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); /* Mask out bits_per_wordgth */ regval &= 0xff0fffff; regval |= SPMODE_LEN(bits_per_word); mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); return 0; }