static void prvSetupSPI(void)
{
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);
// set the SSI clock to the PIOSC clock
SSIClockSourceSet(SSI2_BASE, SSI_CLOCK_SYSTEM);
SSIConfigSetExpClk(SSI2_BASE, MAP_SysCtlClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 1000000, 8);
MAP_SSIEnable(SSI2_BASE);
}
void SPI_init(){
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
GPIOPinTypeSSI(GPIO_PORTA_BASE,GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5);
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA4_SSI0RX);
GPIOPinConfigure(GPIO_PA5_SSI0TX);
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
SSIClockSourceSet(SSI0_BASE,SSI_CLOCK_PIOSC);
SSIConfigSetExpClk(SSI0_BASE,SysCtlClockGet(),SSI_FRF_MOTO_MODE_0,SSI_MODE_MASTER,6000000,8);
SSIEnable(SSI0_BASE);
}
void
OrbitOledHostInit()
{
DelayInit();
/* Initialize SSI port 3.
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI3);
GPIOPinTypeSSI(SCK_OLEDPort, SCK_OLED_PIN);
GPIOPinTypeSSI(SDI_OLEDPort, SDI_OLED_PIN);
GPIOPinConfigure(SDI_OLED);
GPIOPinConfigure(SCK_OLED);
SSIClockSourceSet(SSI3_BASE, SSI_CLOCK_SYSTEM);
SSIConfigSetExpClk(SSI3_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 8000000, 8);
SSIEnable(SSI3_BASE);
/* Make power control pins be outputs with the supplies off
*/
GPIOPinWrite(VBAT_OLEDPort, VBAT_OLED, VBAT_OLED);
GPIOPinWrite(VDD_OLEDPort, VDD_OLED, VDD_OLED);
GPIOPinTypeGPIOOutput(VBAT_OLEDPort, VBAT_OLED); //VDD power control (1=off)
GPIOPinTypeGPIOOutput(VDD_OLEDPort, VDD_OLED); //VBAT power control (1=off)
/* Make the Data/Command select, Reset, and SSI CS pins be outputs.
* The nDC_OLED pin is PD7 an is a special GPIO (it is an NMI pin)
* Therefore, we must unlock it first:
* 1. Write 0x4C4F434B to GPIOLOCK register to unlock the GPIO Commit register
* 2. Write to appropriate bit in the Commit Register (bit 7)
* 3. Re-lock the GPIOLOCK register
*/
HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = 0x4C4F434B; // unlock
HWREG(GPIO_PORTD_BASE + GPIO_O_CR) |= 1 << 7; // allow writes
HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = 0x0; // re-lock
GPIOPinWrite(nDC_OLEDPort, nDC_OLED, nDC_OLED);
GPIOPinTypeGPIOOutput(nDC_OLEDPort, nDC_OLED);
GPIOPinWrite(nDC_OLEDPort, nDC_OLED, nDC_OLED);
GPIOPinWrite(nRES_OLEDPort, nRES_OLED, nRES_OLED);
GPIOPinTypeGPIOOutput(nRES_OLEDPort, nRES_OLED);
GPIOPinWrite(nCS_OLEDPort, nCS_OLED, nCS_OLED);
GPIOPinTypeGPIOOutput(nCS_OLEDPort, nCS_OLED);
}
void Spi::enable(uint32_t baudrate)
{
GpioConfig& miso = miso_.getGpioConfig();
GpioConfig& mosi = mosi_.getGpioConfig();
GpioConfig& clk = clk_.getGpioConfig();
// GpioConfig& ncs = ncs_.getGpioConfig();
// Store baudrate in configuration
if (baudrate != 0) {
config_.baudrate = baudrate;
}
// Enable peripheral except in deep sleep modes (e.g. LPM1, LPM2, LPM3)
SysCtrlPeripheralEnable(config_.peripheral);
SysCtrlPeripheralSleepEnable(config_.peripheral);
SysCtrlPeripheralDeepSleepDisable(config_.peripheral);
// Reset peripheral previous to configuring it
SSIDisable(config_.base);
// Set IO clock as SPI0 clock source
SSIClockSourceSet(config_.base, config_.clock);
// Configure the MISO, MOSI, CLK and nCS pins as peripheral
IOCPinConfigPeriphInput(miso.port, miso.pin, miso.ioc);
IOCPinConfigPeriphOutput(mosi.port, mosi.pin, mosi.ioc);
IOCPinConfigPeriphOutput(clk.port, clk.pin, clk.ioc);
// IOCPinConfigPeriphOutput(ncs.port, ncs.pin, ncs.ioc);
// Configure MISO, MOSI, CLK and nCS GPIOs
GPIOPinTypeSSI(miso.port, miso.pin);
GPIOPinTypeSSI(mosi.port, mosi.pin);
GPIOPinTypeSSI(clk.port, clk.pin);
// GPIOPinTypeSSI(ncs.port, ncs.pin);
// Configure the SPI0 clock
SSIConfigSetExpClk(config_.base, SysCtrlIOClockGet(), config_.protocol, \
config_.mode, config_.baudrate, config_.datawidth);
// Enable the SPI0 module
SSIEnable(config_.base);
}
void Spi::enable(uint32_t mode, uint32_t protocol, uint32_t datawidth, uint32_t baudrate)
{
// Store SPI mode, protoco, baudrate and datawidth
mode_ = mode;
protocol_ = protocol;
baudrate_ = baudrate;
datawidth_ = datawidth;
// Enable peripheral except in deep sleep modes (e.g. LPM1, LPM2, LPM3)
SysCtrlPeripheralEnable(peripheral_);
SysCtrlPeripheralSleepEnable(peripheral_);
SysCtrlPeripheralDeepSleepDisable(peripheral_);
// Reset peripheral previous to configuring it
SSIDisable(base_);
// Set IO clock as SPI0 clock source
SSIClockSourceSet(base_, clock_);
// Configure the MISO, MOSI, CLK and nCS pins as peripheral
IOCPinConfigPeriphInput(miso_.getPort(), miso_.getPin(), miso_.getIoc());
IOCPinConfigPeriphOutput(mosi_.getPort(), mosi_.getPin(), mosi_.getIoc());
IOCPinConfigPeriphOutput(clk_.getPort(), clk_.getPin(), clk_.getIoc());
// IOCPinConfigPeriphOutput(ncs_.getPort(), ncs_.getPin(), ncs_.getIoc());
// Configure MISO, MOSI, CLK and nCS GPIOs
GPIOPinTypeSSI(miso_.getPort(), miso_.getPin());
GPIOPinTypeSSI(mosi_.getPort(), mosi_.getPin());
GPIOPinTypeSSI(clk_.getPort(), clk_.getPin());
// GPIOPinTypeSSI(ncs_.getPort(), ncs_.getPin());
// Configure the SPI0 clock
SSIConfigSetExpClk(base_, SysCtrlIOClockGet(), protocol_, \
mode_, baudrate_, datawidth_);
// Enable the SPI0 module
SSIEnable(base_);
}
/**************************************************************************************************
* @fn npSpiInit
*
* @brief This function is called to set up the SPI interface.
*
* input parameters
*
* None.
*
* output parameters
*
* None.
*
* @return None.
**************************************************************************************************
*/
void npSpiInit(void)
{
uint32 ulDummy;
if (ZNP_CFG1_UART == znpCfg1)
{
return;
}
/* Configure SRDY and deassert SRDY */
GPIOPinTypeGPIOOutput(HAL_SPI_SRDY_BASE, HAL_SPI_SRDY_PIN);
GPIOPinWrite(HAL_SPI_SRDY_BASE, HAL_SPI_SRDY_PIN, HAL_SPI_SRDY_PIN);
/* Configure MRDY and deassert MRDY */
GPIOPinTypeGPIOInput(HAL_SPI_MRDY_BASE, HAL_SPI_MRDY_PIN);
GPIOPinWrite(HAL_SPI_MRDY_BASE, HAL_SPI_MRDY_PIN, HAL_SPI_MRDY_PIN);
/* Enable SSI peripheral module */
SysCtrlPeripheralEnable(BSP_SPI_SSI_ENABLE_BM);
/* Delay is essential for this customer */
SysCtrlDelay(32);
/* Configure pin type */
GPIOPinTypeSSI(BSP_SPI_BUS_BASE, (BSP_SPI_MOSI | BSP_SPI_MISO | BSP_SPI_SCK | HAL_SPI_SS_PIN));
/* Map SSI signals to the correct GPIO pins and configure them as HW ctrl'd */
IOCPinConfigPeriphOutput(BSP_SPI_BUS_BASE, BSP_SPI_MISO, IOC_MUX_OUT_SEL_SSI0_TXD);
IOCPinConfigPeriphInput(BSP_SPI_BUS_BASE, BSP_SPI_SCK, IOC_CLK_SSIIN_SSI0);
IOCPinConfigPeriphInput(BSP_SPI_BUS_BASE, BSP_SPI_MOSI, IOC_SSIRXD_SSI0);
IOCPinConfigPeriphInput(BSP_SPI_BUS_BASE, HAL_SPI_SS_PIN, IOC_SSIFSSIN_SSI0);
/* Disable SSI function */
SSIDisable(BSP_SPI_SSI_BASE);
/* Set system clock as SSI clock source */
SSIClockSourceSet(BSP_SPI_SSI_BASE, SSI_CLOCK_SYSTEM);
/* Configure SSI module to Motorola/Freescale SPI mode 3 Slave:
* Polarity = 1, observed in scope from MSP430 master
* Phase = 1, observed in scope from MSP430 master
* Word size = 8 bits
* Clock = 2MHz, observed MSP430 master clock is 2049180Hz
*/
SSIConfigSetExpClk(BSP_SPI_SSI_BASE, SysCtrlClockGet(), SSI_FRF_MOTO_MODE_3,
SSI_MODE_SLAVE, 2000000UL, 8);
/* Register SPI uDMA complete interrupt */
SSIIntRegister(BSP_SPI_SSI_BASE, &npSpiUdmaCompleteIsr);
/* Enable uDMA complete interrupt for SPI RX and TX */
SSIDMAEnable(BSP_SPI_SSI_BASE, SSI_DMA_RX | SSI_DMA_TX);
/* Configure SPI priority */
IntPrioritySet(INT_SSI0, HAL_INT_PRIOR_SSI0);
IntPrioritySet(INT_GPIOB, HAL_INT_PRIOR_SSI_MRDY);
/* Enable the SSI function */
SSIEnable(BSP_SPI_SSI_BASE);
GPIOIntTypeSet(HAL_SPI_MRDY_BASE, HAL_SPI_MRDY_PIN, GPIO_BOTH_EDGES);
GPIOPortIntRegister(HAL_SPI_MRDY_BASE, *npSpiMrdyIsr);
GPIOPinIntEnable(HAL_SPI_MRDY_BASE, HAL_SPI_MRDY_PIN);
/* Initialize uDMA for SPI */
npSpiUdmaInit();
}
