extern int stx7108_usb_init(int port, int over_current, int power_ctrl)
{
#ifdef QQQ /* QQQ - DELETE */
unsigned long reg;
const unsigned char oc_pins[2] = {4, 6}; /* PIO4 */
const unsigned char power_pins[2] = {5, 7}; /* PIO4 */
if (port >= sizeof(oc_pins)) /* invalid port number ? */
return -1; /* failed to initialize! */
/* Power on the USB */
reg = readl(STX7105_SYSCONF_SYS_CFG32);
/* Power up USB host controller */
/* USBn_HC_POWER_DOWN_REQ = 0 = Powered Up */
reg &= ~(1ul<<(4+port));
/* Power up USB PHY */
/* USBn_PHY_POWER_DOWN_REQ = 0 = Powered Up */
reg &= ~(1ul<<(6+port));
writel(reg, STX7105_SYSCONF_SYS_CFG32);
if (over_current) {
/* USB overcurrent enable */
reg = readl(STX7105_SYSCONF_SYS_CFG04);
/* USB0_PRT_OVCURR_POL = 0 = Active Low */
reg &= ~(1ul<<(3+port));
/* USBn_PRT_OVCURR_IN = 0 = PIO4[oc_pins[port]] */
reg &= ~(1ul<<(5+port));
/* CFG_USBn_OVRCURR_ENABLE = 1 = OC Enabled */
reg |= 1ul<<(11+port);
writel(reg, STX7105_SYSCONF_SYS_CFG04);
/* Route USBn OC Routing via PIO4[oc_pins[port]] */
reg = readl(STX7105_SYSCONF_SYS_CFG34);
/* PIO4[oc_pins[port]] CFG34[8+oc_pins[port],oc_pins[port]] = Alternate4 */
reg &= ~(0x0101ul<<(oc_pins[port])); /* Mask=3 */
reg |= 0x0101ul<<(oc_pins[port]); /* OR=3 */
writel(reg, STX7105_SYSCONF_SYS_CFG34);
/* set PIO directionality, for OC as IN */
SET_PIO_PIN(ST40_PIO_BASE(4), oc_pins[port], STPIO_IN);
}
if (power_ctrl) {
/* Route USBn POWER Routing via PIO4[power_pins[port]] */
reg = readl(STX7105_SYSCONF_SYS_CFG34);
/* PIO4[power_pins[port]] CFG34[8+power_pins[port],power_pins[port]] = Alternate4 */
reg &= ~(0x0101ul<<(power_pins[port])); /* Mask=3 */
reg |= 0x0101ul<<(power_pins[port]); /* OR=3 */
writel(reg, STX7105_SYSCONF_SYS_CFG34);
/* set PIO directionality, for POWER as ALT_OUT */
SET_PIO_PIN(ST40_PIO_BASE(4), power_pins[port], STPIO_ALT_OUT);
}
/* start the USB Wrapper Host Controller */
ST40_start_host_control(
USB_FLAGS_STRAP_8BIT |
USB_FLAGS_STBUS_CONFIG_THRESHOLD128);
return 0;
#endif /* QQQ - DELETE */
}
extern void stx7108_configure_i2c(void)
{
/*
* The I2C busses are routed as follows:
*
* Bus SCL SDA
* --- --- ---
* 0 PIO1[6] PIO1[7] SSC #0
* 1 PIO9[6] PIO9[7] SSC #1
* 2 PIO1[3] PIO1[4] SSC #2, Variant A
* 2 PIO14[4] PIO14[5] SSC #2, Variant B
* 3 PIO5[2] PIO5[3] SSC #3
* 4 PIO13[6] PIO13[7] SSC #4
* 5 PIO5[6] PIO5[7] SSC #5
* 6 PIO15[2] PIO15[3] SSC #6
*/
const int scl_port = ssc_pios[CONFIG_I2C_BUS].pio[0].port;
const int scl_pin = ssc_pios[CONFIG_I2C_BUS].pio[0].pin;
const int sda_port = ssc_pios[CONFIG_I2C_BUS].pio[1].port;
const int sda_pin = ssc_pios[CONFIG_I2C_BUS].pio[1].pin;
if (CONFIG_I2C_BUS >= ARRAY_SIZE(ssc_pios)) BUG();
SET_PIO_PIN(ST40_PIO_BASE(scl_port), scl_pin, STPIO_BIDIR); /* I2C_SCL */
SET_PIO_PIN(ST40_PIO_BASE(sda_port), sda_pin, STPIO_BIDIR); /* I2C_SDA */
}
extern void stmac_phy_reset(void)
{
/*
* Reset the Ethernet PHY.
* PIO20[0] == GMII0_notRESET
* PIO15[4] == GMII1_notRESET
*/
STPIO_SET_PIN(ST40_PIO_BASE(15), 4, 0);
udelay(10000); /* 10 ms */
STPIO_SET_PIN(ST40_PIO_BASE(15), 4, 1);
}
extern void stmac_phy_reset(void)
{
/*
* Reset the Ethernet PHY.
* Note both PHYs share the *same* reset line.
*
* PIO15[4] = POWER_ON_ETH (a.k.a. ETH_RESET)
*/
STPIO_SET_PIN(ST40_PIO_BASE(15), 4, 0);
udelay(10000); /* 10 ms */
STPIO_SET_PIN(ST40_PIO_BASE(15), 4, 1);
}
extern void fli7510_usb_init(const enum fli7510_usb_ovrcur_mode ovrcur_mode)
{
unsigned long sysconf;
switch (ovrcur_mode) {
case fli7510_usb_ovrcur_disabled:
/* CONFIG_SYS_COMMS_CONFIG_1[12] = usba_enable_pad_override */
sysconf = readl(CONFIG_SYS_COMMS_CONFIG_1);
SET_SYSCONF_BIT(sysconf, 1, USBA_ENABLE_PAD_OVERRIDE);
writel(sysconf, CONFIG_SYS_COMMS_CONFIG_1);
/* CONFIG_SYS_COMMS_CONFIG_1[13] = usba_ovrcur */
sysconf = readl(CONFIG_SYS_COMMS_CONFIG_1);
SET_SYSCONF_BIT(sysconf, 1, USBA_OVRCUR);
writel(sysconf, CONFIG_SYS_COMMS_CONFIG_1);
break;
default:
/* CONFIG_SYS_COMMS_CONFIG_1[12] = usba_enable_pad_override */
sysconf = readl(CONFIG_SYS_COMMS_CONFIG_1);
SET_SYSCONF_BIT(sysconf, 0, USBA_ENABLE_PAD_OVERRIDE);
writel(sysconf, CONFIG_SYS_COMMS_CONFIG_1);
/* CONFIG_SYS_COMMS_CONFIG_1[11] = usba_ovrcur_polarity */
switch (ovrcur_mode) {
case fli7510_usb_ovrcur_active_high:
sysconf = readl(CONFIG_SYS_COMMS_CONFIG_1);
SET_SYSCONF_BIT(sysconf, 0, USBA_OVRCUR_POLARITY);
writel(sysconf, CONFIG_SYS_COMMS_CONFIG_1);
break;
case fli7510_usb_ovrcur_active_low:
sysconf = readl(CONFIG_SYS_COMMS_CONFIG_1);
SET_SYSCONF_BIT(sysconf, 1, USBA_OVRCUR_POLARITY);
writel(sysconf, CONFIG_SYS_COMMS_CONFIG_1);
break;
default:
BUG();
break;
}
break;
}
/* now route the PIOs corectly */
SET_PIO_PIN(ST40_PIO_BASE(27), 1, STPIO_IN); /* USB_A_OVRCUR */
SET_PIO_PIN(ST40_PIO_BASE(27), 2, STPIO_ALT_OUT); /* USB_A_PWREN */
/* start the USB Wrapper Host Controller */
ST40_start_host_control(
USB_FLAGS_STRAP_16BIT |
USB_FLAGS_STRAP_PLL |
USB_FLAGS_STBUS_CONFIG_THRESHOLD256);
}
extern int stx7108_i2c_read(void)
{
/* SSC's MTSR == I2C's SDA */
const int port = ssc_pios[CONFIG_I2C_BUS].pio[1].port;
const int pin = ssc_pios[CONFIG_I2C_BUS].pio[1].pin;
return STPIO_GET_PIN(ST40_PIO_BASE(port), pin);
}
extern void stx7108_i2c_sda(const int val)
{
/* SSC's MTSR == I2C's SDA */
const int port = ssc_pios[CONFIG_I2C_BUS].pio[1].port;
const int pin = ssc_pios[CONFIG_I2C_BUS].pio[1].pin;
STPIO_SET_PIN(ST40_PIO_BASE(port), pin, (val) ? 1 : 0);
}
static void configPIO(void)
{
/* Setup PIOs for ASC device */
#if CFG_STM_ASC_BASE == ST40_ASC3_REGS_BASE
/*
* Route UART3 via PIO24/25 for TX, RX, RTS & CTS (Alternative #1).
*
* Note: on the MB903A, RS232_RTS is connected (incorrectly)
* to PIO24[6], this is corrected in MB903B.
*/
PIOALT(24, 4, 1, &stx7108_pioalt_pad_out); /* UART3-TX */
PIOALT(24, 5, 1, &stx7108_pioalt_pad_in); /* UART3-RX */
PIOALT(24, 7, 1, &stx7108_pioalt_pad_out); /* UART3-RTS */
PIOALT(25, 0, 1, &stx7108_pioalt_pad_in); /* UART3-CTS */
#else
#error Unknown ASC port selected!
#endif /* CFG_STM_ASC_BASE == ST40_ASCx_REGS_BASE */
#ifdef CONFIG_DRIVER_NET_STM_GMAC
/*
* Configure the Ethernet PHY Reset signal
* PIO20[0] == GMII0_notRESET
* PIO15[4] == GMII1_notRESET
*/
SET_PIO_PIN(ST40_PIO_BASE(15), 4, STPIO_OUT);
#endif /* CONFIG_DRIVER_NET_STM_GMAC */
}
extern void stx7108_configure_spi(void)
{
/*
* We set up the PIO pins correctly for SPI
*/
#if defined(CONFIG_SOFT_SPI) /* Use "bit-banging" for SPI */
/* route PIO (alternate #0) */
stx7108_pioalt_select(2, 1, 0); /* SPI_MISO */
stx7108_pioalt_select(2, 0, 0); /* SPI_MOSI */
stx7108_pioalt_select(1, 7, 0); /* SPI_notCS */
stx7108_pioalt_select(1, 6, 0); /* SPI_CLK */
/* set PIO directionality */
SET_PIO_PIN(ST40_PIO_BASE(2), 1, STPIO_IN); /* SPI_MISO */
SET_PIO_PIN(ST40_PIO_BASE(2), 0, STPIO_OUT); /* SPI_MOSI */
SET_PIO_PIN(ST40_PIO_BASE(1), 7, STPIO_OUT); /* SPI_notCS */
SET_PIO_PIN(ST40_PIO_BASE(1), 6, STPIO_OUT); /* SPI_CLK */
/* drive outputs with sensible initial values */
STPIO_SET_PIN(ST40_PIO_BASE(2), 0, 0); /* deassert SPI_MOSI */
STPIO_SET_PIN(ST40_PIO_BASE(1), 7, 1); /* deassert SPI_notCS */
STPIO_SET_PIN(ST40_PIO_BASE(1), 6, 1); /* assert SPI_CLK */
#else
#error Currently only S/W bit-banging for SPI is supported.
#endif /* CONFIG_SOFT_SPI */
}
/*
* assert or de-assert the SPI Chip Select line.
*
* input: cs == true, assert CS, else deassert CS
*/
static void spi_chip_select(const int cs)
{
const int pin = 7; /* PIO1[7] = SPI_notCS */
if (cs)
{ /* assert SPI CSn */
STPIO_SET_PIN(ST40_PIO_BASE(1), pin, 0);
}
else
{ /* DE-assert SPI CSn */
STPIO_SET_PIN(ST40_PIO_BASE(1), pin, 1);
}
if (cs)
{ /* wait 250ns for CSn assert to propagate */
udelay(1); /* QQQ: can we make this shorter ? */
}
}
static void configPIO(void)
{
/* Setup PIOs for ASC device */
#if CONFIG_SYS_STM_ASC_BASE == ST40_ASC1_REGS_BASE
/* Route UART1 via PIO5 for TX, RX, CTS & RTS (Alternative #1) */
PIOALT(5, 1, 1, stm_pad_direction_output); /* UART1-TX */
PIOALT(5, 2, 1, stm_pad_direction_input); /* UART1-RX */
PIOALT(5, 4, 1, stm_pad_direction_output); /* UART1-RTS */
PIOALT(5, 3, 1, stm_pad_direction_input); /* UART1-CTS */
#elif CONFIG_SYS_STM_ASC_BASE == ST40_ASC3_REGS_BASE
/* Route UART3 via PIO24/25 for TX, RX (Alternative #1) */
PIOALT(24, 4, 1, stm_pad_direction_output); /* UART3-TX */
PIOALT(24, 5, 1, stm_pad_direction_input); /* UART3-RX */
// PIOALT(24, 7, 1, stm_pad_direction_output); /* UART3-RTS */
// PIOALT(25, 0, 1, stm_pad_direction_input); /* UART3-CTS */
#else
#error Unknown ASC port selected!
#endif /* CONFIG_SYS_STM_ASC_BASE == ST40_ASCx_REGS_BASE */
#ifdef CONFIG_DRIVER_NET_STM_GMAC
/*
* Configure the Ethernet PHY Reset signal
* PIO15[4] == POWER_ON_ETH (a.k.a. ETH_RESET)
*/
SET_PIO_PIN(ST40_PIO_BASE(15), 4, STPIO_OUT);
#endif /* CONFIG_DRIVER_NET_STM_GMAC */
/*
* Some of the peripherals are powered by regulators
* controlled by the following PIO line...
* PIO5[0] == POWER_ON
*/
SET_PIO_PIN(ST40_PIO_BASE(5), 0, STPIO_OUT);
STPIO_SET_PIN(ST40_PIO_BASE(5), 0, 1);
}
/*
* ETH GMAC PIO configuration
*/
extern void fli7540_configure_ethernet(
const enum fli7540_ethernet_mode mode,
const int ext_clk,
const int phy_bus)
{
struct fli7540_gmac_pin *pins;
int pins_num;
unsigned char phy_sel, enmii;
int i;
unsigned long sysconf;
/* Ethernet interface on */
/* CONFIG_SYS_COMMS_CONFIG_2[24] = gmac_enable */
sysconf = readl(CONFIG_SYS_COMMS_CONFIG_2);
SET_SYSCONF_BIT(sysconf, 1, GMAC_ENABLE);
writel(sysconf, CONFIG_SYS_COMMS_CONFIG_2);
switch (mode) {
case fli7540_ethernet_mii:
phy_sel = 0;
enmii = 1;
pins = fli7540_gmac_mii_pins;
pins_num = ARRAY_SIZE(fli7540_gmac_mii_pins);
break;
case fli7540_ethernet_rmii:
phy_sel = 4;
enmii = 1;
pins = fli7540_gmac_rmii_pins;
pins_num = ARRAY_SIZE(fli7540_gmac_rmii_pins);
break;
case fli7540_ethernet_gmii:
phy_sel = 0;
enmii = 1;
pins = fli7540_gmac_gmii_pins;
pins_num = ARRAY_SIZE(fli7540_gmac_gmii_pins);
/* CONFIG_SYS_COMMS_CONFIG_1[18:17] = conf_pio24_alternate */
sysconf = readl(CONFIG_SYS_COMMS_CONFIG_1);
sysconf &= ~(0x3ul<<CONF_PIO24_ALTERNATE);
sysconf |= (0x2ul<<CONF_PIO24_ALTERNATE);
writel(sysconf, CONFIG_SYS_COMMS_CONFIG_1);
break;
case fli7540_ethernet_reverse_mii:
phy_sel = 0;
enmii = 0;
pins = fli7540_gmac_reverse_mii_pins;
pins_num = ARRAY_SIZE(fli7540_gmac_reverse_mii_pins);
break;
default:
BUG();
return;
}
/* CONFIG_SYS_COMMS_CONFIG_2[28:26] = phy_intf_sel */
sysconf = readl(CONFIG_SYS_COMMS_CONFIG_2);
sysconf &= ~(0x7ul<<PHY_INTF_SEL);
sysconf |= (phy_sel<<PHY_INTF_SEL);
// writel(sysconf, CONFIG_SYS_COMMS_CONFIG_2);
/* CONFIG_SYS_COMMS_CONFIG_2[8] = gmac_mii_enable */
// sysconf = readl(CONFIG_SYS_COMMS_CONFIG_2);
SET_SYSCONF_BIT(sysconf, enmii, GMAC_MII_ENABLE);
// writel(sysconf, CONFIG_SYS_COMMS_CONFIG_2);
/* CONFIG_SYS_COMMS_CONFIG_2[9] = gmac_phy_clock_sel */
// sysconf = readl(CONFIG_SYS_COMMS_CONFIG_2);
SET_SYSCONF_BIT(sysconf, ext_clk, GMAC_PHY_CLOCK_SEL);
writel(sysconf, CONFIG_SYS_COMMS_CONFIG_2);
/* choose the correct direction for PHYCLK */
pins[0].dir = (ext_clk) ? STPIO_IN : STPIO_ALT_OUT;
/* set all the PIOs correctly */
for (i = 0; i < pins_num; i++)
{
SET_PIO_PIN(ST40_PIO_BASE(pins[i].port), pins[i].pin, pins[i].dir);
}
}
#if defined(CONFIG_ST40_FLI7510) SET_PIO_PIN(ST40_PIO_BASE(27), 1, STPIO_IN); /* USB_A_OVRCUR */ SET_PIO_PIN(ST40_PIO_BASE(27), 2, STPIO_ALT_OUT); /* USB_A_PWREN */ #else SET_PIO_PIN(ST40_PIO_BASE(26), 3, STPIO_IN); /* USB_A_OVRCUR */ SET_PIO_PIN(ST40_PIO_BASE(26), 4, STPIO_ALT_OUT); /* USB_A_PWREN */ #endif /* CONFIG_ST40_FLI7510 */ break; case 1: clken = 22; rstn = 24; override = 15; ovrcur = 16; polarity = 14; SET_PIO_PIN(ST40_PIO_BASE(26), 5, STPIO_IN); /* USB_C_OVRCUR */ SET_PIO_PIN(ST40_PIO_BASE(26), 6, STPIO_ALT_OUT); /* USB_C_PWREN */ break; default: BUG(); return; } #if !defined(CONFIG_ST40_FLI7510) sysconf = readl(CONFIG_SYS_COMMS_CONFIG_1); /* CONFIG_SYS_COMMS_CONFIG_1[22,21] = conf_usb_clk_en */ SET_SYSCONF_BIT(sysconf, 1, clken); /* CONFIG_SYS_COMMS_CONFIG_1[24,23] = conf_usb_rst_n */ SET_SYSCONF_BIT(sysconf, 1, rstn); writel(sysconf, CONFIG_SYS_COMMS_CONFIG_1); #endif /* CONFIG_ST40_FLI7510 */
/* drive outputs with sensible initial values */
STPIO_SET_PIN(ST40_PIO_BASE(2), 0, 0); /* deassert SPI_MOSI */
STPIO_SET_PIN(ST40_PIO_BASE(1), 7, 1); /* deassert SPI_notCS */
STPIO_SET_PIN(ST40_PIO_BASE(1), 6, 1); /* assert SPI_CLK */
#else
#error Currently only S/W bit-banging for SPI is supported.
#endif /* CONFIG_SOFT_SPI */
}
#if defined(CONFIG_SOFT_SPI) /* Use "bit-banging" for SPI */
extern void stx7108_spi_scl(const int val)
{
const int pin = 6; /* PIO1[6] = SPI_CLK */
STPIO_SET_PIN(ST40_PIO_BASE(1), pin, val ? 1 : 0);
}
extern void stx7108_spi_sda(const int val)
{
const int pin = 0; /* PIO2[0] = SPI_MOSI */
STPIO_SET_PIN(ST40_PIO_BASE(2), pin, val ? 1 : 0);
}
extern unsigned char stx7108_spi_read(void)
{
const int pin = 1; /* PIO2[1] = SPI_MISO */
return STPIO_GET_PIN(ST40_PIO_BASE(2), pin);
}
extern void fli7540_usb_init(
const int port,
const enum fli7540_usb_ovrcur_mode ovrcur_mode)
{
static int xtal_initialized;
int clken, rstn;
int override, ovrcur, polarity;
unsigned long sysconf;
if (!xtal_initialized++)
{
sysconf = readl(CONFIG_SYS_SPARE_1);
#if defined(CONFIG_ST40_FLI7510)
SET_SYSCONF_BIT(sysconf, 0, USB_XTAL_VALID);
#else
SET_SYSCONF_BIT(sysconf, 1, USB_XTAL_VALID);
#endif /* CONFIG_ST40_FLI7510 */
writel(sysconf, CONFIG_SYS_SPARE_1);
}
switch (port) {
case 0:
clken = 21;
rstn = 23;
override = 12;
ovrcur = 13;
polarity = 11;
#if defined(CONFIG_ST40_FLI7510)
SET_PIO_PIN(ST40_PIO_BASE(27), 1, STPIO_IN); /* USB_A_OVRCUR */
SET_PIO_PIN(ST40_PIO_BASE(27), 2, STPIO_ALT_OUT); /* USB_A_PWREN */
#else
SET_PIO_PIN(ST40_PIO_BASE(26), 3, STPIO_IN); /* USB_A_OVRCUR */
SET_PIO_PIN(ST40_PIO_BASE(26), 4, STPIO_ALT_OUT); /* USB_A_PWREN */
#endif /* CONFIG_ST40_FLI7510 */
break;
case 1:
clken = 22;
rstn = 24;
override = 15;
