/* ============================================================================
// fReadStatus()
// Returns:
// 0 if successful
// _____ if timed out on handshake to the device.
============================================================================*/
signed char fReadStatus(void)
{
SendVector(tsync_enable, num_bits_tsync_enable);
/* Send Read ID vector and get Target ID */
SendVector(read_id_v, 11); /* Read-MSB Vector is the first 11-Bits */
RunClock(2); /* Two SCLK cycles between write & read */
bTargetStatus[0] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+2, 12); /* 12 bits starting from the 3rd character */
RunClock(2); /* Read-LSB Command */
bTargetStatus[1] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+4, 1); /* 1 bit starting from the 5th character */
SendVector(tsync_disable, num_bits_tsync_disable);
if (bTargetStatus[0] == target_status00_v)
return PASS; /*PTJ: Status = 00 means Success, the SROM function did what it was supposed to */
if (bTargetStatus[0] == target_status01_v)
return STATUS_ERROR; /*PTJ: Status = 01 means that function is not allowed because of block level protection, for test with verify_setup (VERIFY-SETUP) */
if (bTargetStatus[0] == target_status03_v)
return STATUS_ERROR; /* PTJ: Status = 03 is fatal error, SROM halted*/
if (bTargetStatus[0] == target_status04_v)
return STATUS_ERROR; /*PTJ: Status = 04 means there was a checksum faliure with either the smart write code checksum, or the smart write paramters checksum, for test with PROGRAM-AND-VERIFY */
if (bTargetStatus[0] == target_status06_v)
return STATUS_ERROR; /* PTJ: Status = 06 means that Calibrate1 failed, for test with id_setup_1 (ID-SETUP-1) */
else
return STATUS_ERROR;
}
// ============================================================================
// fSecureTargetFlash()
// Before calling, load the array, abTargetDataOUT, with the desired security
// settings using LoadArrayWithSecurityData(StartAddress,Length,SecurityType).
// The can be called multiple times with different SecurityTypes as needed for
// particular Flash Blocks. Or set them all the same using the call below:
// LoadArrayWithSecurityData(0,SECURITY_BYTES_PER_BANK, 0);
// Returns:
// 0 if successful
// SECURITY_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fSecureTargetFlash(void)
{
unsigned char bTemp;
// Transfer the temporary RAM array into the target
bTargetAddress = 0x00;
bTargetDataPtr = 0x00;
SetSDATAStrong();
while (bTargetDataPtr < SECURITY_BYTES_PER_BANK) {
bTemp = abTargetDataOUT[bTargetDataPtr];
SendByte(write_byte_start, 4);
SendByte(bTargetAddress, 7);
SendByte(bTemp, 8);
SendByte(write_byte_end, 3);
// SendBytes() uses MSBits, so increment the address by '2' to put
// the 0..n address into the seven MSBit locations
bTargetAddress += 2; //PTJ: inc by 2 in order to support a 128 byte address space
bTargetDataPtr++;
}
SendVector(secure, num_bits_secure); //PTJ:
if ((fIsError = fDetectHiLoTransition())) {
return (SECURITY_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return (PASS);
}
/* ============================================================================
// fProgramTargetBlock()
// Program one block with data that has been loaded into a RAM buffer in the
// target device.
// Returns:
// 0 if successful
// BLOCK_ERROR if timed out on handshake to the device.
============================================================================*/
signed char fProgramTargetBlock(unsigned char bBankNumber, unsigned char bBlockNumber)
{
/* TSYNC should still be set when entering this function so this call is not necessary but added for insurance
// SendVector(tsync_enable, num_bits_tsync_enable); // t
*/
SendVector(set_block_num, num_bits_set_block_num);
/* Set the drive here because SendByte() does not. */
SetSDATAStrong();
SendByte(bBlockNumber, 8);
SendByte(set_block_num_end, 3);
SendVector(tsync_disable, num_bits_tsync_disable);
/* Send the program-and-verify vector. */
SendVector(program_and_verify, num_bits_program_and_verify);
/* wait for acknowledge from target. */
fIsError = fDetectHiLoTransition();
if (fIsError)
return BLOCK_ERROR;
/* Send the Wait-For-Poll-End vector */
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return PASS;
/* Don't do READ-STATUS here because that will
// require that we return multiple error values, if error occurs
*/
}
// ============================================================================
// fProgramTargetBlock()
// Program one block with data that has been loaded into a RAM buffer in the
// target device.
// Returns:
// 0 if successful
// BLOCK_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fProgramTargetBlock(unsigned char bBankNumber,
unsigned char bBlockNumber)
{
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(set_block_num, num_bits_set_block_num);
// Set the drive here because SendByte() does not.
SetSDATAStrong();
SendByte(bBlockNumber, 8);
SendByte(set_block_num_end, 3);
SendVector(tsync_disable, num_bits_tsync_disable); //PTJ:
// Send the program-block vector.
SendVector(program_and_verify, num_bits_program_and_verify); //PTJ: PROGRAM-AND-VERIFY
// wait for acknowledge from target.
if ((fIsError = fDetectHiLoTransition())) {
return (BLOCK_ERROR);
}
// Send the Wait-For-Poll-End vector
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return (PASS);
//PTJ: Don't do READ-STATUS here because that will
//PTJ: require that we return multiple error values, if error occurs
}
// ============================================================================
// fXRESInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fXRESInitializeTargetForISSP(void)
{
// Configure the pins for initialization
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow();
// Cycle reset and put the device in programming mode when it exits reset
AssertXRES();
DeassertXRES();
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
//PTJ: Send id_setup_1 instead of init1_v
//PTJ: both send CA Test Key and do a Calibrate1 SROM function
SendVector(id_setup_1, num_bits_id_setup_1);
if (fIsError = fDetectHiLoTransition()) {
// TX8SW_CPutString("\r\n fDetectHiLoTransition Error");
printk(KERN_INFO "\r\n fDetectHiLoTransition Error\n");
return (INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return (PASS);
}
signed char fProgramTargetBlock(unsigned char bBankNumber,
unsigned char bBlockNumber)
{
SendVector(set_block_num, num_bits_set_block_num);
/* Set the drive here because SendByte() does not.*/
SetSDATAStrong();
SendByte(bBlockNumber, 8);
SendByte(set_block_num_end, 3);
/*Send the program-block vector. */
SendVector(program, num_bits_program);
/*wait for acknowledge from target. */
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return BLOCK_ERROR;
/*Send the Wait-For-Poll-End vector*/
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return PASS;
/*
PTJ: Don't do READ-STATUS here because that will
PTJ: require that we return multiple error values, if error occurs
*/
}
signed char fSecureTargetFlash(void)
{
unsigned char bTemp;
bTargetAddress = 0x00;
bTargetDataPtr = 0x00;
SetSDATAStrong();
while (bTargetDataPtr < SecurityBytesPerBank) {
bTemp = abTargetDataOUT[bTargetDataPtr];
SendByte(write_byte_start, 5);
SendByte(bTargetAddress, 6);
SendByte(bTemp, 8);
SendByte(write_byte_end, 3);
bTargetAddress += 4;
bTargetDataPtr++;
}
SendVector(secure, num_bits_secure);
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return SECURITY_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return PASS;
}
// ============================================================================
// fAddTargetBankChecksum()
// Reads and adds the target bank checksum to the referenced accumulator.
// Returns:
// 0 if successful
// VERIFY_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fAccTargetBankChecksum(unsigned int* pAcc)
{
unsigned int wCheckSumData=0;
SendVector(checksum_v, num_bits_checksum);
fIsError = fDetectHiLoTransition();
if (fIsError )
{
return(CHECKSUM_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
//SendVector(tsync_enable, num_bits_tsync_enable);
//Send Read Checksum vector and get Target Checksum
SendVector(read_checksum_v, 11); // first 11-bits is ReadCKSum-MSB
RunClock(2); // Two SCLKs between write & read
bTargetDataIN = bReceiveByte();
wCheckSumData = ((unsigned int)(bTargetDataIN))<<8;
RunClock(1); // See Fig. 6
SendVector(read_checksum_v + 2, 12); // 12 bits starting from 3rd character
RunClock(2); // Read-LSB Command
bTargetDataIN = bReceiveByte();
wCheckSumData |= (unsigned int) bTargetDataIN;
RunClock(1);
SendVector(read_checksum_v + 4, 1); // Send the final bit of the command
//SendVector(tsync_disable, num_bits_tsync_disable);
*pAcc = wCheckSumData;
return(PASS);
}
// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(unsigned long flag)
{
int n;
printk(KERN_ERR"[TOUCHKEY]start fPowerCycleInitializeTargetForISSP\n");
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Turn on power to the target device before other signals
SetTargetVDDStrong();
ApplyTargetVDD();
local_irq_save(flag);
// wait 1msec for the power to stabilize
//#if 0
for (n = 0; n < 10; n++) {
Delay(DELAY100us);
}
//#endif
// Set SCLK to high Z so there is no clock and wait for a high to low
// transition on SDAT. SCLK is not needed this time.
SetSCLKHiZ();
// printk(KERN_DEBUG "fDetectHiLoTransition\n");
if ((fIsError = fDetectHiLoTransition())) {
#if defined(CONFIG_TARGET_LOCALE_NAATT)
local_irq_restore(flag);
#endif
printk(KERN_ERR"[TOUCHKEY]fDetectHiLoTransition()error!!!\n");
return (INIT_ERROR);
}
// Configure the pins for initialization
// SetSDATAHiZ(); // issp_test_20100709 block
SetSCLKStrong();
SCLKLow(); //PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end); //PTJ: rev308, added to match spec
// printk("SendVector(id_setup_1)\n",0,0,0);
SendVector(id_setup_1, num_bits_id_setup_1);
if ((fIsError = fDetectHiLoTransition())) {
#if defined(CONFIG_TARGET_LOCALE_NAATT)
local_irq_restore(flag);
#endif
printk(KERN_ERR"[TOUCHKEY]fDetectHiLoTransition()error!!!\n");
return (INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return (PASS);
}
// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(void)
{
unsigned char n;
unsigned long flags;
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Turn on power to the target device before other signals
SetTargetVDDStrong();
// lock interrupts for accurate timing
local_irq_save(flags);
ApplyTargetVDD();
// wait 1msec for the power to stabilize
#if 1 //etinum.LJ.firmware_update
Delay(1000);
#else
for (n=0; n<10; n++) {
Delay(DELAY100us/3);
}
#endif
// Set SCLK to high Z so there is no clock and wait for a high to low
// transition on SDAT. SCLK is not needed this time.
SetSCLKHiZ();
local_irq_restore(flags);
if (fIsError = fDetectHiLoTransition()) {
return(INIT_ERROR);
}
printk(KERN_ERR "[CYPRESS] step1 passed\n");
// Configure the pins for initialization
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow(); //PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
SendVector(id_setup_1, num_bits_id_setup_1);
if (fIsError = fDetectHiLoTransition()) {
return(INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
printk(KERN_ERR "[CYPRESS] step2 passed\n");
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return(PASS);
}
// PTJ: =======================================================================
// fReadWriteSetup()
// PTJ: The READ-WRITE-SETUP vector will enable TSYNC and switches the device
// to SRAM bank1 for PROGRAM-AND-VERIFY, SECURE and VERIFY-SETUP.
// Returns:
// 0 if successful
// _____ if timed out on handshake to the device.
// ============================================================================
signed char fReadWriteSetup(void)
{
#if defined(CONFIG_MACH_BENI)||defined(CONFIG_MACH_TASS) ||defined(CONFIG_MACH_COOPER)
SendVector(tsync_enable, num_bits_tsync_enable);
#endif
SendVector(read_write_setup, num_bits_read_write_setup);
return(PASS); //PTJ: is there anything else that should be done?
}
/* ============================================================================
// SetBankNumber()
// Set the bank number in the target device.
// Returns:
// none
// ==========================================================================*/
void SetBankNumber(unsigned char bBankNumber)
{
/*Send the bank-select vector.*/
SendVector(set_bank_number, 33);
/* Set the drive here because SendByte() does not.*/
SetSDATAStrong();
SendByte(bBankNumber, 8);
SendVector(set_bank_number_end, 25);
}
signed char fEraseTarget(void)
{
SendVector(erase, num_bits_erase);
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return ERASE_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return PASS;
}
// ============================================================================
// fEraseTarget()
// Perform a bulk erase of the target device.
// Returns:
// 0 if successful
// ERASE_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fEraseTarget(void)
{
SendVector(erase, num_bits_erase);
if (fIsError = fDetectHiLoTransition()) {
return(ERASE_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return(PASS);
}
// ============================================================================
// fEraseTarget()
// Perform a bulk erase of the target device.
// Returns:
// 0 if successful
// ERASE_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fEraseTarget(void)
{
SendVector(erase, num_bits_erase);
if ((fIsError = fDetectHiLoTransition())) {
// TX8SW_CPutString("fDetectHiLoTransition");
//printk(KERN_DEBUG"touchkey:fDetectHiLoTransition\n"); // issp_test_2010 block
return (ERASE_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return (PASS);
}
// ============================================================================
// fEraseTarget()
// Perform a bulk erase of the target device.
// Returns:
// 0 if successful
// ERASE_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fEraseTarget(void)
{
SendVector(erase, num_bits_erase);
if ((fIsError = fDetectHiLoTransition()) != PASS) {
// TX8SW_CPutString("\r\n fDetectHiLoTransition");
printk("\r\n fDetectHiLoTransition\n");
return(ERASE_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return(PASS);
}
// ============================================================================
// fEraseTarget()
// Perform a bulk erase of the target device.
// Returns:
// 0 if successful
// ERASE_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fEraseTarget(void)
{
SendVector(erase, num_bits_erase);
if ((fIsError = fDetectHiLoTransition())) {
// TX8SW_CPutString("\r\n fDetectHiLoTransition");
printk(KERN_INFO "\r\n fEraseTarget fDetectHiLoTransition\n");
/* issp_test_2010 block */
return (ERASE_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return (PASS);
}
// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(void)
{
// unsigned char n;
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Turn on power to the target device before other signals
SetTargetVDDStrong();
RemoveTargetVDD();
mdelay(5);
ApplyTargetVDD();
// wait 1msec for the power to stabilize
mdelay(1);
// Set SCLK to high Z so there is no clock and wait for a high to low
// transition on SDAT. SCLK is not needed this time.
SetSCLKHiZ();
fIsError = fDetectHiLoTransition();
if ( fIsError ) {
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
return(INIT_ERROR);
}
// Configure the pins for initialization
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow(); //PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
SendVector(id_setup_1, num_bits_id_setup_1);
fIsError = fDetectHiLoTransition();
if ( fIsError ) {
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
return(INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return(PASS);
}
/* PTJ: =======================================================================
// fSyncEnable()
// PTJ: The SYNC-ENABLE vector will enable TSYNC
//
// Returns:
// 0 if successful
// _____ if timed out on handshake to the device.
// ==========================================================================*/
signed char fSyncEnable(void)
{
SendVector(tsync_enable, num_bits_tsync_enable);
/*PTJ: 307 for tsync enable testing*/
return PASS;
/*PTJ: is there anything else that should be done?*/
}
signed char fReadByteLoop(unsigned int blknum)
{
bTargetAddress = 0;
bTargetDataPtr = 0;
while(bTargetDataPtr < TARGET_DATABUFF_LEN)
{
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4);
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress,7);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
//if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
if (bTargetDataIN != pSocData[blknum*TARGET_DATABUFF_LEN + bTargetDataPtr])
{
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("bTargetDataIN : ");
UART_PutHexByte(bTargetDataIN);
UART_CPutString(" abTargetDataOUT : ");
UART_PutHexByte(pSocData[blknum*TARGET_DATABUFF_LEN + bTargetDataPtr]);
#endif
return(BLOCK_ERROR);
}
bTargetDataPtr++;
// Increment the address by 2 to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
bTargetAddress += 2;
}
return(PASS);
}
// ============================================================================
// fVerifyTargetBlock()
// Verify the block just written to. This can be done byte-by-byte before the
// protection bits are set.
// Returns:
// 0 if successful
// BLOCK_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fVerifyTargetBlock(unsigned char bBankNumber,
unsigned char bBlockNumber)
{
SendVector(set_block_number, 11);
//Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bBlockNumber, 8);
SendByte(set_block_number_end, 3);
SendVector(verify_setup_v, num_bits_verify_setup);
if ((fIsError = fDetectHiLoTransition())) {
return (BLOCK_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
bTargetAddress = 0;
bTargetDataPtr = 0;
while (bTargetDataPtr < TARGET_DATABUFF_LEN) {
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4); //PTJ 308: this was changed from sending the first 5 bits to sending the first 4
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress, 6);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return an error.
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
return (BLOCK_ERROR);
bTargetDataPtr++;
// Increment the address by four to accomodate 6-Bit addressing
// (puts the 6-bit address into MSBit locations for "SendByte()").
bTargetAddress += 4;
}
return (PASS);
}
/* ============================================================================
// fVerifySiliconID()
// Returns:
// 0 if successful
// Si_ID_ERROR if timed out on handshake to the device.
============================================================================*/
signed char fVerifySiliconID(void)
{
SendVector(id_setup_2, num_bits_id_setup_2);
fIsError = fDetectHiLoTransition();
if (fIsError)
return SiID_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
/* Send Read ID vector and get Target ID */
SendVector(read_id_v, 11); /* Read-MSB Vector is the first 11-Bits */
RunClock(2); /* Two SCLK cycles between write & read */
bTargetID[0] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+2, 12); /* 1+11 bits starting from the 3rd byte */
RunClock(2); /* Read-LSB Command */
bTargetID[1] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+4, 1); /* 1 bit starting from the 5th byte */
/* read Revision ID from Accumulator A and Accumulator X */
SendVector(read_id_v+5, 11); /* 11 bits starting from the 6th byte */
RunClock(2);
bTargetID[2] = bReceiveByte(); /* Read from Acc.X */
RunClock(1);
SendVector(read_id_v+7, 12); /* 1+11 bits starting from the 8th byte */
RunClock(2);
bTargetID[3] = bReceiveByte(); /* Read from Acc.A */
RunClock(1);
SendVector(read_id_v+4, 1); /*1 bit starting from the 5th byte, */
SendVector(tsync_disable, num_bits_tsync_disable);
pr_info("%s: bTargetID[0] = %x, bTargetID[1] = %x\n", __func__, bTargetID[0], bTargetID[1]);
if (bTargetID[0] == target_id_v_1[0] || bTargetID[1] == target_id_v_1[1])
return PASS;
else if (bTargetID[0] == target_id_v_2[0] || bTargetID[1] == target_id_v_2[1])
return PASS;
else
return SiID_ERROR;
}
signed char fVerifySetup(unsigned char bBankNumber, unsigned char bBlockNumber)
{
SendVector(set_block_num, num_bits_set_block_num);
/* Set the drive here because SendByte() does not */
SetSDATAStrong();
SendByte(bBlockNumber, 8);
SendByte(set_block_num_end, 3);
SendVector(verify_setup, num_bits_my_verify_setup);
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return VERIFY_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
return PASS;
}
/* ============================================================================
// LoadTarget()
// Transfers data from array in Host to RAM buffer in the target.
// Returns the checksum of the data.
============================================================================*/
unsigned int iLoadTarget(void)
{
unsigned char bTemp;
unsigned int iChecksumData = 0;
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_write_setup, num_bits_read_write_setup);
/* Set SDATA to Strong Drive here because SendByte() does not */
SetSDATAStrong();
/* Transfer the temporary RAM array into the target.
// In this section, a 128-Byte array was specified by #define, so the entire
// 128-Bytes are written in this loop.
*/
bTargetAddress = 0x00;
bTargetDataPtr = 0x00;
while (bTargetDataPtr < TARGET_DATABUFF_LEN) {
bTemp = abTargetDataOUT[bTargetDataPtr]; /* PROGRAM_DATA; */
iChecksumData += bTemp;
SendByte(write_byte_start, 4); /* we need to be able to write 128 bytes from address 0x80 to 0xFF */
SendByte(bTargetAddress, 7); /* we need to be able to write 128 bytes from address 0x80 to 0xFF */
SendByte(bTemp, 8);
SendByte(write_byte_end, 3);
/* !!!NOTE:
// SendByte() uses MSbits, so inc by '2' to put the 0..128 address into
// the seven MSBit locations.
//
// This can be confusing, but check the logic:
// The address is only 7-Bits long. The SendByte() subroutine will
// send however-many bits, BUT...always reads them bits from left-to-
// right. So in order to pass a value of 0..128 as the address using
// SendByte(), we have to left justify the address by 1-Bit.
// This can be done easily by incrementing the address each time by
// '2' rather than by '1'.
*/
bTargetAddress += 2; /* inc by 2 in order to support a 128 byte address space */
bTargetDataPtr++;
}
return iChecksumData;
}
DWORD CMiaDspCommObject::SetSampleRate( DWORD dwNewSampleRate )
{
//
// Set the sample rate
//
DWORD dwControlReg = MIA_48000;
switch ( dwNewSampleRate )
{
case 96000 :
dwControlReg = MIA_96000;
break;
case 88200 :
dwControlReg = MIA_88200;
break;
case 44100 :
dwControlReg = MIA_44100;
break;
case 32000 :
dwControlReg = MIA_32000;
break;
}
//
// Override the clock setting if this Mia is set to S/PDIF clock
//
if ( ECHO_CLOCK_SPDIF == GetInputClock() )
dwControlReg |= MIA_SPDIF;
//
// Set the control register if it has changed
//
if (dwControlReg != GetControlRegister())
{
if ( !WaitForHandshake() )
return 0xffffffff;
//
// Set the values in the comm page; the dwSampleRate
// field isn't used by the DSP, but is read by the call
// to GetSampleRate below
//
m_pDspCommPage->dwSampleRate = SWAP( dwNewSampleRate );
SetControlRegister( dwControlReg );
//
// Poke the DSP
//
ClearHandshake();
SendVector( DSP_VC_UPDATE_CLOCKS );
}
return GetSampleRate();
} // DWORD CMiaDspCommObject::SetSampleRate( DWORD dwNewSampleRate )
signed char fAccTargetBankChecksum(unsigned int *pAcc)
{
unsigned int wCheckSumData = 0;
SendVector(checksum_v, num_bits_checksum);
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return CHECKSUM_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_checksum_v, 11); /*first 11-bits is ReadCKSum-MSB*/
RunClock(2); /*Two SCLKs between write & read*/
bTargetDataIN = bReceiveByte();
wCheckSumData = bTargetDataIN<<8;
RunClock(1);
/*12 bits starting from 3rd character*/
SendVector(read_checksum_v + 2, 12);
RunClock(2); /* Read-LSB Command*/
bTargetDataIN = bReceiveByte();
wCheckSumData |= (bTargetDataIN & 0xFF);
RunClock(1);
/*Send the final bit of the command */
SendVector(read_checksum_v + 3, 1);
/* Send the final bit of the command
PTJ: read_checksum_v may have to change if TSYNC needs to be enabled*/
SendVector(tsync_disable, num_bits_tsync_disable);
*pAcc = wCheckSumData;
return PASS;
}
// ============================================================================
// fAddTargetBankChecksum()
// Reads and adds the target bank checksum to the referenced accumulator.
// Returns:
// 0 if successful
// VERIFY_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fAccTargetBankChecksum(unsigned int *pAcc)
{
unsigned int wCheckSumData;
SendVector(checksum_setup, num_bits_checksum_setup); //PTJ:CHECKSUM-SETUP, it is taking 100ms > time > 200ms to complete the checksum
if ((fIsError = fDetectHiLoTransition())) { //100ms is default
return (VERIFY_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
//Send Read Checksum vector and get Target Checksum
SendVector(read_checksum_v, 11); // first 11-bits is ReadCKSum-MSB
RunClock(2); // Two SCLKs between write & read
bTargetDataIN = bReceiveByte();
wCheckSumData = bTargetDataIN << 8;
RunClock(1); // See Fig. 6
SendVector(read_checksum_v + 2, 12); // 12 bits starting from 3rd character
RunClock(2); // Read-LSB Command
bTargetDataIN = bReceiveByte();
wCheckSumData |= (bTargetDataIN & 0xFF);
RunClock(1);
SendVector(read_checksum_v + 3, 1); // Send the final bit of the command //PTJ: read_checksum_v may have to change if TSYNC needs to be enabled
SendVector(tsync_disable, num_bits_tsync_disable);
*pAcc = wCheckSumData;
return (PASS);
}
/* ============================================================================
// fAddTargetBankChecksum()
// Reads and adds the target bank checksum to the referenced accumulator.
// Returns:
// 0 if successful
// VERIFY_ERROR if timed out on handshake to the device.
============================================================================*/
signed char fAccTargetBankChecksum(unsigned int *pAcc)
{
unsigned char bMSB = 0;
unsigned char bLSB = 0;
SendVector(checksum_setup, num_bits_checksum_setup);
/* PTJ:CHECKSUM-SETUP, it is taking 100ms > time > 200ms to complete the checksum */
fIsError = fDetectHiLoTransition();
if (fIsError) /* 100ms is default */
return VERIFY_ERROR;
mdelay(150);
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
/* Send Read Checksum vector and get Target Checksum */
SendVector(read_checksum_v, 11); /* first 11-bits is ReadCKSum-MSB */
RunClock(2); /* Two SCLKs between write & read */
bMSB = bReceiveByte();
RunClock(1); /* See Fig. 6 */
SendVector(read_checksum_v + 2, 12); /* 12 bits starting from 3rd character */
RunClock(2); /* Read-LSB Command */
bLSB = bReceiveByte();
RunClock(1);
SendVector(read_checksum_v + 3, 1); /* Send the final bit of the command */
SendVector(tsync_disable, num_bits_tsync_disable);
*pAcc = (bMSB << 8) | bLSB; /* combine the MSB and the LSB */
return PASS;
}
signed char fReadByteLoop(void)
{
/* char x = 0; //wly */
bTargetAddress = 0;
bTargetDataPtr = 0;
/* pr_info("wly: fReadByteLoop"); */
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_write_setup, num_bits_read_write_setup);
while (bTargetDataPtr < TARGET_DATABUFF_LEN) {
/* Send Read Byte vector and then get a byte from Target */
SendVector(read_byte_v, 4);
/* Set the drive here because SendByte() does not */
SetSDATAStrong();
SendByte(bTargetAddress, 7);
RunClock(2); /* Run two SCLK cycles between writing and reading */
SetSDATAHiZ(); /* Set to HiZ so Target can drive SDATA */
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); /* Send the ReadByte Vector End */
/* Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
//pr_info("wly: bTargetDataIN=%x, %x\n", bTargetDataIN, abTargetDataOUT[bTargetDataPtr]);
*/
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
return BLOCK_ERROR;
bTargetDataPtr++;
/* Increment the address by 2 to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
*/
bTargetAddress += 2;
}
SendVector(tsync_disable, num_bits_tsync_disable);
return PASS;
}
/* ============================================================================
// fXRESInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
============================================================================*/
signed char fXRESInitializeTargetForISSP(void)
{
/* Configure the pins for initialization */
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow();
#ifdef ACTIVE_LOW_XRES
AssertXRES(); /* assert XRES before setting XRES pin to strong */
SetXRESStrong();
DeassertXRES();
/* Delay(XRES_CLK_DELAY); */
mdelay(1);
AssertXRES();
#else
/* Cycle reset and put the device in programming mode when it exits reset */
SetXRESStrong();
AssertXRES();
Delay(XRES_CLK_DELAY);
DeassertXRES();
#endif
/* !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
*/
SendVector(id_setup_1, num_bits_id_setup_1);
fIsError = fDetectHiLoTransition();
if (fIsError)
return INIT_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
/* NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec). */
return PASS;
}
