void Mapper165::SetBank_PPU()
{
if(latch==0xFD){
SetBank_PPUSUB( 0, chr0 );
SetBank_PPUSUB( 4, chr2 );
}else{
SetBank_PPUSUB( 0, chr1 );
SetBank_PPUSUB( 4, chr3 );
}
}
void Mapper074::SetBank_PPU()
{
if( VROM_1K_SIZE ) {
if( reg[0] & 0x80 ) {
// SetVROM_8K_Bank( chr4, chr5, chr6, chr7,
// chr01, chr01+1, chr23, chr23+1 );
SetBank_PPUSUB( 4, chr01+0 );
SetBank_PPUSUB( 5, chr01+1 );
SetBank_PPUSUB( 6, chr23+0 );
SetBank_PPUSUB( 7, chr23+1 );
SetBank_PPUSUB( 0, chr4 );
SetBank_PPUSUB( 1, chr5 );
SetBank_PPUSUB( 2, chr6 );
SetBank_PPUSUB( 3, chr7 );
} else {
// SetVROM_8K_Bank( chr01, chr01+1, chr23, chr23+1,
// chr4, chr5, chr6, chr7 );
SetBank_PPUSUB( 0, chr01+0 );
SetBank_PPUSUB( 1, chr01+1 );
SetBank_PPUSUB( 2, chr23+0 );
SetBank_PPUSUB( 3, chr23+1 );
SetBank_PPUSUB( 4, chr4 );
SetBank_PPUSUB( 5, chr5 );
SetBank_PPUSUB( 6, chr6 );
SetBank_PPUSUB( 7, chr7 );
}
} else {
if( reg[0] & 0x80 ) {
SetCRAM_1K_Bank( 4, (chr01+0)&0x07 );
SetCRAM_1K_Bank( 5, (chr01+1)&0x07 );
SetCRAM_1K_Bank( 6, (chr23+0)&0x07 );
SetCRAM_1K_Bank( 7, (chr23+1)&0x07 );
SetCRAM_1K_Bank( 0, chr4&0x07 );
SetCRAM_1K_Bank( 1, chr5&0x07 );
SetCRAM_1K_Bank( 2, chr6&0x07 );
SetCRAM_1K_Bank( 3, chr7&0x07 );
} else {
SetCRAM_1K_Bank( 0, (chr01+0)&0x07 );
SetCRAM_1K_Bank( 1, (chr01+1)&0x07 );
SetCRAM_1K_Bank( 2, (chr23+0)&0x07 );
SetCRAM_1K_Bank( 3, (chr23+1)&0x07 );
SetCRAM_1K_Bank( 4, chr4&0x07 );
SetCRAM_1K_Bank( 5, chr5&0x07 );
SetCRAM_1K_Bank( 6, chr6&0x07 );
SetCRAM_1K_Bank( 7, chr7&0x07 );
}
}
}
