void AR0330_SetHue(int32_t hue) {
CyU3PDebugPrint(4, "AR0330_SetHue: %d\r\n", hue);
#define SetLow(io) CyU3PGpioSetValue(io, CyFalse)
#define SetHigh(io) CyU3PGpioSetValue(io, CyTrue)
#define SetBit(io, value) CyU3PGpioSetValue(io, 0 != (value & 0x80))
#if 0
CyU3PReturnStatus_t status;
status = CyU3PGpioSetValue(LED_DRIVER_SDI, 0 != (hue & 1));
if (CY_U3P_SUCCESS != status) {
CyU3PDebugPrint(4, "AR0330_SetHue: error = %d 0x%x\r\n", status, status);
}
status = CyU3PGpioSetValue(LED_DRIVER_CLK, 0 != (hue & 2));
if (CY_U3P_SUCCESS != status) {
CyU3PDebugPrint(4, "AR0330_SetHue: error = %d 0x%x\r\n", status, status);
}
status = CyU3PGpioSetValue(LED_DRIVER_ED1, 0 != (hue & 4));
if (CY_U3P_SUCCESS != status) {
CyU3PDebugPrint(4, "AR0330_SetHue: error = %d 0x%x\r\n", status, status);
}
status = CyU3PGpioSetValue(LED_DRIVER_ED2, 0 != (hue & 8));
if (CY_U3P_SUCCESS != status) {
CyU3PDebugPrint(4, "AR0330_SetHue: error = %d 0x%x\r\n", status, status);
}
#else
// initialise
SetLow(LED_DRIVER_CLK);
SetHigh(LED_DRIVER_ED2);
SetLow(LED_DRIVER_ED1);
CyU3PThreadSleep(1);
for (int i = 0; i < 8; ++i) {
SetBit(LED_DRIVER_SDI, hue);
hue <<= 1; // output bit big endian
CyU3PBusyWait(10);
//CyU3PThreadSleep(10);
SetHigh(LED_DRIVER_CLK);
CyU3PBusyWait(10);
//CyU3PThreadSleep(10);
SetLow(LED_DRIVER_CLK);
}
//CyU3PThreadSleep(1);
CyU3PBusyWait(10);
SetHigh(LED_DRIVER_ED1);
//CyU3PThreadSleep(10);
CyU3PBusyWait(10);
SetLow(LED_DRIVER_ED1);
//CyU3PThreadSleep(1);
CyU3PBusyWait(10);
SetLow(LED_DRIVER_ED2);
#endif
}
void Button::Init()
{
_pin->SetupGPIO_InPullUp();
//initial set high
n_same_read = 0;
SetHigh();
}
CStVersionInfo& CStVersionInfo::operator=(const CStVersionInfo& _ver)
{
SetHigh(_ver.GetHigh());
SetMid(_ver.GetMid());
SetLow(_ver.GetLow());
m_last_error = _ver.m_last_error;
m_system_last_error = _ver.m_system_last_error;
m_obj_name = _ver.m_obj_name;
return *this;
}
/********************************************************************************************************
Function Name: Test_OutputIO
Description : Êý×ÖÊä³ö²âÊÔ
Inputs : None
Outputs : None
Notes :
Revision :
********************************************************************************************************/
void Test_OutputIO(void)
{
while(1)
{
SetHigh(1);SetHigh(2);SetHigh(3);SetHigh(4);SetLow(5);SetLow(6);SetLow(7);SetLow(8);
Delay_ms(1000);
SetLow(1);SetLow(2);SetLow(3);SetLow(4);SetHigh(5);SetHigh(6);SetHigh(7);SetHigh(8);
Delay_ms(1000);
}
}
int main() {
uint8_t tmpCurrentMode, tmpPreviousMode;
//init ddr
SetHigh(DBP_GSCLK_DDR, DBP_GSCLK_PIN);
SetHigh(DBP_BLANK_DDR, DBP_BLANK_PIN);
SetHigh(DBP_XLAT_DDR, DBP_XLAT_PIN);
SetHigh(DBP_VPRG_DDR, DBP_VPRG_PIN);
SetHigh(DBP_DCPRG_DDR, DBP_DCPRG_PIN);
SetHigh(DBP_SIN_DDR, DBP_SIN_PIN);
SetHigh(DBP_SCLK_DDR, DBP_SCLK_PIN);
//set initial values
SetHigh(DBP_BLANK_PORT, DBP_BLANK_PIN);
SetHigh(DBP_VPRG_PORT, DBP_VPRG_PIN);
SetHigh(DBP_DCPRG_PORT, DBP_DCPRG_PIN);
SetLow(DBP_GSCLK_PORT, DBP_GSCLK_PIN);
SetLow(DBP_XLAT_PORT, DBP_XLAT_PIN);
SetLow(DBP_SIN_PORT, DBP_SIN_PIN);
SetLow(DBP_SCLK_PORT, DBP_SCLK_PIN);
//init adc converter
/*
SetHigh(IRP_TRANSMITTER_DDR, IRP_TRANSMITTER_PIN);
SetLow(IRP_RECEIVER_DDR, IRP_RECEIVER_PIN);
ADMUX = (1 << REFS0); //voltage reference = AVCC, input channel = ADC0
ADCSRA = (1 << ADATE) | (1 << ADIE) | (1 << ADEN) | (1 << ADPS1); //f.osc / 4
ADCSRB = (1 << ADTS1) | (1 << ADTS0); //auto trigger source = timer0 compare match A
*/
//init GSCLK timer
TCCR0A |= (1 << WGM01);
TCCR0B |= (1 << CS02) | (1 << CS00);
OCR0A = 0x03; //f.osc / 4096
TIMSK0 |= (1 << OCIE0A);
//init spi
SetHigh(SPI_SS_DDR, SPI_SS_PIN);
SPCR = (1 << SPE) | (1 << MSTR) | (1 << SPR1); //F_CPU / 16 ~ 365kHz
//init i2c
TWAR = (SLAVE_Address << 1);
TWCR = (1 << TWEA) | (1 << TWEN) | (1 << TWIE);
//init queue
QUEUE_Init(&TWI_InputBuffer);
//send dc data to driver through spi
for(i = 0; i < 36; ++i) {
SPDR = 0xff;
while(!(SPSR & (1 << SPIF)));
}
SetHigh(DBP_XLAT_PORT, DBP_XLAT_PIN);
SetLow(DBP_XLAT_PORT, DBP_XLAT_PIN);
tmpPreviousMode = CMD_SetDC;
SetLow(DBP_VPRG_PORT, DBP_VPRG_PIN);
//send gs data to driver through spi
for(i = 0; i < 72; ++i) {
SPDR = 0xff;
while(!(SPSR & (1 << SPIF)));
}
SPCR &= ~(1 << SPE);
SetHigh(DBP_XLAT_PORT, DBP_XLAT_PIN);
SetLow(DBP_XLAT_PORT, DBP_XLAT_PIN);
SetLow(DBP_BLANK_PORT, DBP_BLANK_PIN);
tmpPreviousMode = CMD_SetGS;
//enable interrupts
sei();
while(1) {
if(!GLB_NeedXLAT && !QUEUE_Empty(&TWI_InputBuffer)) {
tmpCurrentMode = QUEUE_Remove(&TWI_InputBuffer);
switch(tmpCurrentMode) {
case CMD_SetDC: {
SetHigh(DBP_VPRG_PORT, DBP_VPRG_PIN);
SendDataToTLC5940(&TWI_InputBuffer, 36);
GLB_NeedXLAT = 1;
tmpPreviousMode = tmpCurrentMode;
break;
}
case CMD_SetGS: {
if(tmpPreviousMode == CMD_SetGS) {
SetHigh(DBP_SCLK_PORT, DBP_SCLK_PIN);
SetLow(DBP_SCLK_PORT, DBP_SCLK_PIN);
}
SetLow(DBP_VPRG_PORT, DBP_VPRG_PIN);
SendDataToTLC5940(&TWI_InputBuffer, 72);
GLB_NeedXLAT = 1;
tmpPreviousMode = tmpCurrentMode;
break;
}
case CMD_ClearGS: {
if(tmpPreviousMode == CMD_SetGS) {
SetHigh(DBP_SCLK_PORT, DBP_SCLK_PIN);
SetLow(DBP_SCLK_PORT, DBP_SCLK_PIN);
}
SetLow(DBP_VPRG_PORT, DBP_VPRG_PIN);
SPCR |= (1 << SPE);
cli();
for(i = 0; i < 72; ++i) {
SPDR = 0x00;
while(!(SPSR & (1 << SPIF)));
}
sei();
SPCR &= ~(1 << SPE);
GLB_NeedXLAT = 1;
tmpPreviousMode = CMD_SetGS;
break;
}
}
}
}
}
static void GenEquivSet( act_eq_entry *a, act_eq_entry *b,
intstar4 a_offset, intstar4 b_offset ) {
//===================================================================
// Merge the specified equivalence relation to the corresponding
// equivalence set.
// GenEquivSet( a, b, a_offset, b_offset )
// for EQUIVALENCE ( a(a_offset), b(b_offset) )
sym_id a_name;
sym_id b_name;
sym_id p;
sym_id q;
intstar4 c;
intstar4 d;
intstar4 dist;
intstar4 low;
intstar4 high;
com_eq *p_ext;
com_eq *q_ext;
bool p_in_common;
bool q_in_common;
byte p_type;
byte q_type;
/* if an entry is marked static, then b must be too */
if( ForceStatic( a->name_equived->ns.flags ) ) {
unsigned_16 sym_flags = a->name_equived->ns.flags & ( SY_DATA_INIT | SY_SAVED );
b->name_equived->ns.flags |= sym_flags;
} else if( ForceStatic( b->name_equived->ns.flags ) ) {
unsigned_16 sym_flags = b->name_equived->ns.flags & ( SY_DATA_INIT | SY_SAVED );
a->name_equived->ns.flags |= sym_flags;
}
a_name = a->name_equived;
b_name = b->name_equived;
p = a_name;
q = b_name;
c = 0;
d = 0;
dist = b_offset - a_offset;
for(;;) { // find leader of B
q_ext = q->ns.si.va.vi.ec_ext;
if( ( q_ext->ec_flags & IN_EQUIV_SET ) == 0 ) {
SetHigh( q );
break;
}
if( q_ext->ec_flags & LEADER ) break;
d += q_ext->offset;
q = q_ext->link_eqv;
}
q_in_common = ( q->ns.flags & SY_IN_COMMON ) ||
( q_ext->ec_flags & MEMBER_IN_COMMON );
q_type = q_ext->ec_flags & ES_TYPE;
if( q_type == ES_NO_TYPE ) {
q_type = ClassifyType( q->ns.typ );
}
for(;;) { // find leader of A
p_ext = p->ns.si.va.vi.ec_ext;
if( ( p_ext->ec_flags & IN_EQUIV_SET ) == 0 ) {
SetHigh( p );
break;
}
if( p_ext->ec_flags & LEADER ) break;
c += p_ext->offset;
p = p_ext->link_eqv;
}
p_in_common = ( p->ns.flags & SY_IN_COMMON ) ||
( p_ext->ec_flags & MEMBER_IN_COMMON );
p_type = p_ext->ec_flags & ES_TYPE;
if( p_type == ES_NO_TYPE ) {
p_type = ClassifyType( p->ns.typ );
}
if( p == q ) {
if( c - d != dist ) {
// name equivalenced to 2 different relative positions
NameErr( EV_DIFF_REL_POS, a_name );
}
// Consider: EQUIVALENCE (A,A)
// Every equivalence set must have a leader
q_ext->ec_flags |= LEADER;
} else {
if( q_in_common && p_in_common ) {
if( q_ext->com_blk != p_ext->com_blk ) {
// 2 names in common equivalenced
NamNamErr( EC_2NAM_EC, a_name, b_name );
if( !( a_name->ns.si.va.vi.ec_ext->ec_flags & IN_EQUIV_SET ) ) {
a_name->ns.flags &= ~SY_IN_EQUIV;
}
if( !( b_name->ns.si.va.vi.ec_ext->ec_flags & IN_EQUIV_SET ) ) {
b_name->ns.flags &= ~SY_IN_EQUIV;
}
return;
}
}
p_ext->ec_flags |= IN_EQUIV_SET;
p_ext->ec_flags &= ~LEADER;
p_ext->link_eqv = q;
p_ext->offset = d - c + dist;
if( q_type != p_type ) {
q_ext->ec_flags |= ES_MIXED;
}
if( q_in_common ) {
q_ext->ec_flags |= MEMBER_IN_COMMON;
} else if( p_in_common ) {
q_ext->com_blk = p_ext->com_blk;
q_ext->ec_flags |= MEMBER_IN_COMMON;
}
if( ( q->ns.flags & SY_DATA_INIT ) ||
( p->ns.flags & SY_DATA_INIT ) ||
( p_ext->ec_flags & MEMBER_INITIALIZED ) ) {
// This used to be set by VarList in DATA, but there was
// a problem with the following:
// equivalence (i,j)
// integer i/19/
// since STResolve hadn't been done, the equiv set for i
// didn't have a LEADER. So instead it is set here.
q_ext->ec_flags |= MEMBER_INITIALIZED;
}
q_ext->ec_flags |= ( IN_EQUIV_SET | LEADER );
low = p_ext->low + p_ext->offset;
if( q_ext->low > low ) {
q_ext->low = low;
}
high = p_ext->high + p_ext->offset;
if( q_ext->high < high ) {
q_ext->high = high;
}
}
}
CStVersionInfo::CStVersionInfo(string _base):CStBase(_base)
{
SetHigh(0);
SetMid(0);
SetLow(0);
}
