void flashScreen( void ) {
int i;
for( i = 0; i < 4; ++i ) {
invertScreen();
SysCtrlDelay( 1000000 ); // Abount 50ms
}
}
/**************************************************************************************************
* @fn npSpiInit
*
* @brief This function is called to set up the SPI interface.
*
* input parameters
*
* None.
*
* output parameters
*
* None.
*
* @return None.
**************************************************************************************************
*/
void npSpiInit(void)
{
uint32 ulDummy;
if (ZNP_CFG1_UART == znpCfg1)
{
return;
}
/* Configure SRDY and deassert SRDY */
GPIOPinTypeGPIOOutput(HAL_SPI_SRDY_BASE, HAL_SPI_SRDY_PIN);
GPIOPinWrite(HAL_SPI_SRDY_BASE, HAL_SPI_SRDY_PIN, HAL_SPI_SRDY_PIN);
/* Configure MRDY and deassert MRDY */
GPIOPinTypeGPIOInput(HAL_SPI_MRDY_BASE, HAL_SPI_MRDY_PIN);
GPIOPinWrite(HAL_SPI_MRDY_BASE, HAL_SPI_MRDY_PIN, HAL_SPI_MRDY_PIN);
/* Enable SSI peripheral module */
SysCtrlPeripheralEnable(BSP_SPI_SSI_ENABLE_BM);
/* Delay is essential for this customer */
SysCtrlDelay(32);
/* Configure pin type */
GPIOPinTypeSSI(BSP_SPI_BUS_BASE, (BSP_SPI_MOSI | BSP_SPI_MISO | BSP_SPI_SCK | HAL_SPI_SS_PIN));
/* Map SSI signals to the correct GPIO pins and configure them as HW ctrl'd */
IOCPinConfigPeriphOutput(BSP_SPI_BUS_BASE, BSP_SPI_MISO, IOC_MUX_OUT_SEL_SSI0_TXD);
IOCPinConfigPeriphInput(BSP_SPI_BUS_BASE, BSP_SPI_SCK, IOC_CLK_SSIIN_SSI0);
IOCPinConfigPeriphInput(BSP_SPI_BUS_BASE, BSP_SPI_MOSI, IOC_SSIRXD_SSI0);
IOCPinConfigPeriphInput(BSP_SPI_BUS_BASE, HAL_SPI_SS_PIN, IOC_SSIFSSIN_SSI0);
/* Disable SSI function */
SSIDisable(BSP_SPI_SSI_BASE);
/* Set system clock as SSI clock source */
SSIClockSourceSet(BSP_SPI_SSI_BASE, SSI_CLOCK_SYSTEM);
/* Configure SSI module to Motorola/Freescale SPI mode 3 Slave:
* Polarity = 1, observed in scope from MSP430 master
* Phase = 1, observed in scope from MSP430 master
* Word size = 8 bits
* Clock = 2MHz, observed MSP430 master clock is 2049180Hz
*/
SSIConfigSetExpClk(BSP_SPI_SSI_BASE, SysCtrlClockGet(), SSI_FRF_MOTO_MODE_3,
SSI_MODE_SLAVE, 2000000UL, 8);
/* Register SPI uDMA complete interrupt */
SSIIntRegister(BSP_SPI_SSI_BASE, &npSpiUdmaCompleteIsr);
/* Enable uDMA complete interrupt for SPI RX and TX */
SSIDMAEnable(BSP_SPI_SSI_BASE, SSI_DMA_RX | SSI_DMA_TX);
/* Configure SPI priority */
IntPrioritySet(INT_SSI0, HAL_INT_PRIOR_SSI0);
IntPrioritySet(INT_GPIOB, HAL_INT_PRIOR_SSI_MRDY);
/* Enable the SSI function */
SSIEnable(BSP_SPI_SSI_BASE);
GPIOIntTypeSet(HAL_SPI_MRDY_BASE, HAL_SPI_MRDY_PIN, GPIO_BOTH_EDGES);
GPIOPortIntRegister(HAL_SPI_MRDY_BASE, *npSpiMrdyIsr);
GPIOPinIntEnable(HAL_SPI_MRDY_BASE, HAL_SPI_MRDY_PIN);
/* Initialize uDMA for SPI */
npSpiUdmaInit();
}
