Ejemplo n.º 1
0
/*
 * Titan PCI Config Byte Write
 */
static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg,
	int size, u32 val)
{
	uint32_t address_reg, data_reg, address;
	int dev, bus, func;

	bus = device->bus->number;
	dev = PCI_SLOT(device->devfn);
	func = PCI_FUNC(device->devfn);

	address_reg = TITAN_PCI_0_CONFIG_ADDRESS;
	data_reg = TITAN_PCI_0_CONFIG_DATA;

	address = (bus << 16) | (dev << 11) | (func << 8) |
		(offset & 0xfc) | 0x80000000;

	/* start the configuration cycle */
	TITAN_WRITE(address_reg, address);

	/* write the data */
	switch (size) {
	case 1:
		TITAN_WRITE_8(data_reg + (offset & 0x3), val);
		break;

	case 2:
		TITAN_WRITE_16(data_reg + (offset & 0x2), val);
		break;

	case 4:
		TITAN_WRITE(data_reg, val);
		break;
	}

	return PCIBIOS_SUCCESSFUL;
}
Ejemplo n.º 2
0
static int __init pmc_yosemite_setup(void)
{
	unsigned long io_v_base;

	io_v_base = (unsigned long) ioremap(TITAN_IO_BASE, TITAN_IO_SIZE);
	if (!io_v_base)
		panic(ioremap_failed);

	set_io_port_base(io_v_base);
	TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1);

	ioport_resource.end = TITAN_IO_SIZE - 1;

	register_pci_controller(&py_controller);

	return 0;
}