void __fastcall rallybikWriteWord(UINT32 a, UINT16 d)
{
switch (a)
{
case 0x100000:
// rallybik_bcu_flipscreen_w
return;
case 0x100002:
ToaBCU2SetRAMPointer(d);
return;
case 0x100004:
case 0x100006:
ToaBCU2WriteRAM(d);
return;
case 0x100010:
case 0x100012:
case 0x100014:
case 0x100016:
case 0x100018:
case 0x10001a:
case 0x10001c:
case 0x10001e:
BCU2Reg[(a & 0x0f) >> 1] = d;
return;
case 0x140002:
bEnableInterrupts = d & 0xff;
return;
case 0x140008:
case 0x14000a:
case 0x14000c:
case 0x14000e:
// toaplan1_bcu_control_w
return;
case 0x1c0000:
nBCU2TileXOffset = d;
return;
case 0x1c0002:
nBCU2TileYOffset = d;
return;
case 0x1c8000:
if (d == 0) {
ZetReset();
}
return;
}
}
void __fastcall truxtonWriteWord(UINT32 sekAddress, UINT16 wordValue)
{
switch (sekAddress) {
case 0x0c0002: // FCU-2 set VRAM address-pointer
ToaFCU2SetRAMPointer(wordValue);
break;
case 0x0c0004:
ToaFCU2WriteRAM(wordValue);
break;
case 0x0c0006:
ToaFCU2WriteRAMSize(wordValue);
break;
case 0x100000: // BCU-2 flip
break;
case 0x100002: // BCU-2 set VRAM address-pointer
ToaBCU2SetRAMPointer(wordValue);
break;
case 0x100004:
ToaBCU2WriteRAM(wordValue);
break;
case 0x100006:
ToaBCU2WriteRAM(wordValue);
break;
case 0x100010:
case 0x100011:
case 0x100012:
case 0x100013:
case 0x100014:
case 0x100015:
case 0x100016:
case 0x100017:
case 0x100018:
case 0x100019:
case 0x10001A:
case 0x10001B:
case 0x10001C:
case 0x10001D:
case 0x10001E:
case 0x10001F:
BCU2Reg[(sekAddress & 15) >> 1] = wordValue;
break;
case 0x140002:
bEnableInterrupts = (wordValue & 0xFF);
break;
case 0x1c0000:
nBCU2TileXOffset = wordValue;
break;
case 0x1c0002:
nBCU2TileYOffset = wordValue;
break;
case 0x1c0006: // FCU-2 flip
break;
case 0x1d0000:
if (wordValue == 0) DrvResetCallback();
break;
default: {
// bprintf(PRINT_NORMAL, _T("Write word %06X, %04X.\n"), sekAddress, wordValue);
}
}
}
void __fastcall demonwldWriteWord(UINT32 a, UINT16 d)
{
switch (a)
{
case 0x400000:
return; // nop
case 0x400002:
bEnableInterrupts = d & 0xff;
return;
case 0x400008:
case 0x40000a:
case 0x40000c:
case 0x40000e:
// toaplan1_bcu_control_w
return;
case 0x800000:
// toaplan1_bcu_flipscreen_w
return;
case 0x800002:
ToaBCU2SetRAMPointer(d);
return;
case 0x800004:
case 0x800006:
ToaBCU2WriteRAM(d);
return;
case 0x800010:
case 0x800012:
case 0x800014:
case 0x800016:
case 0x800018:
case 0x80001a:
case 0x80001c:
case 0x80001e:
BCU2Reg[(a & 0x0f) >> 1] = d;
return;
case 0xa00000:
return; // nop
case 0xa00002:
ToaFCU2SetRAMPointer(d);
return;
case 0xa00004:
ToaFCU2WriteRAM(d);
return;
case 0xa00006:
ToaFCU2WriteRAMSize(d);
return;
case 0xe00000:
nBCU2TileXOffset = d;
return;
case 0xe00002:
nBCU2TileYOffset = d;
return;
case 0xe00006:
// toaplan1_fcu_flipscreen_w
return;
case 0xe00008:
if (d == 0) {
ZetReset();
}
return;
case 0xe0000a:
// dsp_ctrl_w
return;
}
}
void __fastcall outzoneWriteWord(unsigned int sekAddress, unsigned short wordValue)
{
switch (sekAddress) {
case 0x100002: // FCU-2 set VRAM address-pointer
ToaFCU2SetRAMPointer(wordValue);
break;
case 0x100004:
ToaFCU2WriteRAM(wordValue);
break;
case 0x100006:
ToaFCU2WriteRAMSize(wordValue);
break;
case 0x200000: // BCU-2 flip
break;
case 0x200002: // BCU-2 set VRAM address-pointer
ToaBCU2SetRAMPointer(wordValue);
break;
case 0x200004:
ToaBCU2WriteRAM(wordValue);
break;
case 0x200006:
ToaBCU2WriteRAM(wordValue);
break;
case 0x200010:
case 0x200011:
case 0x200012:
case 0x200013:
case 0x200014:
case 0x200015:
case 0x200016:
case 0x200017:
case 0x200018:
case 0x200019:
case 0x20001A:
case 0x20001B:
case 0x20001C:
case 0x20001D:
case 0x20001E:
case 0x20001F:
BCU2Reg[(sekAddress & 15) >> 1] = wordValue;
break;
case 0x300002:
bEnableInterrupts = (wordValue & 0xFF);
break;
case 0x340000:
nBCU2TileXOffset = wordValue;
break;
case 0x340002:
nBCU2TileYOffset = wordValue;
break;
case 0x340006: // FCU-2 flip
break;
default: {
// printf("Attempt to write word value %x to location %x\n", wordValue, sekAddress);
}
}
}
void __fastcall samesameWriteWord(unsigned int a, unsigned short d)
{
switch (a)
{
case 0x080000:
nBCU2TileXOffset = d;
return;
case 0x080002:
nBCU2TileYOffset = d;
return;
case 0x080006:
// toaplan1_fcu_flipscreen_w
return;
case 0x100000:
return; // nop
case 0x100002:
bEnableInterrupts = (d & 0xFF);
return;
case 0x100008:
case 0x10000a:
case 0x10000c:
case 0x10000e:
// toaplan1_bcu_control_w
return;
case 0x14000c:
// samesame_coin_w
return;
case 0x14000e:
return; // mcu writes...
case 0x180000:
// toaplan1_bcu_flipscreen_w
return;
case 0x180002:
ToaBCU2SetRAMPointer(d);
return;
case 0x180004:
case 0x180006:
ToaBCU2WriteRAM(d);
return;
case 0x180010:
case 0x180012:
case 0x180014:
case 0x180016:
case 0x180018:
case 0x18001a:
case 0x18001c:
case 0x18001e:
BCU2Reg[(a & 0x0f) >> 1] = d;
return;
case 0x1c0000:
return; // nop
case 0x1c0002:
ToaFCU2SetRAMPointer(d);
return;
case 0x1c0004:
ToaFCU2WriteRAM(d);
return;
case 0x1c0006:
ToaFCU2WriteRAMSize(d);
return;
}
}
void __fastcall samesameWriteWord(UINT32 a, UINT16 d)
{
switch (a)
{
case 0x080000:
nBCU2TileXOffset = d;
return;
case 0x080002:
nBCU2TileYOffset = d;
return;
case 0x080006:
// toaplan1_fcu_flipscreen_w
return;
case 0x100000:
return; // nop
case 0x100002:
bEnableInterrupts = (d & 0xFF);
return;
case 0x100008:
case 0x10000a:
case 0x10000c:
case 0x10000e:
// toaplan1_bcu_control_w
return;
case 0x14000c:
// samesame_coin_w
return;
case 0x14000e:
#ifdef TOAPLAN_SOUND_SAMPLES_HACK
samesameSndCmd(d);
#endif
return; // mcu writes...
case 0x180000:
// toaplan1_bcu_flipscreen_w
return;
case 0x180002:
ToaBCU2SetRAMPointer(d);
return;
case 0x180004:
case 0x180006:
ToaBCU2WriteRAM(d);
return;
case 0x180010:
case 0x180012:
case 0x180014:
case 0x180016:
case 0x180018:
case 0x18001a:
case 0x18001c:
case 0x18001e:
BCU2Reg[(a & 0x0f) >> 1] = d;
return;
case 0x1c0000:
return; // nop
case 0x1c0002:
ToaFCU2SetRAMPointer(d);
return;
case 0x1c0004:
ToaFCU2WriteRAM(d);
return;
case 0x1c0006:
ToaFCU2WriteRAMSize(d);
return;
}
}
void __fastcall vimanaWriteWord(UINT32 a, UINT16 d)
{
switch (a)
{
case 0x080000:
nBCU2TileXOffset = d;
return;
case 0x080002:
nBCU2TileYOffset = d;
return;
case 0x080006:
// toaplan1_fcu_flipscreen_w
return;
case 0x0c0000:
return; // nop
case 0x0c0002:
ToaFCU2SetRAMPointer(d);
return;
case 0x0c0004:
ToaFCU2WriteRAM(d);
return;
case 0x0c0006:
ToaFCU2WriteRAMSize(d);
return;
case 0x400000:
return; // nop
case 0x400002:
bEnableInterrupts = (d & 0xFF);
return;
case 0x400008:
case 0x40000a:
case 0x40000c:
case 0x40000e:
// toaplan1_bcu_control_w
return;
case 0x440000:
case 0x440002:
return;
case 0x440004:
vimana_credits = d & 0xff;
return;
case 0x4c0000:
// toaplan1_bcu_flipscreen_w
return;
case 0x4c0002:
ToaBCU2SetRAMPointer(d);
return;
case 0x4c0004:
case 0x4c0006:
ToaBCU2WriteRAM(d);
return;
case 0x4c0010:
case 0x4c0012:
case 0x4c0014:
case 0x4c0016:
case 0x4c0018:
case 0x4c001a:
case 0x4c001c:
case 0x4c001e:
BCU2Reg[(a & 0x0f) >> 1] = d;
return;
}
bprintf (0, _T("%5.5x %4.4x ww\n"), a, d);
}
