Ejemplo n.º 1
0
static void ICACHE_FLASH_ATTR recvTask(os_event_t *events)
{
	uint8_t i;

	while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
	{
		WRITE_PERI_REG(0X60000914, 0x73); //WTD
		uint16 length = 0;
		while ((READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) && (length<MAX_UARTBUFFER))
			uartbuffer[length++] = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
		for (i = 0; i < MAX_CONN; ++i)
			if (connData[i].conn) 
				espbuffsent(&connData[i], uartbuffer, length);		
	}

	if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
	}
	else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
	}
	ETS_UART_INTR_ENABLE();
}
Ejemplo n.º 2
0
//// modified for LASS , receive data from UART0 (sensor)
static void ICACHE_FLASH_ATTR recvTask(os_event_t *events)
{
	uint8_t i;
	uint16 length = 0;
  //char* p;
  //p=&LASSstring[0];
	while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
	{
		WRITE_PERI_REG(0X60000914, 0x73); //WTD
    //length=0;
		while ((READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) && (length<MAX_UARTBUFFER))
			uartbuffer[length++] = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
		//refer to Plantower PMS5003 
			p1_0 = (uint32)uartbuffer[4]*256+(uint32)uartbuffer[5];
			p2_5 = (uint32)uartbuffer[6]*256+(uint32)uartbuffer[7];
			p10_0 = (uint32)uartbuffer[8]*256+(uint32)uartbuffer[9];
	}

	if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
	}
	else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
	}
  
  INFO("%s\r\n",LASSstring);
	//uart_rx_intr_enable(UART0);
  ETS_UART_INTR_ENABLE();
  ///// BUG ! TX malfunctioned!
}
Ejemplo n.º 3
0
static  __attribute__ ((section(".iram0.text"))) void uart0_rx_intr_handler(void *para)
{
    /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
     * uart1 and uart0 respectively
     */
    //RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;
    char RcvChar;

    if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST)) {
        return;
    }

    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);

    while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
	    RcvChar = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
	    /* you can add your handle code below.*/
	    system_os_post(1, 0, RcvChar);

	    if (RcvChar == 114)
	    {
	    	ets_uart_printf("RcvChar \r\n");
	    }
    }

}
Ejemplo n.º 4
0
// Stream data using UART1 routed to GPIO2
// ws2812.init() should be called first
//
// NODE_DEBUG should not be activated because it also uses UART1
static void ICACHE_RAM_ATTR ws2812_write(uint8_t *pixels, uint32_t length) {

  // Data are sent LSB first, with a start bit at 0, an end bit at 1 and all inverted
  // 0b00110111 => 110111 => [0]111011[1] => 10001000 => 00
  // 0b00000111 => 000111 => [0]111000[1] => 10001110 => 01
  // 0b00110100 => 110100 => [0]001011[1] => 11101000 => 10
  // 0b00000100 => 000100 => [0]001000[1] => 11101110 => 11
  // Array declared as static const to avoid runtime generation
  // But declared in ".data" section to avoid read penalty from FLASH
  static const __attribute__((section(".data._uartData"))) uint8_t _uartData[4] = { 0b00110111, 0b00000111, 0b00110100, 0b00000100 };

  uint8_t *end = pixels + length;

  do {
    uint8_t value = *pixels++;

    // Wait enough space in the FIFO buffer
    // (Less than 124 bytes in the buffer)
    while (((READ_PERI_REG(UART_STATUS(1)) >> UART_TXFIFO_CNT_S) & UART_TXFIFO_CNT) > 124);

    // Fill the buffer
    WRITE_PERI_REG(UART_FIFO(1), _uartData[(value >> 6) & 3]);
    WRITE_PERI_REG(UART_FIFO(1), _uartData[(value >> 4) & 3]);
    WRITE_PERI_REG(UART_FIFO(1), _uartData[(value >> 2) & 3]);
    WRITE_PERI_REG(UART_FIFO(1), _uartData[(value >> 0) & 3]);

  } while(pixels < end);

}
Ejemplo n.º 5
0
void ICACHE_FLASH_ATTR
at_setupCmdIpr(uint8_t id, char *pPara)
{
  at_uartType tempUart;

  pPara++;
  tempUart.baud = atoi(pPara);
  if((tempUart.baud>(UART_CLK_FREQ / 16))||(tempUart.baud == 0))
  {
    at_backError;
    return;
  }
  while(TRUE)
  {
    uint32_t fifo_cnt = READ_PERI_REG(UART_STATUS(0)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
    if((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) == 0)
    {
      break;
    }
  }
  os_delay_us(10000);
  uart_div_modify(0, UART_CLK_FREQ / tempUart.baud);
  tempUart.saved = 1;
  user_esp_platform_save_param((uint32 *)&tempUart, sizeof(at_uartType));
//  spi_flash_read(60 * 4096, (uint32 *)&upFlag, sizeof(updateFlagType));
//  //  os_printf("%X\r\n",upFlag.flag);
//  //  os_printf("%X\r\n",upFlag.reserve[0]);
//  //  os_printf("%X\r\n",upFlag.reserve[1]);
//  //  os_printf("%X\r\n",upFlag.reserve[2]);
//    upFlag.flag = 1;
//    spi_flash_erase_sector(60);
//    spi_flash_write(60 * 4096, (uint32 *)&upFlag, sizeof(updateFlagType));
//  //  spi_flash_read(60 * 4096, (uint32 *)&upFlag, sizeof(updateFlagType));
  at_backOk;
}
Ejemplo n.º 6
0
/**
  * @brief  Uart receive task.
  * @param  events: contain the uart receive data
  * @retval None
  */
static void ICACHE_FLASH_ATTR ///////
at_recvTask(os_event_t *events)
{
  
  uint8_t temp;

  while(READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
  {
    
    temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;     
      
    if (ser_count>64) ser_count = 0;
    ser[ser_count] = temp;
    ser_count++;
    ser[64] = ser_count;   
    feedwdt();
  }
  
  if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
  {
    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
  }
  else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST))
  {
    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
  }
  ETS_UART_INTR_ENABLE();
}
Ejemplo n.º 7
0
/*
 * UART rx Interrupt routine
 */
static void uart_isr(void *arg)
{
	uint8_t temp;
	signed portBASE_TYPE ret;
	portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
	if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
	{
		return;
	}
	WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);

    while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
		temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
		ret = xQueueSendToBackFromISR
                    (
                        uart_rx_queue,
						&temp,
                        &xHigherPriorityTaskWoken
                    );
		if (ret != pdTRUE)
		{
			uart_rx_overruns++;
		} 
		else
		{
			uart_rx_bytes++;
		}
	}
	portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}
//Read from UART0(requires special uart.c!)
static void ICACHE_FLASH_ATTR recvTask(os_event_t *events)
{
	uint8_t c, i;
  char ch[1000];
  c = 0;
  i = 0;
  
  //uart0_tx_buffer("uart",4);
  
	while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
	{
		WRITE_PERI_REG(0X60000914, 0x73); //WTD
		c = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF; 
		
		ch[i] = c;
		i++;
  }

	if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
	}
	else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
	}
	ETS_UART_INTR_ENABLE();
	
	// send to Server if available
	if (pconn && i != 0) 
	{
	  espconn_sent(pconn, ch, i);
	}		
}
Ejemplo n.º 9
0
//Receive a char from the uart. Uses polling and feeds the watchdog.
static int ATTR_GDBFN gdbRecvChar() {
	int i;
	while (((READ_PERI_REG(UART_STATUS(0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT)==0) {
		keepWDTalive();
	}
	i=READ_PERI_REG(UART_FIFO(0));
	return i;
}
Ejemplo n.º 10
0
static void ICACHE_FLASH_ATTR
stdout_uart_txd(char c)
{
	//Wait until there is room in the FIFO
	while (((READ_PERI_REG(UART_STATUS(0)) >> UART_TXFIFO_CNT_S) & UART_TXFIFO_CNT) >= 126)
		;
	//Send the character
	WRITE_PERI_REG(UART_FIFO(0), c);
}
Ejemplo n.º 11
0
/******************************************************************************
 * FunctionName : uart1_tx_one_char
 * Description  : Internal used function
 *                Use uart1 interface to transfer one char
 * Parameters   : uint8 TxChar - character to tx
 * Returns      : OK
*******************************************************************************/
STATUS
uart_tx_one_char(uint8 uart, uint8 c)
{
  //Wait until there is room in the FIFO
  while (((READ_PERI_REG(UART_STATUS(uart))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT)>=100) ;
  //Send the character
  WRITE_PERI_REG(UART_FIFO(uart), c);
  return OK;
}
Ejemplo n.º 12
0
/******************************************************************************
 * FunctionName : uart_recvTask
 * Description  : system task triggered on receive interrupt, empties FIFO and calls callbacks
*******************************************************************************/
static void ICACHE_FLASH_ATTR
uart_recvTask(os_event_t *events)
{
  while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
    //WRITE_PERI_REG(0X60000914, 0x73); //WTD // commented out by TvE

    // read a buffer-full from the uart
    uint16 length = 0;
    uint16 l = 0;
    char buf[128];
		char in_char;
		bool did_start = false;
    while ((READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) &&
           (length < 128)) {
			in_char = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
			length++;
			//look for beginning | char from BLE peripheral
			if(in_char == '|') 
			{
				did_start = true;
			}
			if(did_start)
			{
	      buf[l] = in_char;
				if(buf[l] == '\n' || buf[l] == '\r')
				{
					buf[l] = '\0';
					break;
				}
				l++;
			}
    }
    //DBG_UART("%d ix %d\n", system_get_time(), length);

    for (int i=0; i<MAX_CB; i++) {
      //if (uart_recv_cb[i] != NULL) (uart_recv_cb[i])(buf, length);
      if (uart_recv_cb[i] != NULL && l > 3) (uart_recv_cb[i])(buf, l);
    }
  }
  WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR|UART_RXFIFO_TOUT_INT_CLR);
  ETS_UART_INTR_ENABLE();
}
Ejemplo n.º 13
0
void HardwareSerial::uart0_rx_intr_handler(void *para)
{
    /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
     * uart1 and uart0 respectively
     */
    RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;
    uint8 RcvChar;

    if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART_ID_0)) & UART_RXFIFO_FULL_INT_ST))
        return;

    WRITE_PERI_REG(UART_INT_CLR(UART_ID_0), UART_RXFIFO_FULL_INT_CLR);

    while (READ_PERI_REG(UART_STATUS(UART_ID_0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
    {
        RcvChar = READ_PERI_REG(UART_FIFO(UART_ID_0)) & 0xFF;

        /* you can add your handle code below.*/
      if (memberData[UART_ID_0].useRxBuff)
      {
        *(pRxBuff->pWritePos) = RcvChar;

        // insert here for get one command line from uart
        if (RcvChar == '\n' )
            pRxBuff->BuffState = WRITE_OVER;

        pRxBuff->pWritePos++;

        if (pRxBuff->pWritePos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE))
        {
            // overflow ...we may need more error handle here.
        	pRxBuff->pWritePos = pRxBuff->pRcvMsgBuff;
        }

        if (pRxBuff->pWritePos == pRxBuff->pReadPos)
        {   // Prevent readbuffer overflow
			if (pRxBuff->pReadPos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE))
			{
				pRxBuff->pReadPos = pRxBuff->pRcvMsgBuff ;
			} else {
				pRxBuff->pReadPos++;
			}
		}
      }
      if (memberData[UART_ID_0].HWSDelegate)
        {
        	unsigned short cc;
        	cc = (pRxBuff->pWritePos < pRxBuff->pReadPos) ? ((pRxBuff->pWritePos + RX_BUFF_SIZE) - pRxBuff->pReadPos)
        													: (pRxBuff->pWritePos - pRxBuff->pReadPos);
        	memberData[UART_ID_0].HWSDelegate(Serial, RcvChar, cc);
        }
    }

}
Ejemplo n.º 14
0
void uart_isr(void *arg) {
  uint32_t int_st = READ_PERI_REG(UART_INT_ST(0));
  while (1) {
    uint32_t fifo_len = READ_PERI_REG(UART_STATUS(0)) & 0xff;
    if (fifo_len == 0) {
      break;
    }
    while (fifo_len-- > 0) {
      uint8_t byte = READ_PERI_REG(UART_FIFO(0)) & 0xff;
      uart_isr_receive(byte);
    }
  }
  WRITE_PERI_REG(UART_INT_CLR(0), int_st);
}
Ejemplo n.º 15
0
// Turn UART interrupts off and poll for nchars or until timeout hits
uint16_t ICACHE_FLASH_ATTR
uart0_rx_poll(char *buff, uint16_t nchars, uint32_t timeout_us) {
  ETS_UART_INTR_DISABLE();
  uint16_t got = 0;
  uint32_t start = system_get_time(); // time in us
  while (system_get_time()-start < timeout_us) {
    while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
      buff[got++] = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
      if (got == nchars) goto done;
    }
  }
done:
  ETS_UART_INTR_ENABLE();
  return got;
}
Ejemplo n.º 16
0
/******************************************************************************
 * FunctionName : uart_recvTask
 * Description  : system task triggered on receive interrupt, empties FIFO and calls callbacks
*******************************************************************************/
static void ICACHE_FLASH_ATTR
uart_recvTask(os_event_t *events)
{
  while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
    //WRITE_PERI_REG(0X60000914, 0x73); //WTD // commented out by TvE

    // read a buffer-full from the uart
    uint16 length = 0;
    char buf[128];
    while ((READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) &&
           (length < 128)) {
      buf[length++] = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
    }
#ifdef UART_DBG
    os_printf("%d ix %d\n", system_get_time(), length);
#endif

    for (int i=0; i<MAX_CB; i++) {
      if (uart_recv_cb[i] != NULL) (uart_recv_cb[i])(buf, length);
    }
  }
  WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR|UART_RXFIFO_TOUT_INT_CLR);
  ETS_UART_INTR_ENABLE();
}
Ejemplo n.º 17
0
void uart_isr(void *arg) {
  uint32_t int_st = READ_PERI_REG(UART_INT_ST(0));
  struct uart_buf *ub = (struct uart_buf *) arg;
  while (1) {
    uint32_t fifo_len = READ_PERI_REG(UART_STATUS(0)) & 0xff;
    if (fifo_len == 0) break;
    while (fifo_len-- > 0) {
      uint8_t byte = READ_PERI_REG(UART_FIFO(0)) & 0xff;
      *ub->pw++ = byte;
      ub->nr++;
      if (ub->pw >= ub->data + UART_BUF_SIZE) ub->pw = ub->data;
    }
  }
  WRITE_PERI_REG(UART_INT_CLR(0), int_st);
}
Ejemplo n.º 18
0
void HardwareSerial::uartReceiveInterruptHandler(void *para)
{
    /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
     * uart1 and uart0 respectively
     */
    HardwareSerial* Self = hardwareSerialObjects[UART_ID_0];
    uint8 RcvChar;

    if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART_ID_0)) & UART_RXFIFO_FULL_INT_ST))
        return;

    WRITE_PERI_REG(UART_INT_CLR(UART_ID_0), UART_RXFIFO_FULL_INT_CLR);

    while (READ_PERI_REG(UART_STATUS(UART_ID_0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
    {
        RcvChar = READ_PERI_REG(UART_FIFO(UART_ID_0)) & 0xFF;

        /* you can add your handle code below.*/
        if (Self->useRxBuff)
        {
            Self->rxBuffer.Push(RcvChar);
        }

        if ((Self->HWSDelegate) || (Self->commandExecutor))
        {
            SerialDelegateMessage serialDelegateMessage;
            serialDelegateMessage.uart = Self->uart;
            serialDelegateMessage.rcvChar = RcvChar;
            serialDelegateMessage.charCount = Self->rxBuffer.Len();

            if (Self->HWSDelegate)
            {
//        	  system_os_post(USER_TASK_PRIO_0, SERIAL_SIGNAL_DELEGATE, serialQueueParameter);
                serialDelegateMessage.type = SERIAL_SIGNAL_DELEGATE;
                xQueueSendToBackFromISR ( serialDelegateQueue, &serialDelegateMessage, NULL);
            }
            if (Self->commandExecutor)
            {
//        	  system_os_post(USER_TASK_PRIO_0, SERIAL_SIGNAL_COMMAND, serialQueueParameter);
                serialDelegateMessage.type = SERIAL_SIGNAL_COMMAND;
                xQueueSendToBackFromISR ( serialDelegateQueue, &serialDelegateMessage, NULL);
            }
        }
    }
}
Ejemplo n.º 19
0
static void ICACHE_FLASH_ATTR user_rx_task(os_event_t *events) {
    if(events->sig == 0){
        uint8 fifo_len = (READ_PERI_REG(UART_STATUS(UART0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT;
        uint8 d_tmp = 0;
        uint8 idx=0;
        for(idx=0;idx<fifo_len;idx++) {
            d_tmp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
            uart_tx_one_char(UART0, d_tmp);
            if( has_space() ) {
            	serial_buffer[putpos++ & POS_MASK] = d_tmp;
            }
        }
        WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR|UART_RXFIFO_TOUT_INT_CLR);
        uart_rx_intr_enable(UART0);
        if( serial_datalen() && user_rx_callback ) {
        	user_rx_callback(serial_datalen());
        }
    }
Ejemplo n.º 20
0
//Send a char to the uart.
static void ATTR_GDBFN gdbSendChar(char c) {
	while (((READ_PERI_REG(UART_STATUS(0))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT)>=126) ;
	WRITE_PERI_REG(UART_FIFO(0), c);
}
Ejemplo n.º 21
0
IRAM int esp_uart_tx_fifo_len(int uart_no) {
  return (READ_PERI_REG(UART_STATUS(uart_no)) >> 16) & 0xff;
}
Ejemplo n.º 22
0
IRAM int esp_uart_rx_fifo_len(int uart_no) {
  return READ_PERI_REG(UART_STATUS(uart_no)) & 0xff;
}
Ejemplo n.º 23
0
/* Active for CTS is 0, i.e. 0 = ok to send. */
IRAM int esp_uart_cts(int uart_no) {
  return (READ_PERI_REG(UART_STATUS(uart_no)) & UART_CTSN) ? 1 : 0;
}
Ejemplo n.º 24
0
/**
  * @brief  Uart receive task.
  * @param  events: contain the uart receive data
  * @retval None
  */
static void ICACHE_FLASH_ATTR ///////
at_recvTask(os_event_t *events)
{
  static uint8_t atHead[2];
  static uint8_t *pCmdLine;
  uint8_t temp;

//  temp = events->par;
//  temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
//  temp = 'X';
  //add transparent determine
  while(READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
  {
//    temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
    WRITE_PERI_REG(0X60000914, 0x73); //WTD

    temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
     
    /*
    if(at_state != at_statIpTraning)
    {
      temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
      if((temp != '\n') && (echoFlag))
      {
        uart_tx_one_char(temp); //display back
      }
    }
     * */
    if((at_state != at_statIpTraning) && (temp != '\n') && (echoFlag))
    {

      uart_tx_one_char(UART0,temp); //display back
     // uart_tx_one_char(temp); //display back

    }
            
    
    switch(at_state)
    {
    case at_statIdle: //serch "AT" head
      atHead[0] = atHead[1];
      atHead[1] = temp;
      if((os_memcmp(atHead, "AT", 2) == 0) || (os_memcmp(atHead, "at", 2) == 0))
      {
        at_state = at_statRecving;
        pCmdLine = at_cmdLine;
        atHead[1] = 0x00;
      }
      else if(temp == '\n') //only get enter
      {
        uart0_sendStr("\r\nError\r\n");
      }
      break;

    case at_statRecving: //push receive data to cmd line
      *pCmdLine = temp;
      if(temp == '\n')
      {
        system_os_post(at_procTaskPrio, 0, 0);
        at_state = at_statProcess;
        if(echoFlag)
        {
          uart0_sendStr("\r\n"); ///////////
        }
      }
      else if(pCmdLine >= &at_cmdLine[at_cmdLenMax - 1])
      {
        at_state = at_statIdle;
      }
      pCmdLine++;
      break;

    case at_statProcess: //process data
      if(temp == '\n')
      {
//      system_os_post(at_busyTaskPrio, 0, 1);
        uart0_sendStr("\r\nbusy p...\r\n");
      }
      break;

    case at_statIpSending:
      *pDataLine = temp;
      if((pDataLine >= &at_dataLine[at_sendLen - 1]) || (pDataLine >= &at_dataLine[at_dataLenMax - 1]))
      {
        system_os_post(at_procTaskPrio, 0, 0);
        at_state = at_statIpSended;
      }
      pDataLine++;
//    *pDataLine = temp;
//    if (pDataLine == &UartDev.rcv_buff.pRcvMsgBuff[at_sendLen-1])
//    {
//      system_os_post(at_procTaskPrio, 0, 0);
//      at_state = at_statIpSended;
//    }
//    pDataLine++;
      break;

    case at_statIpSended: //send data
      if(temp == '\n')
      {
//      system_os_post(at_busyTaskPrio, 0, 2);
        uart0_sendStr("busy s...\r\n");
      }
      break;

    case at_statIpTraning:
      os_timer_disarm(&at_delayChack);
//      *pDataLine = temp;
      if(pDataLine > &at_dataLine[at_dataLenMax - 1])
      {
        os_printf("exceed\r\n");
        return;
      }
      else if(pDataLine == &at_dataLine[at_dataLenMax - 1])
      {
        temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
        *pDataLine = temp;
        pDataLine++;
        at_tranLen++;
        os_timer_arm(&at_delayChack, 1, 0);
        return;
      }
      else
      {
        temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
        *pDataLine = temp;
        pDataLine++;
        at_tranLen++;
//        if(ipDataSendFlag == 0)
//        {
//          os_timer_arm(&at_delayChack, 20, 0);
//        }
        os_timer_arm(&at_delayChack, 20, 0);
      }
      break;

//      os_timer_disarm(&at_delayChack);
//      *pDataLine = temp;
//      if(pDataLine >= &at_dataLine[at_dataLenMax - 1])
//      {
////        ETS_UART_INTR_DISABLE();
////      pDataLine++;
//        at_tranLen++;
////      os_timer_arm(&at_delayChack, 1, 0); /////
//        system_os_post(at_procTaskPrio, 0, 0);
//        break;
//      }
//      pDataLine++;
//      at_tranLen++;
//      if(ipDataSendFlag == 0)
//      {
//        os_timer_arm(&at_delayChack, 20, 0);
//      }
//      break;

    default:
      if(temp == '\n')
      {
      }
      break;
    } 
  }
  if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
  {
    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
  }
  else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST))
  {
    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
  }
  ETS_UART_INTR_ENABLE();
}
Ejemplo n.º 25
0
int my_rx_one_char(void)  // char or -1 
{
    int c = READ_PERI_REG(UART_STATUS(0)) & 0xff;
    if (c) return READ_PERI_REG(UART_FIFO(0));
    return -1;
}
Ejemplo n.º 26
0
/* Active for CTS is 0, i.e. 0 = ok to send. */
IRAM static int cts(int uart_no) {
  return (READ_PERI_REG(UART_STATUS(uart_no)) & UART_CTSN) ? 1 : 0;
}
Ejemplo n.º 27
0
void
UART_WaitTxFifoEmpty(UART_Port uart_no) //do not use if tx flow control enabled
{
    while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S));
}