/*****************************************************************************
Function Name : tcc_composite_update()
******************************************************************************/
void tcc_composite_update(struct tcc_lcdc_image_update *ImageInfo)
{
VIOC_DISP * pDISPBase;
VIOC_WMIX * pWMIXBase;
VIOC_RDMA * pRDMABase;
unsigned int lcd_width = 0, lcd_height = 0, lcd_h_pos = 0, lcd_w_pos = 0, scale_x = 0, scale_y = 0;
VIOC_SC *pSC;
pSC = (VIOC_SC *)tcc_p2v(HwVIOC_SC1);
dprintk("%s enable:%d, layer:%d, fmt:%d, Fw:%d, Fh:%d, Iw:%d, Ih:%d, fmt:%d onthefly:%d\n", __func__, ImageInfo->enable, ImageInfo->Lcdc_layer,
ImageInfo->fmt,ImageInfo->Frame_width, ImageInfo->Frame_height, ImageInfo->Image_width, ImageInfo->Image_height, ImageInfo->fmt, ImageInfo->on_the_fly);
if((ImageInfo->Lcdc_layer >= 3) || (ImageInfo->fmt >TCC_LCDC_IMG_FMT_MAX))
return;
if(Composite_LCDC_Num)
{
pDISPBase = (VIOC_DISP*)tcc_p2v(HwVIOC_DISP1);
pWMIXBase = (VIOC_WMIX*)tcc_p2v(HwVIOC_WMIX1);
switch(ImageInfo->Lcdc_layer)
{
case 0:
pRDMABase = (VIOC_RDMA*)tcc_p2v(HwVIOC_RDMA04);
break;
case 1:
pRDMABase = (VIOC_RDMA*)tcc_p2v(HwVIOC_RDMA05);
break;
case 2:
pRDMABase = (VIOC_RDMA*)tcc_p2v(HwVIOC_RDMA06);
break;
}
}
else
{
pDISPBase = (VIOC_DISP*)tcc_p2v(HwVIOC_DISP0);
pWMIXBase = (VIOC_WMIX*)tcc_p2v(HwVIOC_WMIX0);
switch(ImageInfo->Lcdc_layer)
{
case 0:
pRDMABase = (VIOC_RDMA*)tcc_p2v(HwVIOC_RDMA00);
break;
case 1:
pRDMABase = (VIOC_RDMA*)tcc_p2v(HwVIOC_RDMA01);
break;
case 2:
pRDMABase = (VIOC_RDMA*)tcc_p2v(HwVIOC_RDMA02);
break;
}
}
VIOC_DISP_GetSize(pDISPBase, &lcd_width, &lcd_height);
if((!lcd_width) || (!lcd_height))
return;
if(!ImageInfo->enable) {
VIOC_RDMA_SetImageDisable(pRDMABase);
if(ISSET(onthefly_using, 1<<ImageInfo->Lcdc_layer))
{
VIOC_CONFIG_PlugOut(VIOC_SC1);
BITCLR(onthefly_using, 1 << ImageInfo->Lcdc_layer);
}
return;
}
if(ImageInfo->on_the_fly)
{
unsigned int RDMA_NUM;
RDMA_NUM = Composite_LCDC_Num ? (ImageInfo->Lcdc_layer + VIOC_SC_RDMA_04) : ImageInfo->Lcdc_layer;
#if defined(CONFIG_MACH_TCC8920ST)
if(!onthefly_using) {
dprintk(" %s scaler 1 is plug in RDMA %d \n",__func__, RDMA_NUM);
BITSET(onthefly_using, 1 << ImageInfo->Lcdc_layer);
VIOC_CONFIG_PlugIn (VIOC_SC1, RDMA_NUM);
}
if(ImageInfo->Frame_width==ImageInfo->Image_width || ImageInfo->Frame_height==ImageInfo->Image_height) {
VIOC_SC_SetBypass (pSC, ON);
dprintk(" %s scaler 1 is plug in SetBypass ON \n",__func__);
}else {
VIOC_SC_SetBypass (pSC, OFF);
dprintk(" %s scaler 1 is plug in SetBypass OFF \n",__func__);
}
#else
if(!onthefly_using) {
dprintk(" %s scaler 1 is plug in RDMA %d \n",__func__, RDMA_NUM);
BITSET(onthefly_using, 1 << ImageInfo->Lcdc_layer);
VIOC_CONFIG_PlugIn (VIOC_SC1, RDMA_NUM);
VIOC_SC_SetBypass (pSC, OFF);
}
#endif
VIOC_SC_SetSrcSize(pSC, ImageInfo->Frame_width, ImageInfo->Frame_height);
VIOC_SC_SetDstSize (pSC, ImageInfo->Image_width, ImageInfo->Image_height); // set destination size in scaler
VIOC_SC_SetOutSize (pSC, ImageInfo->Image_width, ImageInfo->Image_height); // set output size in scaer
}
else
{
if(ISSET(onthefly_using, 1<<ImageInfo->Lcdc_layer))
{
dprintk(" %s scaler 1 is plug \n",__func__);
VIOC_RDMA_SetImageDisable(pRDMABase);
VIOC_CONFIG_PlugOut(VIOC_SC1);
BITCLR(onthefly_using, 1 << ImageInfo->Lcdc_layer);
}
}
dprintk("%s lcdc:%d, pRDMA:0x%08x, pWMIX:0x%08x, pDISP:0x%08x, addr0:0x%08x\n", __func__, Composite_LCDC_Num, pRDMABase, pWMIXBase, pDISPBase, ImageInfo->addr0);
if(machine_is_tcc8920st()) {
VIOC_RDMA_SetImageUVIEnable(pRDMABase, TRUE);
}
if(ImageInfo->fmt >= TCC_LCDC_IMG_FMT_UYVY && ImageInfo->fmt <= TCC_LCDC_IMG_FMT_YUV422ITL1)
{
VIOC_RDMA_SetImageY2REnable(pRDMABase, TRUE);
VIOC_RDMA_SetImageY2RMode(pRDMABase, 0); /* Y2RMode Default 0 (Studio Color) */
}
VIOC_RDMA_SetImageOffset(pRDMABase, ImageInfo->fmt, ImageInfo->Frame_width);
VIOC_RDMA_SetImageFormat(pRDMABase, ImageInfo->fmt);
scale_x = 0;
scale_y = 0;
lcd_h_pos = 0;
lcd_w_pos = 0;
if(lcd_width > ImageInfo->Image_width)
lcd_w_pos = (lcd_width - ImageInfo->Image_width)/2;
if(lcd_height > ImageInfo->Image_height)
lcd_h_pos = (lcd_height - ImageInfo->Image_height)/2;
dprintk("%s lcd_width:%d, lcd_height:%d, lcd_w_pos:%d, lcd_h_pos:%d\n\n", __func__, lcd_width, lcd_height, lcd_w_pos, lcd_h_pos);
// position
//pLCDC_channel->LIP = ((lcd_h_pos << 16) | (lcd_w_pos));
VIOC_WMIX_SetPosition(pWMIXBase, ImageInfo->Lcdc_layer, lcd_w_pos, lcd_h_pos);
// scale
//pLCDC_channel->LISR =((scale_y<<4) | scale_x);
VIOC_RDMA_SetImageScale(pRDMABase, scale_x, scale_y);
if( !( ((ImageInfo->crop_left == 0) && (ImageInfo->crop_right == ImageInfo->Frame_width)) && ((ImageInfo->crop_top == 0) && (ImageInfo->crop_bottom == ImageInfo->Frame_height))) )
{
dprintk(" Image Crop left=[%d], right=[%d], top=[%d], bottom=[%d] \n", ImageInfo->crop_left, ImageInfo->crop_right, ImageInfo->crop_top, ImageInfo->crop_bottom);
int addr_Y = (unsigned int)ImageInfo->addr0;
int addr_U = (unsigned int)ImageInfo->addr1;
int addr_V = (unsigned int)ImageInfo->addr2;
tccxxx_GetAddress(ImageInfo->fmt, (unsigned int)ImageInfo->addr0, ImageInfo->Frame_width, ImageInfo->Frame_height,
ImageInfo->crop_left, ImageInfo->crop_top, &addr_Y, &addr_U, &addr_V);
VIOC_RDMA_SetImageSize(pRDMABase, ImageInfo->crop_right - ImageInfo->crop_left, ImageInfo->crop_bottom - ImageInfo->crop_top);
VIOC_RDMA_SetImageBase(pRDMABase, addr_Y, addr_U, addr_V);
}
else
{
dprintk(" don't Image Crop left=[%d], right=[%d], top=[%d], bottom=[%d] \n", ImageInfo->crop_left, ImageInfo->crop_right, ImageInfo->crop_top, ImageInfo->crop_bottom);
VIOC_RDMA_SetImageSize(pRDMABase, ImageInfo->Frame_width, ImageInfo->Frame_height);
VIOC_RDMA_SetImageBase(pRDMABase, ImageInfo->addr0, ImageInfo->addr1, ImageInfo->addr2);
}
// position
//if(ISZERO(pLCDC->LCTRL, HwLCTRL_NI)) //--
#if 0//defined(CONFIG_TCC_VIDEO_DISPLAY_BY_VSYNC_INT) || defined(TCC_VIDEO_DISPLAY_BY_VSYNC_INT)
if(ImageInfo->deinterlace_mode == 1 && ImageInfo->output_toMemory == 0)
{
VIOC_RDMA_SetImageY2REnable(pRDMABase, FALSE);
VIOC_RDMA_SetImageY2RMode(pRDMABase, 0x02); /* Y2RMode Default 0 (Studio Color) */
VIOC_RDMA_SetImageIntl(pRDMABase, 1);
VIOC_RDMA_SetImageBfield(pRDMABase, ImageInfo->odd_first_flag);
VIOC_WMIX_SetPosition(pWMIXBase, ImageInfo->Lcdc_layer, ImageInfo->offset_x, (ImageInfo->offset_y/2) );
}
else
#endif
{
VIOC_RDMA_SetImageIntl(pRDMABase, 0);
VIOC_WMIX_SetPosition(pWMIXBase, ImageInfo->Lcdc_layer, ImageInfo->offset_x, ImageInfo->offset_y);
}
VIOC_RDMA_SetImageEnable(pRDMABase);
if(onthefly_using)
VIOC_SC_SetUpdate (pSC);
VIOC_WMIX_SetUpdate(pWMIXBase);
}
/*****************************************************************************
Function Name : tcc_composite_set_lcd2tv()
******************************************************************************/
void tcc_composite_set_lcd2tv(COMPOSITE_MODE_TYPE type)
{
COMPOSITE_SPEC_TYPE spec;
stLTIMING CompositeTiming;
stLCDCTR LcdCtrlParam;
PVIOC_DISP pDISPBase;
PVIOC_WMIX pWIXBase;
PVIOC_RDMA pRDMA;
PDDICONFIG pDDICfg = (PDDICONFIG)tcc_p2v(HwDDI_CONFIG_BASE);
unsigned int width, height;
unsigned int lcd_ctrl = 0;
unsigned int lcd_peri = 0;
#define LCDC_CLK_DIV 1
tcc_composite_get_spec(type, &spec);
#if (defined(CONFIG_CPU_FREQ_TCC92X) || defined (CONFIG_CPU_FREQ_TCC93XX)) && defined(CONFIG_CPU_FREQ)
tcc_cpufreq_set_limit_table(>TvClockLimitTable, TCC_FREQ_LIMIT_TV, 1);
#endif
if(Composite_LCDC_Num)
lcd_peri = PERI_LCD1;
else
lcd_peri = PERI_LCD0;
VIOC_DISP_SWReset(Composite_LCDC_Num);
BITSET(pDDICfg->PWDN.nREG, Hw1); // PWDN - TVE
BITCLR(pDDICfg->SWRESET.nREG, Hw1); // SWRESET - TVE
BITSET(pDDICfg->SWRESET.nREG, Hw1); // SWRESET - TVE
BITSET(pDDICfg->NTSCPAL_EN.nREG, Hw0); // NTSCPAL_EN
if(Composite_LCDC_Num)
{
pDISPBase = (VIOC_DISP *)tcc_p2v(HwVIOC_DISP1);
pWIXBase =(VIOC_WMIX *)tcc_p2v(HwVIOC_WMIX1);
}
else
{
pDISPBase = (VIOC_DISP *)tcc_p2v(HwVIOC_DISP0);
pWIXBase =(VIOC_WMIX *)tcc_p2v(HwVIOC_WMIX0);
}
tca_ckc_setperi(lcd_peri, ENABLE, 270000);
width = spec.composite_lcd_width;
height = spec.composite_lcd_height;
CompositeTiming.lpw = spec.composite_LPW;
CompositeTiming.lpc = spec.composite_LPC + 1;
CompositeTiming.lswc = spec.composite_LSWC + 1;
CompositeTiming.lewc = spec.composite_LEWC + 1;
CompositeTiming.vdb = spec.composite_VDB;
CompositeTiming.vdf = spec.composite_VDF;
CompositeTiming.fpw = spec.composite_FPW1;
CompositeTiming.flc = spec.composite_FLC1;
CompositeTiming.fswc = spec.composite_FSWC1;
CompositeTiming.fewc = spec.composite_FEWC1;
CompositeTiming.fpw2 = spec.composite_FPW2;
CompositeTiming.flc2 = spec.composite_FLC2;
CompositeTiming.fswc2 = spec.composite_FSWC2;
CompositeTiming.fewc2 = spec.composite_FEWC2;
VIOC_DISP_SetTimingParam(pDISPBase, &CompositeTiming);
memset(&LcdCtrlParam, NULL, sizeof(LcdCtrlParam));
LcdCtrlParam.r2ymd = 0;
LcdCtrlParam.ckg = 1;
LcdCtrlParam.id= 0;
LcdCtrlParam.iv = 0;
LcdCtrlParam.ih = 1;
LcdCtrlParam.ip = 1;
LcdCtrlParam.clen = 1;
LcdCtrlParam.r2y = 1;
LcdCtrlParam.pxdw = 6;
LcdCtrlParam.dp = 0;
LcdCtrlParam.ni = 0;
LcdCtrlParam.tv = 1;
LcdCtrlParam.opt = 0;
LcdCtrlParam.stn = 0;
LcdCtrlParam.evsel = 0;
LcdCtrlParam.ovp = 0;
if(Composite_LCDC_Num)
LcdCtrlParam.advi = 1;
else
LcdCtrlParam.advi = 0;
VIOC_DISP_SetControlConfigure(pDISPBase, &LcdCtrlParam);
VIOC_DISP_SetSize(pDISPBase, width, height);
VIOC_DISP_SetBGColor(pDISPBase, 0, 0 , 0);
//VIOC_DISP_TurnOn(pDISPBase);
VIOC_WMIX_SetOverlayPriority(pWIXBase, 0);
VIOC_WMIX_SetBGColor(pWIXBase, 0x00, 0x00, 0x00, 0xff);
VIOC_WMIX_SetSize(pWIXBase, width, height);
VIOC_WMIX_SetPosition(pWIXBase, 0, 0, 0);
VIOC_WMIX_SetChromaKey(pWIXBase, 0, 0, 0, 0, 0, 0xF8, 0xFC, 0xF8);
VIOC_WMIX_SetUpdate(pWIXBase);
if(Composite_LCDC_Num)
{
VIOC_OUTCFG_SetOutConfig(VIOC_OUTCFG_SDVENC, VIOC_OUTCFG_DISP1);
}
else
{
VIOC_OUTCFG_SetOutConfig(VIOC_OUTCFG_SDVENC, VIOC_OUTCFG_DISP0);
}
}
static void lcdc_io_init_composite(unsigned char lcdc_num, unsigned char type)
{
unsigned int lcd_reg = 0;
unsigned int width, height;
stCOMPOSITE_SPEC spec;
stLTIMING CompositeTiming;
stLCDCTR LcdCtrlParam;
PVIOC_DISP pDISPBase;
PVIOC_WMIX pWIXBase;
PVIOC_RDMA pRDMA;
PDDICONFIG pDDICfg = (PDDICONFIG)HwDDI_CONFIG_BASE;
PNTSCPAL pTVE = (PNTSCPAL)HwNTSCPAL_BASE;
PNTSCPAL_ENCODER_CTRL pTVE_VEN = (PNTSCPAL_ENCODER_CTRL)HwNTSCPAL_ENC_CTRL_BASE;
struct fbcon_config *fb_con;
printf("%s, lcdc_num=%d, type=%d\n", __func__, lcdc_num, type);
if(type >= LCDC_COMPOSITE_MAX)
type = defalut_composite_resolution;
composite_get_spec(type, &spec);
fb_con = &fb_cfg;
BITSET(pDDICfg->PWDN.nREG, Hw1); // PWDN - TVE
BITCLR(pDDICfg->SWRESET.nREG, Hw1); // SWRESET - TVE
BITSET(pDDICfg->SWRESET.nREG, Hw1); // SWRESET - TVE
BITSET(pDDICfg->NTSCPAL_EN.nREG, Hw0); // NTSCPAL_EN
if(lcdc_num)
{
pDISPBase = (VIOC_DISP *)HwVIOC_DISP1;
pWIXBase =(VIOC_WMIX *)HwVIOC_WMIX1;
tca_ckc_setperi(PERI_LCD1, ENABLE, spec.composite_clock*spec.composite_divider);
VIOC_OUTCFG_SetOutConfig(VIOC_OUTCFG_SDVENC, VIOC_OUTCFG_DISP1);
}
else
{
pDISPBase = (VIOC_DISP *)HwVIOC_DISP0;
pWIXBase =(VIOC_WMIX *)HwVIOC_WMIX0;
tca_ckc_setperi(PERI_LCD0, ENABLE, spec.composite_clock*spec.composite_divider);
VIOC_OUTCFG_SetOutConfig(VIOC_OUTCFG_SDVENC, VIOC_OUTCFG_DISP0);
}
printf("lcdc_num = %d, LCDC0 clk:%d, LCDC1 clk:%d, divide:%d\n", lcdc_num, tca_ckc_getperi(PERI_LCD0), tca_ckc_getperi(PERI_LCD1), spec.composite_divider);
//LCDC_IO_Set(lcdc_num, spec.composite_bus_width);
// hdmi power wake up
tca_ckc_setippwdn(PMU_ISOL_VDAC, 0);
//tca_ckc_setperi(PERI_HDMI, ENABLE, 10000);
width = spec.composite_width;
height = spec.composite_height;
lcdc_set_logo(lcdc_num, width, height, fb_con);
CompositeTiming.lpw = spec.composite_LPW;
CompositeTiming.lpc = spec.composite_LPC + 1;
CompositeTiming.lswc = spec.composite_LSWC + 1;
CompositeTiming.lewc = spec.composite_LEWC + 1;
CompositeTiming.vdb = spec.composite_VDB;
CompositeTiming.vdf = spec.composite_VDF;
CompositeTiming.fpw = spec.composite_FPW1;
CompositeTiming.flc = spec.composite_FLC1;
CompositeTiming.fswc = spec.composite_FSWC1;
CompositeTiming.fewc = spec.composite_FEWC1;
CompositeTiming.fpw2 = spec.composite_FPW2;
CompositeTiming.flc2 = spec.composite_FLC2;
CompositeTiming.fswc2 = spec.composite_FSWC2;
CompositeTiming.fewc2 = spec.composite_FEWC2;
VIOC_DISP_SetTimingParam(pDISPBase, &CompositeTiming);
memset(&LcdCtrlParam, NULL, sizeof(LcdCtrlParam));
LcdCtrlParam.r2ymd = 3;
LcdCtrlParam.ckg = 1;
//LcdCtrlParam.id= 0;
LcdCtrlParam.iv = 1;
LcdCtrlParam.ih = 1;
LcdCtrlParam.ip = 1;
LcdCtrlParam.clen = 1;
LcdCtrlParam.r2y = 1;
LcdCtrlParam.pxdw = 6;
//LcdCtrlParam.dp = 0;
//LcdCtrlParam.ni = 0;
LcdCtrlParam.tv = 1;
//LcdCtrlParam.opt = 0;
//LcdCtrlParam.stn = 0;
//LcdCtrlParam.evsel = 0;
//LcdCtrlParam.ovp = 0;
VIOC_DISP_SetControlConfigure(pDISPBase, &LcdCtrlParam);
VIOC_DISP_SetSize(pDISPBase, width, height);
VIOC_DISP_SetBGColor(pDISPBase, 0, 0 , 0);
//VIOC_DISP_TurnOn(pDISPBase);
VIOC_WMIX_SetOverlayPriority(pWIXBase, 24);
VIOC_WMIX_SetBGColor(pWIXBase, 0x00, 0x00, 0x00, 0xff);
VIOC_WMIX_SetSize(pWIXBase, width, height);
VIOC_WMIX_SetUpdate(pWIXBase);
//Disconnect LCDC with NTSC/PAL encoder
BITCLR(pTVE_VEN->VENCON.nREG, HwTVEVENCON_EN_EN);
//Set ECMDA Register
if(type == LCDC_COMPOSITE_NTSC)
{
pTVE->ECMDA.nREG =
HwTVECMDA_PWDENC_PD | // [7] Power down mode for entire digital logic of TV encoder
HwTVECMDA_FDRST_1 | // [6] Chroma is free running as compared to H-sync
HwTVECMDA_FSCSEL_NTSC | // [5:4] Color subcarrier frequency is 3.57954545 MHz for NTSC
HwTVECMDA_PEDESTAL | // [3] Video Output has a pedestal (0 is NTSC-J)
HwTVECMDA_PIXEL_601 | // [2] Input data is at 601 rates.
HwTVECMDA_IFMT_525 | // [1] Output data has 525 lines
HwTVECMDA_PHALT_NTSC | // [0] NTSC encoded chroma signal output
0;
}
else
{
pTVE->ECMDA.nREG =
HwTVECMDA_FDRST_1 | // [6] Chroma is free running as compared to H-sync
HwTVECMDA_FSCSEL_PALX | // [5:4] Color subcarrier frequency is 4.43361875 MHz for PAL-B,D,G,H,I,N
HwTVECMDA_PIXEL_601 | // [2] Input data is at 601 rates.
HwTVECMDA_IFMT_625 | // [1] Output data has 625 lines
HwTVECMDA_PHALT_PAL | // [0] PAL encoded chroma signal output
0;
}
//Set DACSEL Register
BITSET(pTVE->DACSEL.nREG, HwTVEDACSEL_DACSEL_CVBS);
//Set DACPD Register
#if defined(TCC892X)
BITCLR(pTVE->DACPD.nREG, HwTVEDACPD_PD_EN);
#else
BITSET(pTVE->DACPD.nREG, HwTVEDACPD_PD_EN);
#endif
BITSET(pTVE->ICNTL.nREG, HwTVEICNTL_VSIP_HIGH);
BITSET(pTVE->ICNTL.nREG, HwTVEICNTL_HSVSP_RISING);
#if 0 // COMPOSITE_CCIR656
BITCSET(pTVE->ICNTL.nREG, HwTVEICNTL_ISYNC_MASK, HwTVEICNTL_ISYNC_ESAV_F);
#else
BITCSET(pTVE->ICNTL.nREG, HwTVEICNTL_ISYNC_MASK, HwTVEICNTL_ISYNC_HVSI);
#endif
//Set the Vertical Offset
BITCSET(pTVE->HVOFFST.nREG, 0x07, ((0 & 0x700)>>8));
pTVE->HOFFST.nREG = (0 & 0xFF);
//Set the Horizontal Offset
BITCSET(pTVE->HVOFFST.nREG, 0x08, ((1 & 0x100)>>5));
pTVE->VOFFST.nREG = (1 & 0xFF);
//Set the Digital Output Format
BITCSET(pTVE->HVOFFST.nREG, HwTVEHVOFFST_INSEL_MASK, HwTVEHVOFFST_INSEL(2));
//Set HSVSO Register
BITCSET(pTVE->HSVSO.nREG, 0x07, ((0 & 0x700)>>8));
pTVE->HSOE.nREG = (0 & 0xFF);
BITCSET(pTVE->HSVSO.nREG, 0x38, ((0 & 0x700)>>5));
pTVE->HSOB.nREG = (0 & 0xFF);
BITCSET(pTVE->HSVSO.nREG, 0x40, ((0 & 0x100)>>2));
pTVE->VSOB.nREG = (0 & 0xFF);
//Set VSOE Register
BITCSET(pTVE->VSOE.nREG, 0x1F, (0 & 0x1F));
BITCSET(pTVE->VSOE.nREG, 0xC0, (0 & 0x03)<<6);
BITCSET(pTVE->VSOE.nREG, 0x20, (0 & 0x01)<<5);
//Set the Connection Type
BITSET(pTVE_VEN->VENCIF.nREG, HwTVEVENCIF_FMT_1);
BITSET(pTVE_VEN->VENCON.nREG, HwTVEVENCON_EN_EN);
#if defined(TCC892X)
BITSET(pTVE->DACPD.nREG, HwTVEDACPD_PD_EN);
#else
BITCLR(pTVE->DACPD.nREG, HwTVEDACPD_PD_EN);
#endif
BITCLR(pTVE->ECMDA.nREG, HwTVECMDA_PWDENC_PD);
VIOC_DISP_TurnOn(pDISPBase);
}
static void lcdc_io_init_component(unsigned char lcdc_num, unsigned char type)
{
unsigned int lcd_reg = 0;
unsigned int width, height;
stCOMPONENT_SPEC spec;
stLTIMING ComponentTiming;
stLCDCTR LcdCtrlParam;
PVIOC_DISP pDISPBase;
PVIOC_WMIX pWIXBase;
PDDICONFIG pDDICfg = (PDDICONFIG)HwDDI_CONFIG_BASE;
PNTSCPAL pTVE = (PNTSCPAL)HwNTSCPAL_BASE;
PGPIO pGPIO = (PGPIO)HwGPIO_BASE;
struct fbcon_config *fb_con;
printf("%s, lcdc_num=%d, type=%d\n", __func__, lcdc_num, type);
if(type >= LCDC_COMPONENT_MAX)
type = defalut_component_resolution;
#if defined(COMPONENT_CHIP_THS8200)
#if defined(TARGET_BOARD_STB)
/* THS8200 Power Control - GPIO_F16 */
gpio_set(TCC_GPF(16), 1);
#else
#endif
#endif
#ifndef DEFAULT_DISPLAY_OUTPUT_DUAL
BITSET(pTVE->DACPD, HwTVEDACPD_PD_EN);
#endif
component_get_spec(type, &spec);
LCDC_IO_Set(lcdc_num, spec.component_bus_width);
fb_con = &fb_cfg;
if(lcdc_num)
{
pDISPBase = (VIOC_DISP *)HwVIOC_DISP1;
pWIXBase =(VIOC_WMIX *)HwVIOC_WMIX1;
tca_ckc_setperi(PERI_LCD1, ENABLE, spec.component_clock*spec.component_divider);
//VIOC_OUTCFG_SetOutConfig(VIOC_OUTCFG_MRGB, VIOC_OUTCFG_DISP1);
}
else
{
pDISPBase = (VIOC_DISP *)HwVIOC_DISP0;
pWIXBase =(VIOC_WMIX *)HwVIOC_WMIX0;
tca_ckc_setperi(PERI_LCD0, ENABLE, spec.component_clock*spec.component_divider);
//VIOC_OUTCFG_SetOutConfig(VIOC_OUTCFG_MRGB, VIOC_OUTCFG_DISP0);
}
printf("LCDC0 clk:%d, LCDC1 clk:%d, PLL:%d, divide:%d\n", tca_ckc_getperi(PERI_LCD0), tca_ckc_getperi(PERI_LCD1), tca_ckc_getpll(PCDIRECTPLL0), spec.component_divider);
width = spec.component_width;
height = spec.component_height;
lcdc_set_logo(lcdc_num, width, height, fb_con);
ComponentTiming.lpw = spec.component_LPW;
ComponentTiming.lpc = spec.component_LPC + 1;
ComponentTiming.lswc = spec.component_LSWC + 1;
ComponentTiming.lewc = spec.component_LEWC + 1;
ComponentTiming.vdb = spec.component_VDB;
ComponentTiming.vdf = spec.component_VDF;
ComponentTiming.fpw = spec.component_FPW1;
ComponentTiming.flc = spec.component_FLC1;
ComponentTiming.fswc = spec.component_FSWC1;
ComponentTiming.fewc = spec.component_FEWC1;
ComponentTiming.fpw2 = spec.component_FPW2;
ComponentTiming.flc2 = spec.component_FLC2;
ComponentTiming.fswc2 = spec.component_FSWC2;
ComponentTiming.fewc2 = spec.component_FEWC2;
VIOC_DISP_SetTimingParam(pDISPBase, &ComponentTiming);
memset(&LcdCtrlParam, NULL, sizeof(LcdCtrlParam));
switch(type)
{
case LCDC_COMPONENT_480I_NTSC:
case LCDC_COMPONENT_576I_PAL:
break;
case LCDC_COMPONENT_720P:
LcdCtrlParam.r2ymd = 3;
LcdCtrlParam.ckg = 1;
LcdCtrlParam.id= 0;
LcdCtrlParam.iv = 1;
LcdCtrlParam.ih = 1;
LcdCtrlParam.ip = 0;
LcdCtrlParam.pxdw = 12;
LcdCtrlParam.ni = 1;
break;
case LCDC_COMPONENT_1080I:
LcdCtrlParam.r2ymd = 3;
LcdCtrlParam.ckg = 1;
LcdCtrlParam.id= 1;
LcdCtrlParam.iv = 1;
LcdCtrlParam.ih = 0;
LcdCtrlParam.ip = 1;
LcdCtrlParam.pxdw = 12;
LcdCtrlParam.ni = 0;
LcdCtrlParam.tv = 1;
break;
default:
break;
}
VIOC_DISP_SetControlConfigure(pDISPBase, &LcdCtrlParam);
VIOC_DISP_SetSize(pDISPBase, width, height);
VIOC_DISP_SetBGColor(pDISPBase, 0, 0 , 0);
VIOC_WMIX_SetOverlayPriority(pWIXBase, 0);
VIOC_WMIX_SetBGColor(pWIXBase, 0x00, 0x00, 0x00, 0xff);
VIOC_WMIX_SetSize(pWIXBase, width, height);
VIOC_WMIX_SetUpdate(pWIXBase);
#if defined(TARGET_BOARD_STB)
/* VE_FIELD: GPIO_E27 */
gpio_config(TCC_GPE(27), GPIO_FN0|GPIO_OUTPUT|GPIO_HIGH);
#endif
/* Enable Component Chip */
#if defined(COMPONENT_CHIP_CS4954)
if(type == LCDC_COMPONENT_480I_NTSC)
cs4954_enable(COMPONENT_MODE_NTSC_M); // NTSC_M
else
cs4954_enable(COMPONENT_MODE_PAL_B); // PAL_B
#elif defined(COMPONENT_CHIP_THS8200)
if(type == LCDC_COMPONENT_720P)
ths8200_enable(COMPONENT_MODE_720P); // 720P
else
ths8200_enable(COMPONENT_MODE_1080I); // 1080I
#endif
VIOC_DISP_TurnOn(pDISPBase);
}
static void lcdc_io_init_hdmi(unsigned char lcdc_num)
{
uint width, height;
VIOC_DISP *pDISP;
VIOC_WMIX *pWIMX;
stLTIMING HDMI_TIMEp;
stLCDCTR pCtrlParam;
volatile PCLK_XXX_TYPE *pLCDC_CKC;
volatile PCKC pCKC = (PCKC)HwCKC_BASE;
volatile PDDICONFIG pDDI_Config = (PDDICONFIG)HwDDI_CONFIG_BASE;
struct fbcon_config *fb_con;
const struct HDMIVideoParameter video = {
#if (HDMI_MODE_TYPE == 1)
/* video.mode =*/ HDMI,
#else
/* video.mode =*/ DVI,
#endif
/* video.resolution =*/ gRefHdmiVideoModeList[HDMI_VIDEO_MODE_TYPE].vfmt_val,
/* video.colorSpace =*/ HDMI_CS_RGB,
/* video.colorDepth =*/ HDMI_CD_24,
/* video.colorimetry =*/ HDMI_COLORIMETRY_NO_DATA,
/* video.pixelAspectRatio =*/ gRefHdmiVideoModeList[HDMI_VIDEO_MODE_TYPE].ratio,
};
const struct HDMIAudioParameter audio = {
/* audio.inputPort =*/ I2S_PORT,
/* audio.outPacket =*/ HDMI_ASP,
/* audio.formatCode =*/ LPCM_FORMAT,
/* audio.channelNum =*/ CH_2,
/* audio.sampleFreq =*/ SF_44KHZ,
/* audio.wordLength =*/ WORD_16,
/* audio.i2sParam.bpc =*/ I2S_BPC_16,
/* audio.i2sParam.format =*/ I2S_BASIC,
/* audio.i2sParam.clk =*/ I2S_64FS
};
printf("%s LCDC NUM:%d \n", __func__, lcdc_num);
fb_con = &fb_cfg;
if(0) {//lcdc_num) {
#if defined(DEFAULT_DISPLAY_OUTPUT_DUAL)
fb_con = &fb1_cfg;
#endif
}
else {
#if defined(DEFAULT_DISPLAY_OUTPUT_DUAL)
fb_con = &fb0_cfg;
#endif
}
if(lcdc_num)
{
pDISP = (VIOC_DISP *)HwVIOC_DISP1;
pWIMX = (VIOC_WMIX *)HwVIOC_WMIX1;
pLCDC_CKC = (PCLK_XXX_TYPE *)((&pCKC->PCLKCTRL00)+PERI_LCD1);
tca_ckc_setperi(PERI_LCD1, ENABLE, 1000000);
VIOC_OUTCFG_SetOutConfig(VIOC_OUTCFG_HDMI, VIOC_OUTCFG_DISP1);
}
else
{
pDISP = (VIOC_DISP *)HwVIOC_DISP0;
pWIMX = (VIOC_WMIX *)HwVIOC_WMIX0;
pLCDC_CKC = (PCLK_XXX_TYPE *)((&pCKC->PCLKCTRL00)+PERI_LCD0);
tca_ckc_setperi(PERI_LCD0, ENABLE, 1000000);
VIOC_OUTCFG_SetOutConfig(VIOC_OUTCFG_HDMI, VIOC_OUTCFG_DISP0);
}
pLCDC_CKC->bREG.DIV = 0;
pLCDC_CKC->bREG.SEL = PCDIVIDXTIN_HDMIPCLK;
pLCDC_CKC->bREG.EN = 1;
tca_ckc_setippwdn(PMU_ISOL_HDMI, 0);
tca_ckc_setperi(PERI_HDMI, ENABLE, 10000);
width = gRefHdmiVideoModeList[HDMI_VIDEO_MODE_TYPE].width;
height = gRefHdmiVideoModeList[HDMI_VIDEO_MODE_TYPE].height;
HDMI_TIMEp.lpw= LCDCTimimgParams[video.resolution].lpw;
HDMI_TIMEp.lpc= LCDCTimimgParams[video.resolution].lpc + 1;
HDMI_TIMEp.lswc= LCDCTimimgParams[video.resolution].lswc+ 1;
HDMI_TIMEp.lewc= LCDCTimimgParams[video.resolution].lewc+ 1;
HDMI_TIMEp.vdb = LCDCTimimgParams[video.resolution].vdb;
HDMI_TIMEp.vdf = LCDCTimimgParams[video.resolution].vdf;
HDMI_TIMEp.fpw = LCDCTimimgParams[video.resolution].fpw;
HDMI_TIMEp.flc = LCDCTimimgParams[video.resolution].flc;
HDMI_TIMEp.fswc = LCDCTimimgParams[video.resolution].fswc;
HDMI_TIMEp.fewc = LCDCTimimgParams[video.resolution].fewc;
HDMI_TIMEp.fpw2 = LCDCTimimgParams[video.resolution].fpw2;
HDMI_TIMEp.flc2 = LCDCTimimgParams[video.resolution].flc2;
HDMI_TIMEp.fswc2 = LCDCTimimgParams[video.resolution].fswc2;
HDMI_TIMEp.fewc2 = LCDCTimimgParams[video.resolution].fewc2;
VIOC_DISP_SetTimingParam(pDISP, &HDMI_TIMEp);
memset(&pCtrlParam, NULL, sizeof(pCtrlParam));
pCtrlParam.id= LCDCTimimgParams[video.resolution].id;
pCtrlParam.iv= LCDCTimimgParams[video.resolution].iv;
pCtrlParam.ih= LCDCTimimgParams[video.resolution].ih;
pCtrlParam.ip= LCDCTimimgParams[video.resolution].ip;
pCtrlParam.clen = 0;
if(video.colorSpace == HDMI_CS_RGB) {
pCtrlParam.r2y = 0;
pCtrlParam.pxdw = 12; //RGB888
}
else {
pCtrlParam.r2y = 1;
pCtrlParam.pxdw = 8; //RGB888
}
pCtrlParam.dp = LCDCTimimgParams[video.resolution].dp;
pCtrlParam.ni = LCDCTimimgParams[video.resolution].ni;
pCtrlParam.tv = LCDCTimimgParams[video.resolution].tv;
pCtrlParam.opt = 0;
pCtrlParam.stn = 0;
pCtrlParam.evsel = 0;
pCtrlParam.ovp = 0;
VIOC_DISP_SetControlConfigure(pDISP, &pCtrlParam);
VIOC_WMIX_SetOverlayPriority(pWIMX, 24);
VIOC_WMIX_SetBGColor(pWIMX, 0x00, 0x00, 0x00, 0xff);
VIOC_WMIX_SetSize(pWIMX, width, height);
VIOC_WMIX_SetChromaKey(pWIMX, 0, 0, 0, 0, 0, 0xF8, 0xFC, 0xF8);
VIOC_WMIX_SetUpdate(pWIMX);
BITSET(pDDI_Config->PWDN.nREG, Hw2);
BITCLR(pDDI_Config->SWRESET.nREG, Hw2);
BITSET(pDDI_Config->SWRESET.nREG, Hw2);
hdmi_ddi_config_init();
hdmi_set_hdmi_mode(video.mode);
hdmi_set_video_mode(&video);
lcdc_set_logo(lcdc_num, width, height, fb_con);
VIOC_DISP_SetSize (pDISP, width, height);
VIOC_DISP_SetBGColor(pDISP, 0, 0 , 0);
VIOC_DISP_TurnOn(pDISP);
if (video.mode == HDMI)
hdmi_set_audio_mode(&audio);
hdmi_start();
}
