Ejemplos de WRITE_CSR_RING_BASE en C++ (Cpp)

Ejemplo n.º 1

Archivo: adf_dyn_rings.c Proyecto: lecoq/qat_c2xxx

CpaStatus
adf_dynResetRings(icp_accel_dev_t *pAccelDev,
                  icp_et_ring_data_t *ringData)
{
    Cpa32U *csr_base_addr = NULL;
    icp_etr_priv_data_t *pRingPrivData = NULL;
    icp_et_ring_bank_data_t *pBankData = NULL;

    ICP_CHECK_FOR_NULL_PARAM(pAccelDev);
    ICP_CHECK_FOR_NULL_PARAM(ringData);

    csr_base_addr = ringData->ringCSRAddress;
    pRingPrivData = pAccelDev->pCommsHandle;

    /* Reset the ring by writing ringBase */
    ICP_SPINLOCK_LOCK(&ringData->ringLock);
    WRITE_CSR_RING_BASE(ringData->bankNumber,
                         ringData->ringNumber, ringData->ringBase);
    ICP_MEMSET(ringData->ringBaseAddress,
               ADF_RING_PATTERN,
               ringData->sizeInBytes);
    ICP_SPINLOCK_UNLOCK(&ringData->ringLock);


    /* Mark the ring as not "InUse" */
    pBankData = &pRingPrivData->banks[ringData->bankNumber];
    ICP_SPINLOCK_LOCK(&pBankData->bankLock);
    pBankData->ringsInUseMask &= ~(1<<ringData->ringNumber);
    ICP_SPINLOCK_UNLOCK(&pBankData->bankLock);

    return CPA_STATUS_SUCCESS;
}

Ejemplo n.º 2

Archivo: qat_qp.c Proyecto: 0day-ci/dpdk

static int
qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,
		uint32_t nb_desc, uint8_t desc_size, int socket_id)
{
	uint64_t queue_base;
	void *io_addr;
	const struct rte_memzone *qp_mz;
	uint32_t queue_size_bytes = nb_desc*desc_size;

	PMD_INIT_FUNC_TRACE();
	if (desc_size > ADF_MSG_SIZE_TO_BYTES(ADF_MAX_MSG_SIZE)) {
		PMD_DRV_LOG(ERR, "Invalid descriptor size %d", desc_size);
		return -EINVAL;
	}

	/*
	 * Allocate a memzone for the queue - create a unique name.
	 */
	snprintf(queue->memz_name, sizeof(queue->memz_name), "%s_%s_%d_%d_%d",
		dev->driver->pci_drv.name, "qp_mem", dev->data->dev_id,
		queue->hw_bundle_number, queue->hw_queue_number);
	qp_mz = queue_dma_zone_reserve(queue->memz_name, queue_size_bytes,
			socket_id);
	if (qp_mz == NULL) {
		PMD_DRV_LOG(ERR, "Failed to allocate ring memzone");
		return -ENOMEM;
	}

	queue->base_addr = (char *)qp_mz->addr;
	queue->base_phys_addr = qp_mz->phys_addr;
	if (qat_qp_check_queue_alignment(queue->base_phys_addr,
			queue_size_bytes)) {
		PMD_DRV_LOG(ERR, "Invalid alignment on queue create "
					" 0x%"PRIx64"\n",
					queue->base_phys_addr);
		return -EFAULT;
	}

	if (adf_verify_queue_size(desc_size, nb_desc, &(queue->queue_size))
			!= 0) {
		PMD_DRV_LOG(ERR, "Invalid num inflights");
		return -EINVAL;
	}

	queue->max_inflights = ADF_MAX_INFLIGHTS(queue->queue_size,
					ADF_BYTES_TO_MSG_SIZE(desc_size));
	queue->modulo = ADF_RING_SIZE_MODULO(queue->queue_size);
	PMD_DRV_LOG(DEBUG, "RING size in CSR: %u, in bytes %u, nb msgs %u,"
				" msg_size %u, max_inflights %u modulo %u",
				queue->queue_size, queue_size_bytes,
				nb_desc, desc_size, queue->max_inflights,
				queue->modulo);

	if (queue->max_inflights < 2) {
		PMD_DRV_LOG(ERR, "Invalid num inflights");
		return -EINVAL;
	}
	queue->head = 0;
	queue->tail = 0;
	queue->msg_size = desc_size;

	/*
	 * Write an unused pattern to the queue memory.
	 */
	memset(queue->base_addr, 0x7F, queue_size_bytes);

	queue_base = BUILD_RING_BASE_ADDR(queue->base_phys_addr,
					queue->queue_size);
	io_addr = dev->pci_dev->mem_resource[0].addr;

	WRITE_CSR_RING_BASE(io_addr, queue->hw_bundle_number,
			queue->hw_queue_number, queue_base);
	return 0;
}