void ethsw_phy_rw_reg(int phy_id, int reg, uint16 *data, int ext_bit, int rd)
{
int status;
if(rd)
{
status = ReadPHYReg(phy_id, reg, ext_bit);
if (status >= 0)
{
*data = (uint16)status;
}
else
{
printk("ERROR : ethsw_phy_read_reg(%d, %d, **)\n",phy_id,reg);
}
}
else
{
status = WritePHYReg(phy_id, reg, *data, ext_bit);
if (status < 0)
{
printk("ERROR : ethsw_phy_wreg(%d, %d, 0x%04x)\n",phy_id,reg,*data);
}
}
}
void main()
{
union {
unsigned int32 hours;
unsigned int8 minutes;
unsigned int8 seconds;} upTime;
TICK_TYPE CurrentTick,PreviousUDPTick,PreviousSATick;
resetStatus = (RCON & 0b00111111) | !(STKPTR & 0b11000000); // Get the Reset Status
RCON = RCON | 0b00111111; //Reset RCON Reset flags... (Reset Register)
STKPTR = STKPTR & 0b00111111; // Clear Stack Overflow/Underflow flags
PortInit();
OutputInit();
restart_wdt();
romEZHRInit(); //set up default ezhr settings
eeROMinit(); //set up default eprom settings
IPAddressInit(); //set up MAC and default IP addresses
delay_ms(500);
ADCInit(); //set up ADC ports
iniADCParams();
SerialInit(); //set up serial ports
TickInit(); //set up tick timer
enable_interrupts(INT_RDA);
enable_interrupts(GLOBAL);
StackInit();
WritePHYReg(ERXFCON,EthernetRXfilterSetting); // Allow only uni & multi
SetLEDConfig(E_LED_CONFIG); // swap LED's
output_high(E_SW_PWR_DN); // Power Ethernet Switch
output_high(E_SW_RST);
output_low(RS485_TXEN);
output_high(RS485_RXDIS);
output_high(RS232_F_OFF);
output_high(RS232_F_ON);
CurrentTick = PreviousUDPTick = get_ticks();
UDPSampleRate = eeReadUDPRate() * TICKS_PER_MILLISECOND;
portControlInit();
while(TRUE)
{
CurrentTick = get_ticks();
restart_wdt();
StackTask();
restart_wdt();
MyTCPTask();//handles TCP connections
restart_wdt();
setIO();// checks voltage status and sets ports accordingly
//! if(CurrentTick-PreviousUDPTick >= UDPSampleRate)
//! {
//! currentRoutine=UDPTASK;
//! BOOL UDPDone = MyUDPTask();
//! if(UDPDone)
//! {
//! PreviousUDPTick=CurrentTick;
//! }
//! }
StackApplications();
}
}
/******************************************************************************
* Function: void MACInit(void)
*
* PreCondition: None
*
* Input: None
*
* Output: None
*
* Side Effects: None
*
* Overview: MACInit enables the Ethernet module, waits for the
* to become ready, and programs all registers for future
* TX/RX operations.
*
* Note: This function blocks for at least 1ms, waiting for the
* hardware to stabilize.
*****************************************************************************/
void MACInit(void) {
BYTE i;
TRISA &= 0xFC; // Clear TRISA0 and TRISA1 to set LED0 and LED1 as outputs for Ethernet module status
ECON2bits.ETHEN = 1; // Enable Ethernet!
// If Ethernet TPIN+/- RX polarity swap hardware exists, start controlling
// it and default it to the non-swapped state.
#if defined(ETH_RX_POLARITY_SWAP_TRIS)
ETH_RX_POLARITY_SWAP_TRIS = 0;
ETH_RX_POLARITY_SWAP_IO = 0;
#endif
// Wait for PHYRDY to become set.
while (!ESTATbits.PHYRDY);
// Configure the receive buffer boundary pointers
// and the buffer write protect pointer (receive buffer read pointer)
flags.v = 0;
flags.bits.bWasDiscarded = 1;
NextPacketLocation.Val = RXSTART;
ERXST = RXSTART;
ERXRDPTL = LOW(RXSTOP); // Write low byte first
ERXRDPTH = HIGH(RXSTOP); // Write high byte last
ERXND = RXSTOP;
ETXST = TXSTART;
// Write a permanant per packet control byte of 0x00
EWRPT = TXSTART;
MACPut(0x00);
// Configure Receive Filters
// (No need to reconfigure - Unicast OR Broadcast with CRC checking is
// acceptable)
//ERXFCON = ERXFCON_CRCEN; // Promiscious mode
// Configure the MAC
// Enable the receive portion of the MAC
MACON1 = MACON1_TXPAUS | MACON1_RXPAUS | MACON1_MARXEN;
Nop();
// Pad packets to 60 bytes, add CRC, and check Type/Length field.
#if defined(FULL_DUPLEX)
MACON3 = MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX;
Nop();
MABBIPG = 0x15;
Nop();
#else
MACON3 = MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN;
Nop();
MABBIPG = 0x12;
Nop();
#endif
// Allow infinite deferals if the medium is continuously busy
// (do not time out a transmission if the half duplex medium is
// completely saturated with other people's data)
MACON4 = MACON4_DEFER;
Nop();
// Set non-back-to-back inter-packet gap to 9.6us. The back-to-back
// inter-packet gap (MABBIPG) is set by MACSetDuplex() which is called
// later.
MAIPGL = 0x12;
Nop();
MAIPGH = 0x0C;
Nop();
// Set the maximum packet size which the controller will accept
MAMXFLL = LOW(6 + 6 + 2 + 1500 + 4);
Nop();
MAMXFLH = HIGH(6 + 6 + 2 + 1500 + 4);
Nop();
// Initialize physical MAC address registers
MAADR1 = 0; //AppConfig.MyMACAddr.v[0];
Nop();
MAADR2 = 0; //AppConfig.MyMACAddr.v[1];
Nop();
MAADR3 = 0; //AppConfig.MyMACAddr.v[2];
Nop();
MAADR4 = 0; //AppConfig.MyMACAddr.v[3];
Nop();
MAADR5 = 0; //AppConfig.MyMACAddr.v[4];
Nop();
MAADR6 = 0; //AppConfig.MyMACAddr.v[5];
Nop();
// Disable half duplex loopback in PHY and set RXAPDIS bit as per errata
WritePHYReg(PHCON2, PHCON2_HDLDIS | PHCON2_RXAPDIS);
// Configure LEDA to display LINK status, LEDB to display TX/RX activity
SetLEDConfig(0x3472);
// Set the PHY into the proper duplex state
#if defined(FULL_DUPLEX)
WritePHYReg(PHCON1, PHCON1_PDPXMD);
#else
WritePHYReg(PHCON1, 0x0000);
#endif
// Enable packet reception
ECON1bits.RXEN = 1;
}//end MACInit
