Ejemplo n.º 1
0
BOOL IsNextInstructionMmx(DWORD PC) {
	OPCODE RspOp;
	
	if (IsMmxEnabled == FALSE)
		return FALSE;

	PC += 4;
	if (PC >= 0x1000) return FALSE;
	RSP_LW_IMEM(PC, &RspOp.Hex);

	if (RspOp.op != RSP_CP2)
		return FALSE;

	if ((RspOp.rs & 0x10) != 0) {
		switch (RspOp.funct) {
		case RSP_VECTOR_VMULF:
		case RSP_VECTOR_VMUDL: /* Warning: Not all handled? */
		case RSP_VECTOR_VMUDM:
		case RSP_VECTOR_VMUDN:
		case RSP_VECTOR_VMUDH:
			if (TRUE == WriteToAccum(7, PC)) {
				return FALSE;
			} else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7 && IsMmx2Enabled == FALSE) {
				return FALSE;
			} else 
				return TRUE;

		case RSP_VECTOR_VABS:
		case RSP_VECTOR_VAND:
		case RSP_VECTOR_VOR:
		case RSP_VECTOR_VXOR:
		case RSP_VECTOR_VNAND:
		case RSP_VECTOR_VNOR:
		case RSP_VECTOR_VNXOR:
			if (TRUE == WriteToAccum(Low16BitAccum, PC)) {
				return FALSE;
			} else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7 && IsMmx2Enabled == FALSE) {
				return FALSE;
			} else
				return TRUE;

		case RSP_VECTOR_VADD:
		case RSP_VECTOR_VSUB:
			/* Requires no accumulator write! & No flags! */
			if (WriteToAccum(Low16BitAccum, PC) == TRUE) {
				return FALSE;
			} else if (UseRspFlags(PC) == TRUE) {
				return FALSE;
			} else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7 && IsMmx2Enabled == FALSE) {
				return FALSE;
			} else
				return TRUE;

		default:
			return FALSE;
		}
	} else 
		return FALSE;
}
int32_t IsNextInstructionMmx(uint32_t PC)
{
    RSPOPCODE RspOp;

    if (IsMmxEnabled == 0)
	return 0;

    PC += 4;
    if (PC >= 0x1000)
	return 0;
    RSP_LW_IMEM(PC, &RspOp.Hex);

    if (RspOp.op != RSP_CP2)
	return 0;

    if ((RspOp.rs & 0x10) != 0) {
	switch (RspOp.funct) {
	case RSP_VECTOR_VMULF:
	case RSP_VECTOR_VMUDL:	/* Warning: Not all handled? */
	case RSP_VECTOR_VMUDM:
	case RSP_VECTOR_VMUDN:
	case RSP_VECTOR_VMUDH:
	    if (1 == WriteToAccum(7, PC)) {
		return 0;
	    } else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7
		       && IsMmx2Enabled == 0) {
		return 0;
	    } else
		return 1;

	case RSP_VECTOR_VAND:
	case RSP_VECTOR_VOR:
	case RSP_VECTOR_VXOR:
	    if (1 == WriteToAccum(Low16BitAccum, PC)) {
		return 0;
	    } else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7
		       && IsMmx2Enabled == 0) {
		return 0;
	    } else
		return 1;

	case RSP_VECTOR_VADD:
	    /* Requires no accumulator write! & No flags! */
	    if (WriteToAccum(Low16BitAccum, RSPCompilePC) == 1) {
		return 0;
	    } else if (UseRspFlags(RSPCompilePC) == 1) {
		return 0;
	    } else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7
		       && IsMmx2Enabled == 0) {
		return 0;
	    } else
		return 1;

	default:
	    return 0;
	}
    } else
	return 0;
}