/**
*
* This function determines if the specified UART is sending data. If the
* transmitter register is not empty, it is sending data.
*
* @param InstancePtr is a pointer to the XUartLite instance.
*
* @return A value of TRUE if the UART is sending data, otherwise FALSE.
*
* @note None.
*
*****************************************************************************/
int XUartLite_IsSending(XUartLite *InstancePtr)
{
u32 StatusRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
/*
* Read the status register to determine if the transmitter is empty
*/
StatusRegister = XUartLite_ReadReg(InstancePtr->RegBaseAddress,
XUL_STATUS_REG_OFFSET);
/*
* If the transmitter is not empty then indicate that the UART is still
* sending some data
*/
return ((StatusRegister & XUL_SR_TX_FIFO_EMPTY) == 0);
}
/* --- serGetChar1() Get 1 char from the UART Lite, but do not block.
--- Return number of chars received. */
char serGetChar1(unsigned char *str)
{
if (bootLoadCmd1G == BLC_NORMAL){
/* Check if data is available */
if (!XUartLite_IsReceiveEmpty(UARTLITE_BASEADDRESS)){
*str = XUartLite_ReadReg(UARTLITE_BASEADDRESS, XUL_RX_FIFO_OFFSET);
return 1;
}
return 0;
}
else if (bootLoadCmd1G == BLC_DL_RECVD){
return 0;
}
else if (bootLoadCmd1G == BLC_DL_WAITING){
if (!XUartLite_IsReceiveEmpty(UARTLITE_BASEADDRESS)){
*str = XUartLite_ReadReg(UARTLITE_BASEADDRESS, XUL_RX_FIFO_OFFSET);
if (*str == ':'){
bootLoadCmd1G = BLC_DL_RECVD;
return 0;
}
return 1;
}
return 0;
}
else{
*str = bootLoadCmd1G;
bootLoadCmd1G = BLC_DL_WAITING;
return 1;
}
}
/* --- serGetDLline1() Receives a full Download Line (DL) of chars from USART 1.
--- It strips off the ':' */
unsigned char serGetDLline1(unsigned char *str)
{
unsigned char i, slen[5], *dummy;
uint8_t len;
if (bootLoadCmd1G == BLC_NORMAL){
return 0;
}
else if (bootLoadCmd1G == BLC_DL_WAITING){
/* Check if data is available */
if (!XUartLite_IsReceiveEmpty(UARTLITE_BASEADDRESS)){
*slen = XUartLite_ReadReg(UARTLITE_BASEADDRESS, XUL_RX_FIFO_OFFSET);
if (*slen != ':'){
bootLoadCmd1G = *slen;
return 0;
}
bootLoadCmd1G = BLC_DL_RECVD;
}
else{
return 0;
}
}
// If we made it here, a char has been received
if (bootLoadCmd1G == BLC_DL_RECVD){
// ':' has been received, get the number of data bytes
i = 0;
str[2] = 0;
// get first two chars to determine length of line
while(i < 2){
if(!XUartLite_IsReceiveEmpty(UARTLITE_BASEADDRESS)){
str[i++] = XUartLite_ReadReg(UARTLITE_BASEADDRESS, XUL_RX_FIFO_OFFSET);
}
}
len = (uint8_t)strtol(str,&dummy,16);
// Now get the 2-byte address, the 1-byte type, the data and the 1-byte Checksum (2 chars per byte)
while(i < (10 + (len <<1))){
if(!XUartLite_IsReceiveEmpty(UARTLITE_BASEADDRESS)){
str[i++] = XUartLite_ReadReg(UARTLITE_BASEADDRESS, XUL_RX_FIFO_OFFSET);
}
}
str[i] = 0; // place the end-of-string char
bootLoadCmd1G = BLC_DL_WAITING;
return i;
}
else{
return 0; // A char other than ':' was received - not a download string
}
}
/**
*
* This function resets the FIFOs, both transmit and receive, of the UART such
* that they are emptied. Since the UART does not have any way to disable it
* from receiving data, it may be necessary for the application to reset the
* FIFOs to get rid of any unwanted data.
*
* @param InstancePtr is a pointer to the XUartLite instance .
*
* @return None.
*
* @note None.
*
*****************************************************************************/
void XUartLite_ResetFifos(XUartLite *InstancePtr)
{
u32 Register;
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Read the status register 1st such that the next write to the control
* register won't destroy the state of the interrupt enable bit
*/
Register = XUartLite_ReadReg(InstancePtr->RegBaseAddress,
XUL_STATUS_REG_OFFSET);
/*
* Mask off the interrupt enable bit to maintain it's state.
*/
Register &= XUL_SR_INTR_ENABLED;
/*
* Write to the control register to reset both FIFOs, these bits are
* self-clearing such that there's no need to clear them
*/
XUartLite_WriteReg(InstancePtr->RegBaseAddress, XUL_CONTROL_REG_OFFSET,
Register | XUL_CR_FIFO_TX_RESET | XUL_CR_FIFO_RX_RESET);
}
/**
*
* This function is the interrupt handler for the UART lite driver.
* It must be connected to an interrupt system by the user such that it is
* called when an interrupt for any UART lite occurs. This function
* does not save or restore the processor context such that the user must
* ensure this occurs.
*
* @param InstancePtr contains a pointer to the instance of the UART that
* the interrupt is for.
*
* @return None.
*
* @note None.
*
******************************************************************************/
void XUartLite_InterruptHandler(XUartLite *InstancePtr)
{
u32 IsrStatus;
Xil_AssertVoid(InstancePtr != NULL);
/*
* Read the status register to determine which, coulb be both
* interrupt is active
*/
IsrStatus = XUartLite_ReadReg(InstancePtr->RegBaseAddress,
XUL_STATUS_REG_OFFSET);
if ((IsrStatus & (XUL_SR_RX_FIFO_FULL |
XUL_SR_RX_FIFO_VALID_DATA)) != 0) {
ReceiveDataHandler(InstancePtr);
}
if (((IsrStatus & XUL_SR_TX_FIFO_EMPTY) != 0) &&
(InstancePtr->SendBuffer.RequestedBytes > 0)) {
SendDataHandler(InstancePtr);
}
}
/**
*
* Runs a self-test on the device hardware. Since there is no way to perform a
* loopback in the hardware, this test can only check the state of the status
* register to verify it is correct. This test assumes that the hardware
* device is still in its reset state, but has been initialized with the
* Initialize function.
*
* @param InstancePtr is a pointer to the XUartLite instance.
*
* @return
* - XST_SUCCESS if the self-test was successful.
* - XST_FAILURE if the self-test failed, the status register
* value was not correct
*
* @note None.
*
******************************************************************************/
int XUartLite_SelfTest(XUartLite *InstancePtr)
{
u32 StatusRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Reset the FIFO's before reading the status register.
* It is likely that the Uartlite IP may not always have an
* empty Tx and Rx FIFO when a selftest is performed if more than one
* uartlite instance is present in the h/w design.
*/
XUartLite_ResetFifos(InstancePtr);
/*
* Read the Status register value to check if it is the correct value
* after a reset
*/
StatusRegister = XUartLite_ReadReg(InstancePtr->RegBaseAddress,
XUL_STATUS_REG_OFFSET);
/*
* If the status register is any other value other than
* XUL_SR_TX_FIFO_EMPTY then the test is a failure since this is
* the not the value after reset
*/
if (StatusRegister != XUL_SR_TX_FIFO_EMPTY) {
return XST_FAILURE;
}
return XST_SUCCESS;
}
static void prvRxHandler( void *pvUnused, unsigned portBASE_TYPE uxByteCount )
{
signed char cRxedChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
( void ) pvUnused;
( void ) uxByteCount;
/* Place any received characters into the receive queue. */
while( XUartLite_IsReceiveEmpty( xUartLiteInstance.RegBaseAddress ) == pdFALSE )
{
cRxedChar = XUartLite_ReadReg( xUartLiteInstance.RegBaseAddress, XUL_RX_FIFO_OFFSET);
xQueueSendFromISR( xRxedChars, &cRxedChar, &xHigherPriorityTaskWoken );
}
/* If calling xQueueSendFromISR() caused a task to unblock, and the task
that unblocked has a priority equal to or greater than the task currently
in the Running state (the task that was interrupted), then
xHigherPriorityTaskWoken will have been set to pdTRUE internally within the
xQueueSendFromISR() API function. If xHigherPriorityTaskWoken is equal to
pdTRUE then a context switch should be requested to ensure that the
interrupt returns to the highest priority task that is able to run. */
portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
}
/**
*
* This function receives a buffer that has been previously specified by setting
* up the instance variables of the instance. This function is designed to be
* an internal function for the XUartLite component such that it may be called
* from a shell function that sets up the buffer or from an interrupt handler.
*
* This function will attempt to receive a specified number of bytes of data
* from the UART and store it into the specified buffer. This function is
* designed for either polled or interrupt driven modes. It is non-blocking
* such that it will return if there is no data has already received by the
* UART.
*
* In a polled mode, this function will only receive as much data as the UART
* can buffer, either in the receiver or in the FIFO if present and enabled.
* The application may need to call it repeatedly to receive a buffer. Polled
* mode is the default mode of operation for the driver.
*
* In interrupt mode, this function will start receiving and then the interrupt
* handler of the driver will continue until the buffer has been received. A
* callback function, as specified by the application, will be called to indicate
* the completion of receiving the buffer or when any receive errors or timeouts
* occur.
*
* @param InstancePtr is a pointer to the XUartLite instance.
*
* @return The number of bytes received.
*
* @note None.
*
*****************************************************************************/
unsigned int XUartLite_ReceiveBuffer(XUartLite *InstancePtr)
{
u8 StatusRegister;
u8 StatusRegisterVal;
unsigned int ReceivedCount = 0;
/*
* Enter a critical region by disabling all the UART interrupts to allow
* this call to stop a previous operation that may be interrupt driven
*/
StatusRegisterVal = XUartLite_GetStatusReg(InstancePtr->RegBaseAddress);
XUartLite_WriteReg(InstancePtr->RegBaseAddress,
XUL_CONTROL_REG_OFFSET, 0);
/*
* Loop until there is not more data buffered by the UART or the
* specified number of bytes is received
*/
while (ReceivedCount < InstancePtr->ReceiveBuffer.RemainingBytes) {
/*
* Read the Status Register to determine if there is any data in
* the receiver/FIFO
*/
StatusRegister =
XUartLite_GetStatusReg(InstancePtr->RegBaseAddress);
/*
* If there is data ready to be removed, then put the next byte
* received into the specified buffer and update the stats to
* reflect any receive errors for the byte
*/
if (StatusRegister & XUL_SR_RX_FIFO_VALID_DATA) {
InstancePtr->ReceiveBuffer.NextBytePtr[ReceivedCount++]=
XUartLite_ReadReg(InstancePtr->RegBaseAddress,
XUL_RX_FIFO_OFFSET);
XUartLite_UpdateStats(InstancePtr, StatusRegister);
}
/*
* There's no more data buffered, so exit such that this
* function does not block waiting for data
*/
else {
break;
}
}
/*
* Update the receive buffer to reflect the number of bytes that was
* received
*/
InstancePtr->ReceiveBuffer.NextBytePtr += ReceivedCount;
InstancePtr->ReceiveBuffer.RemainingBytes -= ReceivedCount;
/*
* Increment associated counters in the statistics
*/
InstancePtr->Stats.CharactersReceived += ReceivedCount;
/*
* Restore the interrupt enable register to it's previous value such
* that the critical region is exited
*/
StatusRegisterVal &= XUL_CR_ENABLE_INTR;
XUartLite_WriteReg(InstancePtr->RegBaseAddress,
XUL_CONTROL_REG_OFFSET, StatusRegisterVal);
return ReceivedCount;
}
/**
*
* This functions receives a single byte using the UART. It is blocking in that
* it waits for the receiver to become non-empty before it reads from the
* receive register.
*
* @param BaseAddress is the base address of the device
*
* @return The byte of data received.
*
* @note None.
*
******************************************************************************/
u8 XUartLite_RecvByte(u32 BaseAddress)
{
while (XUartLite_IsReceiveEmpty(BaseAddress));
return (u8)XUartLite_ReadReg(BaseAddress, XUL_RX_FIFO_OFFSET);
}
void DemoChangeRes()
{
int fResSet = 0;
int status;
char userInput = 0;
/* Flush UART FIFO */
while (!XUartLite_IsReceiveEmpty(UART_BASEADDR))
{
XUartLite_ReadReg(UART_BASEADDR, XUL_RX_FIFO_OFFSET);
}
while (!fResSet)
{
DemoCRMenu();
/* Wait for data on UART */
while (XUartLite_IsReceiveEmpty(UART_BASEADDR) && !fRefresh)
{}
/* Store the first character in the UART recieve FIFO and echo it */
userInput = XUartLite_ReadReg(UART_BASEADDR, XUL_RX_FIFO_OFFSET);
xil_printf("%c", userInput);
status = XST_SUCCESS;
switch (userInput)
{
case '1':
status = DisplayStop(&dispCtrl);
DisplaySetMode(&dispCtrl, &VMODE_640x480);
DisplayStart(&dispCtrl);
fResSet = 1;
break;
case '2':
status = DisplayStop(&dispCtrl);
DisplaySetMode(&dispCtrl, &VMODE_800x600);
DisplayStart(&dispCtrl);
fResSet = 1;
break;
case '3':
status = DisplayStop(&dispCtrl);
DisplaySetMode(&dispCtrl, &VMODE_1280x720);
DisplayStart(&dispCtrl);
fResSet = 1;
break;
case '4':
status = DisplayStop(&dispCtrl);
DisplaySetMode(&dispCtrl, &VMODE_1280x1024);
DisplayStart(&dispCtrl);
fResSet = 1;
break;
case '5':
status = DisplayStop(&dispCtrl);
DisplaySetMode(&dispCtrl, &VMODE_1920x1080);
DisplayStart(&dispCtrl);
fResSet = 1;
break;
case 'q':
fResSet = 1;
break;
default :
xil_printf("\n\rInvalid Selection");
MB_Sleep(50);
}
if (status == XST_DMA_ERROR)
{
xil_printf("\n\rWARNING: AXI VDMA Error detected and cleared\n\r");
}
}
}
void DemoRun()
{
int nextFrame = 0;
char userInput = 0;
u32 locked;
XGpio *GpioPtr = &videoCapt.gpio;
/* Flush UART FIFO */
while (!XUartLite_IsReceiveEmpty(UART_BASEADDR))
{
XUartLite_ReadReg(UART_BASEADDR, XUL_RX_FIFO_OFFSET);
}
while (userInput != 'q')
{
fRefresh = 0;
DemoPrintMenu();
/* Wait for data on UART */
while (XUartLite_IsReceiveEmpty(UART_BASEADDR) && !fRefresh)
{}
/* Store the first character in the UART receive FIFO and echo it */
if (!XUartLite_IsReceiveEmpty(UART_BASEADDR))
{
userInput = XUartLite_ReadReg(UART_BASEADDR, XUL_RX_FIFO_OFFSET);
xil_printf("%c", userInput);
}
else //Refresh triggered by video detect interrupt
{
userInput = 'r';
}
switch (userInput)
{
case '1':
DemoChangeRes();
break;
case '2':
nextFrame = dispCtrl.curFrame + 1;
if (nextFrame >= DISPLAY_NUM_FRAMES)
{
nextFrame = 0;
}
DisplayChangeFrame(&dispCtrl, nextFrame);
break;
case '3':
DemoPrintTest(pFrames[dispCtrl.curFrame], dispCtrl.vMode.width, dispCtrl.vMode.height, DEMO_STRIDE, DEMO_PATTERN_0);
break;
case '4':
DemoPrintTest(pFrames[dispCtrl.curFrame], dispCtrl.vMode.width, dispCtrl.vMode.height, DEMO_STRIDE, DEMO_PATTERN_1);
break;
case '5':
if (videoCapt.state == VIDEO_STREAMING)
VideoStop(&videoCapt);
else
VideoStart(&videoCapt);
break;
case '6':
nextFrame = videoCapt.curFrame + 1;
if (nextFrame >= DISPLAY_NUM_FRAMES)
{
nextFrame = 0;
}
VideoChangeFrame(&videoCapt, nextFrame);
break;
case '7':
nextFrame = videoCapt.curFrame + 1;
if (nextFrame >= DISPLAY_NUM_FRAMES)
{
nextFrame = 0;
}
VideoStop(&videoCapt);
DemoInvertFrame(pFrames[videoCapt.curFrame], pFrames[nextFrame], videoCapt.timing.HActiveVideo, videoCapt.timing.VActiveVideo, DEMO_STRIDE);
VideoStart(&videoCapt);
DisplayChangeFrame(&dispCtrl, nextFrame);
break;
case '8':
nextFrame = videoCapt.curFrame + 1;
if (nextFrame >= DISPLAY_NUM_FRAMES)
{
nextFrame = 0;
}
VideoStop(&videoCapt);
DemoScaleFrame(pFrames[videoCapt.curFrame], pFrames[nextFrame], videoCapt.timing.HActiveVideo, videoCapt.timing.VActiveVideo, dispCtrl.vMode.width, dispCtrl.vMode.height, DEMO_STRIDE);
VideoStart(&videoCapt);
DisplayChangeFrame(&dispCtrl, nextFrame);
break;
case 'q':
break;
case 'r':
locked = XGpio_DiscreteRead(GpioPtr, 2);
xil_printf("%d", locked);
break;
default :
xil_printf("\n\rInvalid Selection");
MB_Sleep(50);
}
}
return;
}
