Ejemplo n.º 1
0
uint32_t _Thread_Dispatch_increment_disable_level(void)
{
  ISR_Level  isr_level;
  uint32_t   level;

  /*
   * Note: _SMP_lock_spinlock_nested_Obtain returns
   *       with ISR's disabled and the isr_level that
   *       should be restored after a short period.
   *
   * Here we obtain the lock and increment the 
   * Thread dispatch disable level while under the
   * protection of the isr being off.  After this
   * point it is safe to re-enable ISRs and allow
   * the dispatch disable lock to provide protection.
   */

  isr_level = _SMP_lock_spinlock_nested_Obtain(
    &_Thread_Dispatch_disable_level_lock
  );
  
  _Thread_Dispatch_disable_level++;
  level = _Thread_Dispatch_disable_level;

  _ISR_Enable_on_this_core(isr_level);
  return level;
}
Ejemplo n.º 2
0
void _SMP_lock_spinlock_nested_Release(
  SMP_lock_spinlock_nested_Control *lock,
  ISR_Level                        level
)
{
  #if defined (RTEMS_DEBUG) || defined(SMPLOCK_DEBUG)
    if ( lock->count == 0 ) {
      printk(
        "\ncpu %d lock %d Releasing spinlock when count is already "
        "zero (%p from %p,%p)?!?!\n",
        bsp_smp_processor_id(),  
        lock->cpu_id,
        lock,
        __builtin_return_address(0),
        __builtin_return_address(1)
      );
      debug_dump_log();
      return;
    }
  #endif

  /* assume we actually have it */
  if (lock->count == 1) {
    lock->cpu_id = -1;
    debug_logit( 'U', lock );
    lock->count  = 0;
    RTEMS_COMPILER_MEMORY_BARRIER();
    lock->lock = 0;
  } else {
    debug_logit( 'u', lock );
    lock->count--;
  }

  _ISR_Enable_on_this_core( level ); 
}
Ejemplo n.º 3
0
void _SMP_lock_spinlock_simple_Release(
  SMP_lock_spinlock_simple_Control *lock,
  ISR_Level                        level
)
{
   *lock = 0;
   _ISR_Enable_on_this_core( level );
}
Ejemplo n.º 4
0
int _ISR_SMP_Exit(void)
{
  ISR_Level level;
  int       retval;

  retval = 0;

  _ISR_Disable_on_this_core( level );

  _ISR_Nest_level--;

  if ( _ISR_Nest_level == 0 ) {
    if ( _Thread_Dispatch_necessary ) {
      if ( _Thread_Dispatch_get_disable_level() == 1 ) {
        retval = 1;
      }
    } 
  }

  /*
   *  SPARC has special support to avoid some nasty recursive type behaviour.
   *  When dispatching in a thread and we want to return to it then it needs
   *  to finish.
   */
  #if defined(__sparc__)
    if ( _CPU_ISR_Dispatch_disable )
      retval = 0;
  #endif

  _ISR_Enable_on_this_core( level );

  _Thread_Dispatch_decrement_disable_level();

   if ( retval == 0 )
    _SMP_Request_other_cores_to_dispatch();

  return retval;
}
Ejemplo n.º 5
0
void _ISR_SMP_Enable(ISR_Level level)
{
  _ISR_Enable_on_this_core( level );
}