Ejemplo n.º 1
0
/**
  * @brief  Initializes the IWDG according to the specified
  *         parameters in the IWDG_InitTypeDef and creates the associated handle.
  * @param  hiwdg: pointer to a IWDG_HandleTypeDef structure that contains
  *                the configuration information for the specified IWDG module.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
{
  /* Check the IWDG handle allocation */
  if(hiwdg == NULL)
  {
    return HAL_ERROR;
  }

  /* Check the parameters */
  assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
  assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
  assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); 
  
  if(hiwdg->State == HAL_IWDG_STATE_RESET)
  {  
    /* Init the low level hardware */
    HAL_IWDG_MspInit(hiwdg);
  }
  
  /* Change IWDG peripheral state */
  hiwdg->State = HAL_IWDG_STATE_BUSY;  
  
  /* Enable write access to IWDG_PR and IWDG_RLR registers */  
  __HAL_IWDG_ENABLE_WRITE_ACCESS(hiwdg);
  
  /* Write to IWDG registers the IWDG_Prescaler & IWDG_Reload values to work with */
  MODIFY_REG(hiwdg->Instance->PR, IWDG_PR_PR, hiwdg->Init.Prescaler);
  MODIFY_REG(hiwdg->Instance->RLR, IWDG_RLR_RL, hiwdg->Init.Reload);
 
  /* Change IWDG peripheral state */
  hiwdg->State = HAL_IWDG_STATE_READY;
  
  /* Return function status */
  return HAL_OK;
}
Ejemplo n.º 2
0
/**
  * @brief  Initializes the IWDG according to the specified
  *         parameters in the IWDG_InitTypeDef and creates the associated handle.
  * @param  hiwdg: IWDG handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
{
    uint32_t tmp;

    /* Check the IWDG handle allocation */
    if(hiwdg == NULL)
    {
        return HAL_ERROR;
    }

    /* Check the parameters */
    assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
    assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));

    if(hiwdg->State == HAL_IWDG_STATE_RESET)
    {
        /* Init the low level hardware */
        HAL_IWDG_MspInit(hiwdg);
    }

    /* Change IWDG peripheral state */
    hiwdg->State = HAL_IWDG_STATE_BUSY;

    /* Set IWDG counter clock prescaler */
    /* Get the PR register value */
    tmp = hiwdg->Instance->PR;

    /* Clear PR[2:0] bits */
    tmp &= ((uint32_t)~(IWDG_PR_PR));

    /* Prepare the IWDG Prescaler parameter */
    tmp |= hiwdg->Init.Prescaler;

    /* Enable write access to IWDG_PR and IWDG_RLR registers */
    __HAL_IWDG_ENABLE_WRITE_ACCESS(hiwdg);

    /* Write to IWDG PR */
    hiwdg->Instance->PR = tmp;

    /* Set IWDG counter reload value */
    /* Get the RLR register value */
    tmp = hiwdg->Instance->RLR;

    /* Clear RL[11:0] bits */
    tmp &= ((uint32_t)~(IWDG_RLR_RL));

    /* Prepare the IWDG Prescaler parameter */
    tmp |= hiwdg->Init.Reload;

    /* Write to IWDG RLR */
    hiwdg->Instance->RLR = tmp;

    /* Change IWDG peripheral state */
    hiwdg->State = HAL_IWDG_STATE_READY;

    /* Return function status */
    return HAL_OK;
}
Ejemplo n.º 3
0
/**
  * @brief  Initializes the IWDG according to the specified
  *         parameters in the IWDG_InitTypeDef and creates the associated handle.
  * @param  hiwdg: pointer to a IWDG_HandleTypeDef structure that contains
  *                the configuration information for the specified IWDG module.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
{ 
  uint32_t tickstart = 0;

  /* Check the IWDG handle allocation */
  if(hiwdg == NULL)
  {
    return HAL_ERROR;
  }
  
  /* Check the parameters */
  assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
  assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
  assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
  assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));

  /* Check pending flag, if previous update not done, return error */
  if((__HAL_IWDG_GET_FLAG(hiwdg, IWDG_FLAG_PVU) != RESET)
     &&(__HAL_IWDG_GET_FLAG(hiwdg, IWDG_FLAG_RVU) != RESET)
     &&(__HAL_IWDG_GET_FLAG(hiwdg, IWDG_FLAG_WVU) != RESET))
  {
    return HAL_ERROR;
  }
  
  if(hiwdg->State == HAL_IWDG_STATE_RESET)
  { 
  /* Init the low level hardware */
  HAL_IWDG_MspInit(hiwdg);
  }

  /* Change IWDG peripheral state */
  hiwdg->State = HAL_IWDG_STATE_BUSY;

  /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers */  
  /* by writing 0x5555 in KR */  
  __HAL_IWDG_ENABLE_WRITE_ACCESS(hiwdg);
  
  /* Write to IWDG registers the IWDG_Prescaler & IWDG_Reload values to work with */
  MODIFY_REG(hiwdg->Instance->PR, IWDG_PR_PR, hiwdg->Init.Prescaler);
  MODIFY_REG(hiwdg->Instance->RLR, IWDG_RLR_RL, hiwdg->Init.Reload);
 
  /* check if window option is enabled */
  if (((hiwdg->Init.Window) != IWDG_WINDOW_DISABLE) || ((hiwdg->Instance->WINR) != IWDG_WINDOW_DISABLE))
  {
    tickstart = HAL_GetTick();

     /* Wait for register to be updated */
    while((uint32_t)(hiwdg->Instance->SR) != RESET)
    {
      if((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
      { 
        /* Set IWDG state */
        hiwdg->State = HAL_IWDG_STATE_TIMEOUT;
        return HAL_TIMEOUT;
      } 
    }

    /* Write to IWDG WINR the IWDG_Window value to compare with */
    MODIFY_REG(hiwdg->Instance->WINR, IWDG_WINR_WIN, hiwdg->Init.Window);

  } 
  /* Change IWDG peripheral state */
  hiwdg->State = HAL_IWDG_STATE_READY;
 
  /* Return function status */
  return HAL_OK;
}