void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM6)
{
/* USER CODE BEGIN TIM6_MspDeInit 0 */
/* USER CODE END TIM6_MspDeInit 0 */
/* Peripheral clock disable */
__TIM6_CLK_DISABLE();
/* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(TIM6_DAC_IRQn);
/* USER CODE BEGIN TIM6_MspDeInit 1 */
/* USER CODE END TIM6_MspDeInit 1 */
}
else if(htim_base->Instance==TIM7)
{
/* USER CODE BEGIN TIM7_MspDeInit 0 */
/* USER CODE END TIM7_MspDeInit 0 */
/* Peripheral clock disable */
__TIM7_CLK_DISABLE();
/* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(TIM7_IRQn);
/* USER CODE BEGIN TIM7_MspDeInit 1 */
/* USER CODE END TIM7_MspDeInit 1 */
}
}
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
#ifdef USE_SCOPE
if(htim_base->Instance==TIM3)
{
/* USER CODE BEGIN TIM3_MspDeInit 0 */
/* USER CODE END TIM3_MspDeInit 0 */
/* Peripheral clock disable */
__TIM3_CLK_DISABLE();
/* USER CODE BEGIN TIM3_MspDeInit 1 */
/* USER CODE END TIM3_MspDeInit 1 */
}
#endif //USE_SCOPE
#ifdef USE_GEN
if(htim_base->Instance==TIM6){
__TIM6_CLK_DISABLE();
}
if(htim_base->Instance==TIM7){
__TIM7_CLK_DISABLE();
}
#endif //USE_GEN
}
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM1)
{
/* USER CODE BEGIN TIM1_MspDeInit 0 */
/* USER CODE END TIM1_MspDeInit 0 */
/* Peripheral clock disable */
__TIM1_CLK_DISABLE();
/**TIM1 GPIO Configuration
PE9 ------> TIM1_CH1
*/
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_9);
/* USER CODE BEGIN TIM1_MspDeInit 1 */
/* USER CODE END TIM1_MspDeInit 1 */
}
else if(htim_base->Instance==TIM6)
{
/* USER CODE BEGIN TIM6_MspDeInit 0 */
/* USER CODE END TIM6_MspDeInit 0 */
/* Peripheral clock disable */
__TIM6_CLK_DISABLE();
/* USER CODE BEGIN TIM6_MspDeInit 1 */
/* USER CODE END TIM6_MspDeInit 1 */
}
}
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM6)
{
/* USER CODE BEGIN TIM6_MspDeInit 0 */
/* USER CODE END TIM6_MspDeInit 0 */
/* Peripheral clock disable */
__TIM6_CLK_DISABLE();
}
/* USER CODE BEGIN TIM6_MspDeInit 1 */
/* USER CODE END TIM6_MspDeInit 1 */
}
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM1)
{
/* USER CODE BEGIN TIM1_MspDeInit 0 */
/* USER CODE END TIM1_MspDeInit 0 */
/* Peripheral clock disable */
__TIM1_CLK_DISABLE();
/* Peripheral interrupt Deinit*/
/* USER CODE BEGIN TIM1:TIM1_BRK_TIM9_IRQn disable */
/**
* Uncomment the line below to disable the "TIM1_BRK_TIM9_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM1_BRK_TIM9_IRQn); */
/* USER CODE END TIM1:TIM1_BRK_TIM9_IRQn disable */
/* USER CODE BEGIN TIM1:TIM1_UP_TIM10_IRQn disable */
/**
* Uncomment the line below to disable the "TIM1_UP_TIM10_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn); */
/* USER CODE END TIM1:TIM1_UP_TIM10_IRQn disable */
HAL_NVIC_DisableIRQ(TIM1_CC_IRQn);
/* USER CODE BEGIN TIM1_MspDeInit 1 */
/* USER CODE END TIM1_MspDeInit 1 */
}
else if(htim_base->Instance==TIM4)
{
/* USER CODE BEGIN TIM4_MspDeInit 0 */
/* USER CODE END TIM4_MspDeInit 0 */
/* Peripheral clock disable */
__TIM4_CLK_DISABLE();
/* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(TIM4_IRQn);
/* USER CODE BEGIN TIM4_MspDeInit 1 */
/* USER CODE END TIM4_MspDeInit 1 */
}
else if(htim_base->Instance==TIM6)
{
/* USER CODE BEGIN TIM6_MspDeInit 0 */
/* USER CODE END TIM6_MspDeInit 0 */
/* Peripheral clock disable */
__TIM6_CLK_DISABLE();
/* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(TIM6_DAC_IRQn);
/* USER CODE BEGIN TIM6_MspDeInit 1 */
/* USER CODE END TIM6_MspDeInit 1 */
}
else if(htim_base->Instance==TIM7)
{
/* USER CODE BEGIN TIM7_MspDeInit 0 */
/* USER CODE END TIM7_MspDeInit 0 */
/* Peripheral clock disable */
__TIM7_CLK_DISABLE();
/* USER CODE BEGIN TIM7_MspDeInit 1 */
/* USER CODE END TIM7_MspDeInit 1 */
}
else if(htim_base->Instance==TIM9)
{
/* USER CODE BEGIN TIM9_MspDeInit 0 */
/* USER CODE END TIM9_MspDeInit 0 */
/* Peripheral clock disable */
__TIM9_CLK_DISABLE();
/* Peripheral interrupt Deinit*/
/* USER CODE BEGIN TIM9:TIM1_BRK_TIM9_IRQn disable */
/**
* Uncomment the line below to disable the "TIM1_BRK_TIM9_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM1_BRK_TIM9_IRQn); */
/* USER CODE END TIM9:TIM1_BRK_TIM9_IRQn disable */
/* USER CODE BEGIN TIM9_MspDeInit 1 */
/* USER CODE END TIM9_MspDeInit 1 */
}
else if(htim_base->Instance==TIM10)
{
/* USER CODE BEGIN TIM10_MspDeInit 0 */
/* USER CODE END TIM10_MspDeInit 0 */
/* Peripheral clock disable */
__TIM10_CLK_DISABLE();
/* Peripheral interrupt Deinit*/
/* USER CODE BEGIN TIM10:TIM1_UP_TIM10_IRQn disable */
/**
* Uncomment the line below to disable the "TIM1_UP_TIM10_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn); */
/* USER CODE END TIM10:TIM1_UP_TIM10_IRQn disable */
/* USER CODE BEGIN TIM10_MspDeInit 1 */
/* USER CODE END TIM10_MspDeInit 1 */
}
else if(htim_base->Instance==TIM11)
{
/* USER CODE BEGIN TIM11_MspDeInit 0 */
/* USER CODE END TIM11_MspDeInit 0 */
/* Peripheral clock disable */
__TIM11_CLK_DISABLE();
/* USER CODE BEGIN TIM11_MspDeInit 1 */
/* USER CODE END TIM11_MspDeInit 1 */
}
else if(htim_base->Instance==TIM13)
{
/* USER CODE BEGIN TIM13_MspDeInit 0 */
/* USER CODE END TIM13_MspDeInit 0 */
/* Peripheral clock disable */
__TIM13_CLK_DISABLE();
/* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(TIM8_UP_TIM13_IRQn);
/* USER CODE BEGIN TIM13_MspDeInit 1 */
/* USER CODE END TIM13_MspDeInit 1 */
}
}