Ejemplo n.º 1
0
Archivo: main.c Proyecto: Imajie/ARM
int main( void )
{
	int i;

	uart_init(9600);

	init_gpio();
	init_PWM();
	tss_init();

	__enable_interrupts();
	for( i=0; i<DELAY; i++) ;

	uart_putstr( "Initialization Complete\r\n" );

	// wait for user to press a key
	uart_putstr( "Press any key:" );
	uart_getchar();

	TSI0_DATA |= TSI_DATA_SWTS_MASK;

	while( 1 )
	{	
		uart_putnum( tss_pin9, 5 );		// 2^16 = 65536 = 5 digits
		uart_putstr( "\t" );
		uart_putnum( tss_pin10, 5 );	// 2^16 = 65536 = 5 digits
		uart_putstr( "\r\n" );

		for( i=0; i<DELAY; i++);
	}
	

	return 0;
}
Ejemplo n.º 2
0
void scheduler_add_process_from_elf_data(scheduler_t* scheduler, uint32_t length, uint8_t* data)
{
    irq_disable();
    __disable_interrupts();

    node_t* node = (node_t*) malloc(sizeof(node_t));
    node_initialize(node);

    process_t* process = (process_t*) malloc(sizeof(process_t));
    process->id = scheduler->nextProcessId;
    process->masterTable = mmu_create_master_table();
    mmu_init_process(process);
    node->member = process;

    uint32_t entryPoint = 0;
    loader_load_elf_from_data(process, length, data, &entryPoint);
    __context_init_with_entrypoint(process, entryPoint);


    scheduler->nextProcessId++;
    list_append(node, scheduler->processes);

    irq_enable();
    __enable_interrupts();
}
Ejemplo n.º 3
0
void main_matthias(void)
{
    printf("Setup kernel\n");
    setup_kernel();

    setup_device_manager();
    mount_init();

    __enable_interrupts();
    __switch_to_user_mode();

    init_mouse_handler();

    //manuel_setup_device_manager();

    play_game();
    /*int m[] = {0, 1, 2, 1, 1, 0, 2, 2, 0};
    draw_current_tictactoe(&m);

    int i;
    for(i = 5; i < 650; i+=4){
        draw_curser(i, 30, &m);
    }
*/
//    api_video_draw_raw_image( 0, 0, "/sd/Banner.raw", TRUE);

    /*draw_tictactoe();

    int p1[]  = {0, 0, 0, 1, 1, 1, 0, 0, 0};
    int p2[]  = {0, 0, 0, 1, 1, 1, 0, 0, 0};


    game_won(&p1);

    draw_tictactoe_field(1, 1, TRUE);
    draw_tictactoe_field(0, 1, FALSE);
    draw_tictactoe_field(0, 0, TRUE);
    draw_tictactoe_field(2, 2, FALSE);
    draw_tictactoe_field(1, 0, TRUE);
    draw_tictactoe_field(1,2, FALSE);
    draw_tictactoe_field(0, 2, TRUE);
    draw_tictactoe_field(2, 0, FALSE);*/

    //color_t c;
    //c.rgb = 0xFF0000FF;

    //api_video_fill_rect(c, 10, 10, 200, 200, TRUE);

    //printf("Test");
    //mmuInit();
    /*
     //Pagetables
     Pagetable masterPT = {0x00000000, 0x18000, 0x18000, MASTER, 3};
     Pagetable systemPT = {0x00000000, 0x1c000, 0x18000, COARSE, 3};
     Pagetable task1PT = {0x00400000, 0x1c400, 0x18000, COARSE, 3};
     Pagetable task2PT = {0x00400000, 0x1c800, 0x18000, COARSE, 3};
     Pagetable task3PT = {0x00400000, 0x1cc00, 0x18000, COARSE, 3};

     //Region Tables
     Region kernelRegion = {0x00000000, 4, 16, RWNA, WT, 0x00000000, &systemPT};
     Region sharedRegion = {0x00010000, 4, 8, RWRW, WT, 0x00010000, &systemPT};
     Region pageTableRegion = {0x00018000, 4, 8, RWNA, WT, 0x00018000, &systemPT};
     Region peripheralRegion = {0x10000000, 1024, 256, RWNA, cb, 0x10000000, &masterPT};

     init_MMU(kernelRegion);
     init_MMU(sharedRegion);
     init_MMU(pageTableRegion);
     init_MMU(peripheralRegion);

     //Set TTB
     asm("MCR p15,0,ttb,c2,c0,0");

     //Enabling MMU
     asm("MRC p15,0,r1,c1,c0,0");
     asm("ORR r1,r1,#0x1");
     asm("MCR p15,0,r1,c1,c0,0");


     */

    /*User Mode Cernel Mode
     unsigned int first_stack[256];
     unsigned int *first_stack_start = first_stack + 256 - 16;
     first_stack_start[0] = 0x10;
     printf("Erste\n");
     first_stack_start[1] = (unsigned int)&first;
     bwputs("Starting\n");
     printf("Zweite\n");
     activate(first_stack_start);
     printf("Dritte\n");
     while(1){
     printf("Das ist ein test2\n");
     }
     */
}
Ejemplo n.º 4
0
void msp_init(void)
{
    WDTCTL = WDTPW | WDTHOLD;

    /* change the number of wait states */
    while(FLCTL_RDBRST_CTLSTAT & FLCTL_RDBRST_CTLSTAT_BRST_STAT1);
    FLCTL_BANK0_RDCTL |= FLCTL_BANK0_RDCTL_WAIT_2;
    FLCTL_BANK1_RDCTL |= FLCTL_BANK1_RDCTL_WAIT_2;

    /* change vcore to higher voltage */
    while(PCMCTL1 & PMR_BUSY);
    PCMCTL0 = (0x695A0000 | AMR__AM_LDO_VCORE1);
    while(PCMCTL1 & PMR_BUSY);
    PCMCTL0 = (0x695A0000 | AMR__AM_DCDC_VCORE1);
    while((PCMCTL1 & PMR_BUSY) && (!(PCMCTL0 & CPM_5)));

    /* clock initialization */
    CSKEY = 0x695A;
    CSCTL0 = 0;
    CSCTL0 |= DCORSEL_5;
    CSCTL1 |= DIVS_1 | SELS_3 | SELM_3; 							// SMCLK = 24 mhz
    																// MCLK  = 48 mhz
    CSKEY = 0x0000; 												// lock the clock registers
    while((!(CSSTAT & SMCLK_READY)) && (!(CSSTAT & MCLK_READY)));	// wait for clocks to ready

    /* uart initialization */
    P2SEL0 |= (BIT2 | BIT3); 						// P2.2 = UCA1RX;
    P2SEL1 &= ~(BIT2 | BIT3); 						// P2.3 = UCA1TX;
    UCA1CTLW0 = UCSWRST;
    UCA1CTLW0 |= UCSSEL_2;
    UCA1BRW |= 1;
    UCA1MCTLW |= 0x81;
    UCA1CTLW0 &= ~UCSWRST;

    /* spi initialization */
    P9SEL0 |= (BIT4 | BIT5 | BIT6 | BIT7);			// P9.4 = UCA3STE, P9.5 = UCA3CLK
    P9SEL1 &= ~(BIT4 | BIT5 | BIT6 | BIT7); 		// P9.6 = UCA3MISO, P9.7 = UCA3MOSI
    UCA3CTLW0 = UCSWRST;
    UCA3CTLW0 |= UCMSB | UCMODE_2 | UCSYNC;
    UCA3CTLW0 &= ~UCSWRST;

	/* scheduler initialization */
    SYSTICK_STCSR  |= SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;		// enable core clock
    SYSTICK_STRVR  |= 288000-1;													// interrupt fires every 6 ms.

    /* floating-point unit initialization */
    SCB_CPACR |= (UINT32_C(0x0F) << 20);

    /* communication ports initialization */
    P6DIR &= ~BIT6;		// "go" initialization
    P6REN |= BIT6;
    P6OUT |= BIT6;
    P6IES |= BIT6;
    P6IE  |= BIT6;
    P6IFG &= ~BIT6;

    /* REMEMBER TO UNCOMMENT THIS FOR THE FINAL!
    P7DIR |= BIT3; 		// "ready" initialization
    P7DIR &= ~BIT3;
	*/

    /* remember to delete this for the final! */
    P1DIR |= BIT5;
    P1OUT &= ~BIT5;

    P2DIR |= BIT1; 		// "direction" initialization
    P2OUT &= ~BIT1;

    P6DIR &= ~BIT7;		// "emergency" initialization
    P6REN |= BIT7;
    P6OUT |= BIT7;
    P6IES |= BIT7;
    P6IE  |= BIT7;
    P6IFG &= ~BIT7;

    P10DIR |= BIT0;		// "error" initialization
    P10OUT &= ~BIT0;

    /* interrupt settings */
    NVIC_ISER0 |= (1 << ((INT_EUSCIA1 - 16) & 31)); // enable euscia1 (uart)
    NVIC_ISER0 |= (1 << ((INT_EUSCIA3 - 16) & 31));	// enable euscia3 (spi)
    NVIC_ISER1 |= (1 << ((INT_PORT6 - 16) & 31));	// enable port6 (ready signal)
    PCMCTL1 &= ~LOCKLPM5;							// unlock ports

    __enable_interrupts();							// enable interrupts
}
Ejemplo n.º 5
0
void encoderInit() {
   P1DIR &= ~(BIT0 + BIT5 + BIT6 + BIT7);
   P1REN |= BIT0 + BIT5 + BIT6 + BIT7;
   P1IE |= BIT0 + BIT5 + BIT6 + BIT7;
   __enable_interrupts();
}