interrupt(TIMER0_A0_VECTOR) __attribute__ ((naked)) timer0_a0_isr(void) {
__enter_isr();
TA0_unset(0);
int_handler(0);
__exit_isr();
}
/*
* CC2420 receive interrupt
*/
interrupt (PORT1_VECTOR) __attribute__ ((naked)) cc2420_isr(void)
{
__enter_isr();
/* Check if FIFOP signal is raising => RX interrupt */
if ((P1IFG & CC2420_FIFOP_PIN) != 0) {
P1IFG &= ~CC2420_FIFOP_PIN;
cc2420_rx_irq();
DEBUG("rx interrupt");
}
/* GIO0 is falling => check if FIFOP is high, indicating an RXFIFO overflow */
else if ((P1IFG & CC2420_GIO0_PIN) != 0) {
P1IFG &= ~CC2420_GIO0_PIN;
if (cc2420_get_fifop()) {
cc2420_rxoverflow_irq();
DEBUG("[CC2420] rxfifo overflow");
}
}
else {
puts("cc2420_isr(): unexpected IFG!");
/* Should not occur - only FIFOP and GIO0 interrupts are enabled */
}
__exit_isr();
}
static inline void isr_handler(int num)
{
__enter_isr();
isr_ctx[num].rx_cb(isr_ctx[num].arg, dev[num]->DR);
__exit_isr();
}
ISR(TIMER_ISR_CC0, isr_timer_a_cc0)
{
__enter_isr();
TIMER_BASE->CCTL[0] &= ~(TIMER_CCTL_CCIE);
isr_cb(isr_arg, 0);
__exit_isr();
}
ISR(TIMER_ISR_CCX, isr_timer_a_ccx_isr)
{
__enter_isr();
int chan = (int)(TIMER_BASE->IV >> 1);
TIMER_BASE->CCTL[chan] &= ~(CCTL_CCIE);
isr_cb(chan);
__exit_isr();
}
ISR(TIMER_ISR_CCX, isr_timer_a_ccx)
{
__enter_isr();
int chan = (int)(TIMER_IVEC->TAIV >> 1);
TIMER_BASE->CCTL[chan] &= ~(TIMER_CCTL_CCIE);
isr_cb(isr_arg, chan);
__exit_isr();
}
interrupt(TIMERA0_VECTOR) __attribute__((naked)) timer_isr_ccr0(void)
{
__enter_isr();
if (overflow_interrupt[0] == timer_round) {
timer_unset(0);
int_handler(0);
}
__exit_isr();
}
static inline void _isr(int timer, int chan)
{
__enter_isr();
timer_clear(timer, chan);
config[timer].cb(chan);
if (sched_context_switch_request) {
thread_yield();
}
__exit_isr();
}
/*************************************************************************************************
* @fn ADC12ISR
* @brief Store ADC12 conversion result. Set flag to indicate data ready.
* @param none
* @return none
*************************************************************************************************/
interrupt(ADC12_VECTOR) __attribute__((naked)) adc_isr(void)
{
__enter_isr();
switch(ADC12IV) {
case 0:
break; /* Vector 0: No interrupt */
case 2:
break; /* Vector 2: ADC overflow */
case 4:
break; /* Vector 4: ADC timing overflow */
case 6:
/* Vector 6: ADC12IFG0 */
adc12_result = ADC12MEM0; /* Move results, IFG is cleared */
adc12_data_ready = 1;
break;
case 8:
break; /* Vector 8: ADC12IFG1 */
case 10:
break; /* Vector 10: ADC12IFG2 */
case 12:
break; /* Vector 12: ADC12IFG3 */
case 14:
break; /* Vector 14: ADC12IFG4 */
case 16:
break; /* Vector 16: ADC12IFG5 */
case 18:
break; /* Vector 18: ADC12IFG6 */
case 20:
break; /* Vector 20: ADC12IFG7 */
case 22:
break; /* Vector 22: ADC12IFG8 */
case 24:
break; /* Vector 24: ADC12IFG9 */
case 26:
break; /* Vector 26: ADC12IFG10 */
case 28:
break; /* Vector 28: ADC12IFG11 */
case 30:
break; /* Vector 30: ADC12IFG12 */
case 32:
break; /* Vector 32: ADC12IFG13 */
case 34:
break; /* Vector 34: ADC12IFG14 */
default:
break;
}
__exit_isr();
}
interrupt (CC1101_VECTOR) __attribute__ ((naked)) cc110x_isr(void){
__enter_isr();
/* Check IFG */
if (RF1AIV == RF1AIV_RFIFG2) {
while (RF1AIN & BIT2);
/* discard all further interrupts */
RF1AIV = 0;
cc110x_gdo2_irq();
}
if (RF1AIV == RF1AIV_RFIFG0) {
cc110x_gdo0_irq();
RF1AIE &= ~BIT0;
}
__exit_isr();
}
interrupt(TIMER0_A1_VECTOR) __attribute__ ((naked)) timer0_a1_5_isr(void) {
__enter_isr();
short taiv = TA0IV;
short timer;
if (taiv & TAIFG) {
DEBUG("Overflow\n");
}
else {
timer = (taiv/2);
TA0_unset(timer);
int_handler(timer);
}
__exit_isr();
}
/**
* \brief the interrupt handler for UART reception
*/
interrupt(USCIAB0RX_VECTOR) __attribute__ ((naked)) usart1irq(void)
{
__enter_isr();
#ifndef MODULE_UART0
int __attribute__ ((unused)) c;
#else
int c;
#endif
/* Check status register for receive errors. */
if (UCA0STAT & UCRXERR) {
if (UCA0STAT & UCFE) {
puts("UART RX framing error");
}
if (UCA0STAT & UCOE) {
puts("UART RX overrun error");
}
if (UCA0STAT & UCPE) {
puts("UART RX parity error");
}
if (UCA0STAT & UCBRK) {
puts("UART RX break condition -> error");
}
/* Clear error flags by forcing a dummy read. */
c = UCA0RXBUF;
#ifdef MODULE_UART0
} else if (uart0_handler_pid != KERNEL_PID_UNDEF) {
/* All went well -> let's signal the reception to adequate callbacks */
c = UCA0RXBUF;
uart0_handle_incoming(c);
uart0_notify_thread();
#endif
}
__exit_isr();
}
// core logic from here could be exported to gate_telemetry.c
interrupt(ADC12_VECTOR) __attribute__((naked)) adc_handler(void)
// interrupt(ADC12_VECTOR) adc_handler(void)
{
__enter_isr();
uint16_t reading = ADC12MEM0;
if (laser.state == LASER_STARTING)
{
laser.state = LASER_READING;
}
else
{
reading = stats_ema_ui16(reading, laser.value, laser.ema_alpha);
}
// + half slot for rounding
reading = reading + (half_slot);
reading = reading - (reading % slot_size);
#if LASER_STREAM
int next_index = circ_buffer_add(&laser_stream_cib);
// int next_index = cib_put(laser_stream_cib);
// if (next_index == -1)
// {
// cib_init(laser_stream_cib, LASER_STREAM_BUFSIZE);
// next_index = cib_put(laser_stream_cib);
// }
laser_stream_buffer[next_index] = reading;
#endif
laser.value = reading;
value_changed = true;
__exit_isr();
}
interrupt(TIMERA1_VECTOR) __attribute__((naked)) timer_isr(void)
{
__enter_isr();
short taiv_reg = TAIV;
if (taiv_reg == 0x0A) {
/* TAIV = 0x0A means overflow */
DEBUG("Overflow\n");
timer_round++;
}
else {
short timer = taiv_reg >> 1;
/* check which CCR has been hit and if the overflow counter
for this timer has been reached (or exceeded);
there is indeed a race condition where an hwtimer
due to fire in the next round can be set after
the timer's counter has overflowed but *before*
timer_round incrementation has occured (when
interrupts are disabled for any reason), thus
effectively setting the timer one round in the past! */
int16_t round_delta = overflow_interrupt[timer] - timer_round;
/* in order to correctly handle timer_round overflow,
we must fire the timer when, for example,
timer_round == 0 and overflow_interrupt[timer] == 65535;
to that end, we compute the difference between the two
on a 16-bit signed integer: any difference >= +32768 will
thus overload to a negative number; we should then
correctly fire "overdue" timers whenever the case */
if (round_delta <= 0) {
timer_unset(timer);
int_handler(timer);
}
}
__exit_isr();
}
ISR(PORT2_VECTOR, isr_port2)
{
__enter_isr();
isr_handler((msp_port_isr_t *)PORT_2, 8);
__exit_isr();
}
static inline void irq_handler(uint8_t int_num)
{
__enter_isr();
config[int_num].cb(config[int_num].arg);
__exit_isr();
}
ISR(PORT1_VECTOR, isr_port1)
{
__enter_isr();
isr_handler((msp_port_isr_t *)PORT_1, 0);
__exit_isr();
}
