/* { dg-do compile { target i386*-*-* } } */
/* { dg-options "-O -gdwarf-2 -dA -msse" } */
/* { dg-require-effective-target sse } */
/* { dg-final { scan-assembler "DW_AT_const_value" } } */

typedef float FloatVect __attribute__((__vector_size__(16)));
static FloatVect Foo = { 250000000.0, 0.0, 0.0, 0.0 };
Ejemplo n.º 2
0
__m128
fn1 (float p1)
{
  return (__attribute__ ((__vector_size__ (4 * sizeof 0))) float){ p1 };
}
Ejemplo n.º 3
0
Archivo: reload-1.c Proyecto: aosm/gcc
/* APPLE LOCAL file mainline 2007-04-24 5122634 */
/* { dg-do compile { target i?86-*-* } } */
/* { dg-options "-O3 -msse2 -fdump-rtl-csa" } */
/* { dg-require-effective-target ilp32 } */
/* { dg-final { scan-rtl-dump "deleted 5 dead insns" "csa" } }*/
#include <emmintrin.h>
typedef __SIZE_TYPE__ size_t;
typedef float vFloat __attribute__ ((__vector_size__ (16)));
typedef double vDouble __attribute__ ((__vector_size__ (16)));
typedef struct buf
{
  void *data;
  unsigned long h;
  unsigned long  w;
  size_t bytes;
} buf;

typedef struct job
{
  struct Job *next;
  void * info;
  long (*func)(struct Job *job);
  long error;
} job;

typedef struct fj
{
    job hd;
    buf src;
    buf dest;
    float g;
Ejemplo n.º 4
0
/* APPLE LOCAL file 4412214, 4172200 */
/* { dg-do compile { target i?86-*-* } } */
/* { dg-options "-O3 -msse2" } */
/* { dg-final { scan-assembler-not "\tmovl\t-12\\\(%ebp\\\)" } } */
typedef long long __v2di __attribute__ ((__vector_size__ (16)));
typedef __v2di __m128i;
typedef int __v4si __attribute__ ((__vector_size__ (16)));
int _mm_cvtsi128_si32 (__m128i __A)
{
  return __builtin_ia32_vec_ext_v4si ((__v4si)__A, 0);
}

__m128i _mm_or_si128 (__m128i __A, __m128i __B)
{
  return (__m128i)__builtin_ia32_por128 ((__v2di)__A, (__v2di)__B);
}

int foo (void )
{
    __m128i result, overflowResult;
    result = _mm_or_si128 (result, overflowResult);
    return _mm_cvtsi128_si32 (result );
}

Ejemplo n.º 5
0
/* { dg-do compile } */
/* { dg-options "-O2 -msse2" } */

typedef long long __v2di __attribute__ ((__vector_size__ (16)));
typedef long long __m128i __attribute__ ((__vector_size__ (16)));

static __inline __m128i __attribute__((__always_inline__))
_mm_set_epi64x (long long __q1, long long __q0)
{
  return __extension__ (__m128i)(__v2di){ __q0, __q1 };
}

__m128i long2vector(long long __i)
{
  return _mm_set_epi64x (0, __i);
}

/* { dg-final { scan-assembler-not "movq2dq" } } */
Ejemplo n.º 6
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/* PR middle-end/37010 */
/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
/* { dg-options "-msse2 -mpreferred-stack-boundary=2" } */
/* { dg-require-effective-target sse2_runtime } */

#include <emmintrin.h>

typedef __PTRDIFF_TYPE__ ptrdiff_t;
typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
typedef int aligned __attribute__((aligned(16)));

extern void abort (void);

__m128 r;

int
__attribute__ ((noinline))
check_int (int *i, int align)
{
  *i = 20;
  if ((((ptrdiff_t) i) & (align - 1)) != 0)
    {
      abort ();
    }
  return *i;
}

void
__attribute__ ((noinline))
foo (__m128 x, __m128 y ,__m128 z ,__m128 a, int size)
{
// RUN: %clang_cc1 -triple x86_64-windows-msvc -emit-llvm -o - %s | FileCheck %s
typedef float TooLargeAlignment __attribute__((__vector_size__(64)));
typedef float NormalAlignment __attribute__((__vector_size__(4)));

TooLargeAlignment TooBig;
// CHECK: @TooBig = dso_local global <16 x float>  zeroinitializer, align 64
NormalAlignment JustRight;
// CHECK: @JustRight = common dso_local global <1 x float>  zeroinitializer, align 4

TooLargeAlignment *IsAPointer;
// CHECK: @IsAPointer = common dso_local global <16 x float>* null, align 8
Ejemplo n.º 8
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/* { dg-do compile } */
/* { dg-options "-O2 -mmmx" } */
/* { dg-final { scan-assembler-not "paddb" } } */

typedef int v2si __attribute__ ((__vector_size__ (8)));
typedef short v4hi __attribute__ ((__vector_size__ (8)));
typedef char v8qi __attribute__ ((__vector_size__ (8)));

int
foo (unsigned int *a, unsigned int *b)
{
  long long i, j, k;

  i = (long long) __builtin_ia32_vec_init_v2si (*a, 0);
  j = (long long) __builtin_ia32_vec_init_v2si (*b, 0);
  i = (long long) __builtin_ia32_punpcklbw ((v8qi) i, (v8qi) 0ll);
  j = (long long) __builtin_ia32_punpcklbw ((v8qi) j, (v8qi) 0ll);
  k = (long long) __builtin_ia32_paddw ((v4hi) i, (v4hi) j);
  return __builtin_ia32_vec_ext_v2si ((v2si) k, 0);
}
Ejemplo n.º 9
0
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * 
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <wmmintrin.h>

#include "solver.h"

/*
 * Bounds type.
 */
typedef num_t bounds_t __attribute__((__vector_size__(16)));
#define L           0
#define U           1

/*
 * Bounds info.
 */
struct boundsinfo_s
{
    bounds_t bs;
    cons_t lb;
    cons_t ub;
    proplist_t delays;
};
typedef struct boundsinfo_s *boundsinfo_t;
Ejemplo n.º 10
0
/* PR debug/83621 */
/* { dg-do compile } */
/* { dg-options "-O -g" } */
/* { dg-additional-options "-fno-common" { target hppa*-*-hpux* } } */

typedef int __attribute__ ((__vector_size__ (64))) V;
V v;

void
foo ()
{
  V u = v >> 1;
}
struct NonAggr4 {
  int m;
  virtual void f();
};

NonAggr1 na1 = { 17 }; // expected-error{{non-aggregate type 'NonAggr1' cannot be initialized with an initializer list}}
NonAggr2 na2 = { 17 }; // expected-error{{non-aggregate type 'NonAggr2' cannot be initialized with an initializer list}}
NonAggr3 na3 = { 17 }; // expected-error{{non-aggregate type 'NonAggr3' cannot be initialized with an initializer list}}
NonAggr4 na4 = { 17 }; // expected-error{{non-aggregate type 'NonAggr4' cannot be initialized with an initializer list}}

// PR5817
typedef int type[][2];
const type foo = {0};

// Vector initialization.
typedef short __v4hi __attribute__ ((__vector_size__ (8)));
__v4hi v1 = { (void *)1, 2, 3 }; // expected-error {{cannot initialize a vector element of type 'short' with an rvalue of type 'void *'}}

// Array initialization.
int a[] = { (void *)1 }; // expected-error {{cannot initialize an array element of type 'int' with an rvalue of type 'void *'}}

// Struct initialization.
struct S { int a; } s = { (void *)1 }; // expected-error {{cannot initialize a member subobject of type 'int' with an rvalue of type 'void *'}}

// Check that we're copy-initializing the structs.
struct A {
  A();
  A(int);
  ~A();
  
  A(const A&) = delete; // expected-note 2 {{function has been explicitly marked deleted here}}
Ejemplo n.º 12
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/* PR target/79568 */
/* { dg-do compile } */
/* { dg-options "-mno-avx512vl -mavx512bw -O2" } */

#pragma GCC push_options
#pragma GCC target ("avx512vl,avx512bw")
void
foo (char *x, char __attribute__ ((__vector_size__(32))) *y, int z)
{
  __builtin_ia32_storedquqi256_mask (x, *y, z);
}
#pragma GCC pop_options

void
bar (char *x, char __attribute__ ((__vector_size__(32))) *y, int z)
{
  __builtin_ia32_storedquqi256_mask (x, *y, z); /* { dg-error "needs isa option" } */
}
Ejemplo n.º 13
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// This likely can't be fixed, and makes it clear that we must provide an edited version of the avxintrin.h header file.

typedef double my__m256d __attribute__ ((__vector_size__ (32), __may_alias__));

extern __inline my__m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_setzero_pd (void)
   {
  // EDG can't handle this code with 4 initializers.  Only one initializer is accepted.
  // return __extension__ (my__m256d){ 0.0, 0.0, 0.0, 0.0 };
     return __extension__ (my__m256d){ 0.0 };
   }
Ejemplo n.º 14
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// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fsyntax-only -verify %s
typedef char char16 __attribute__ ((__vector_size__ (16)));
typedef long long longlong16 __attribute__ ((__vector_size__ (16)));
typedef char char16_e __attribute__ ((__ext_vector_type__ (16)));
typedef long long longlong16_e __attribute__ ((__ext_vector_type__ (2)));

// Test overloading and function calls with vector types.
void f0(char16);

void f0_test(char16 c16, longlong16 ll16, char16_e c16e, longlong16_e ll16e) {
    f0(c16);
    f0(ll16);
    f0(c16e);
    f0(ll16e);
}

int &f1(char16); // expected-note 2{{candidate function}}
float &f1(longlong16); // expected-note 2{{candidate function}}

void f1_test(char16 c16, longlong16 ll16, char16_e c16e, longlong16_e ll16e) {
    int &ir1 = f1(c16);
    float &fr1 = f1(ll16);
    f1(c16e); // expected-error{{call to 'f1' is ambiguous}}
    f1(ll16e); // expected-error{{call to 'f1' is ambiguous}}
}

void f2(char16_e); // expected-note{{no known conversion from 'longlong16_e' to 'char16_e' for 1st argument}} \
// expected-note{{candidate function not viable: no known conversion from 'convertible_to<longlong16_e>' to 'char16_e' for 1st argument}}

void f2_test(char16 c16, longlong16 ll16, char16_e c16e, longlong16_e ll16e) {
    f2(c16);
Ejemplo n.º 15
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/* Test that we generate aligned load when memory is aligned.  */
/* { dg-do compile } */
/* { dg-options "-O -mavx -mtune=generic" } */
/* { dg-final { scan-assembler-not "movups" } } */
/* { dg-final { scan-assembler "movaps" } } */

typedef float v8sf __attribute__ ((__vector_size__ (32)));

extern void foo (int, int, int, int, int, int, int, v8sf, v8sf, v8sf, v8sf, v8sf, v8sf, v8sf, v8sf, v8sf);

int
test (void)
{
  v8sf x = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0 };

  foo (1, 2, 3, 4, 5, 6, 7, x, x, x, x, x, x, x, x, x);
  return 0;
}
Ejemplo n.º 16
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/* { dg-do compile { target { powerpc64le-*-* } } } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
/* { dg-options "-mcpu=power8 -O3" } */
/* { dg-final { scan-assembler "xxsldwi \[0-9\]*,\[0-9\]*,\[0-9\]*,3" } } */
/* { dg-final { scan-assembler-not "xxpermdi" } } */

/* This test verifies that a vector extract operand properly has its
   lane changed by the swap optimization.  Element 2 of LE corresponds
   to element 1 of BE.  When doublewords are swapped, this becomes
   element 3 of BE, so we need to shift the vector left by 3 words
   to be able to extract the correct value from BE element zero.  */

typedef float  v4f32 __attribute__ ((__vector_size__ (16)));

void foo (float);
extern v4f32 x, y;

int main() {
  v4f32 z = x + y;
  foo (z[2]);
}
Ejemplo n.º 17
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/* { dg-do run } */ 
/* { dg-require-effective-target vect_float } */
/* { dg-additional-options "-fdump-rtl-combine-details" } */

extern void abort (void);

#define NOINLINE __attribute__((noinline))

typedef float float32x4_t __attribute__ ((__vector_size__ (16)));
typedef float float32x2_t __attribute__ ((__vector_size__ (8)));

NOINLINE float
foo32x4_be (float32x4_t x)
{
  return x[3];
}

NOINLINE float
foo32x4_le (float32x4_t x)
{
  return x[0];
}

NOINLINE float
bar (float a)
{
  return a;
}

NOINLINE float
foo32x2_be (float32x2_t x)
Ejemplo n.º 18
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/* { dg-do compile } */
/* { dg-options "-mavx -fsplit-stack -mtune=generic" } */
/* { dg-require-effective-target split_stack } */

typedef char __m256 __attribute__ ((__vector_size__ (32)));
void foo (__m256 x) {}
Ejemplo n.º 19
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short sv, sx;
unsigned short usv, usx;
int iv, ix;
unsigned int uiv, uix;
long lv, lx;
unsigned long ulv, ulx;
long long llv, llx;
unsigned long long ullv, ullx;
float fv, fx;
double dv, dx;
long double ldv, ldx;
_Complex int civ, cix;
_Complex float cfv, cfx;
_Complex double cdv, cdx;

typedef int int4 __attribute__((__vector_size__(16)));
int4 int4x;

struct BitFields {
  int : 32;
  int a : 31;
} bfx;

struct BitFields_packed {
  int : 32;
  int a : 31;
} __attribute__ ((__packed__)) bfx_packed;

struct BitFields2 {
  int : 31;
  int a : 1;
/* { dg-options "-mgeneral-regs-only" } */

#include <stdarg.h>

typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));

int
test (int i, ...)
{
  va_list argp;
  va_start (argp, i);
  int32x2_t x = (int32x2_t) {0, 1};
  x += va_arg (argp, int32x2_t); /* { dg-error "'-mgeneral-regs-only' is incompatible with the use of vector types" } */
  return x[0] + x[1];
}
Ejemplo n.º 21
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Archivo: bcd-2.c Proyecto: 0day-ci/gcc
/* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
/* { dg-options "-mcpu=power8 -O2" } */
/* { dg-final { scan-assembler-times "bcdadd\[.\] " 2 } } */
/* { dg-final { scan-assembler-times "bcdsub\[.\] " 2 } } */
/* { dg-final { scan-assembler-not   "bl __builtin"   } } */
/* { dg-final { scan-assembler-not   "mtvsr"   	      } } */
/* { dg-final { scan-assembler-not   "mfvsr"   	      } } */
/* { dg-final { scan-assembler-not   "lvx"     	      } } */
/* { dg-final { scan-assembler-not   "lxvw4x"  	      } } */
/* { dg-final { scan-assembler-not   "lxvd2x"  	      } } */
/* { dg-final { scan-assembler-not   "stvx"    	      } } */
/* { dg-final { scan-assembler-not   "stxvw4x" 	      } } */
/* { dg-final { scan-assembler-not   "stxvd2x" 	      } } */

typedef __int128_t __attribute__((__vector_size__(16)))	vector_128_t;
typedef __int128_t					scalar_128_t;
typedef	unsigned long long				scalar_64_t;

vector_128_t
do_add_0 (vector_128_t a, vector_128_t b)
{
  return __builtin_bcdadd (a, b, 0);
}

vector_128_t
do_add_1 (vector_128_t a, vector_128_t b)
{
  return __builtin_bcdadd (a, b, 1);
}
Ejemplo n.º 22
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
// Library General Public License for more details.
// 
// You should have received a copy of the GNU Library General Public
// License along with this library; if not, write to the
// Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
// Boston, MA  02110-1301, USA.
// 


//
// SHA-256 RFC 4634 (ish)
//

typedef unsigned int vecu16 __attribute__((__vector_size__(16 * sizeof(int))));

inline vecu16 CH(vecu16 x, vecu16 y, vecu16 z)
{
	return (x & y) ^ (~x & z);
}

inline vecu16 MA(vecu16 x, vecu16 y, vecu16 z)
{
	return (x & y) ^ (x & z) ^ (y & z);
}

inline vecu16 ROTR(vecu16 x, int y)
{
	return (x >> __builtin_vp_makevectori(y)) | (x << (__builtin_vp_makevectori(32 - y)));
}
Ejemplo n.º 23
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// RUN: %llvmgcc %s -S -o - | grep bitcast | count 14

typedef float vFloat __attribute__ ((__vector_size__ (16)));
typedef unsigned int vUInt32 __attribute__ ((__vector_size__ (16)));
void foo(vFloat *X) {
  vFloat NoSignBit = (vFloat) ~ (vUInt32) (vFloat) { -0.f, -0.f, -0.f, -0.f };
  vFloat ExtremeValue = *X & NoSignBit;
  *X = ExtremeValue;
}

void bar(vFloat *X) {
  vFloat NoSignBit = (vFloat) ~ (vUInt32) (vFloat) { -0.f, -0.f, -0.f, -0.f };
  vFloat ExtremeValue = *X & ~NoSignBit;
  *X = ExtremeValue;
}
Ejemplo n.º 24
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/* { dg-do compile } */
/* { dg-options "-O2 -Wall" } */

typedef double vectype __attribute__ ((__vector_size__ (16)));

vectype
f (double x)
{
  vectype t;
  for (int i = 0; i < 2; i++)
    t[i] = x; /* { dg-bogus "uninitialized" } */
  return t;
}
Ejemplo n.º 25
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/* { dg-do compile } */
/* { dg-options "-O2 -ffast-math" } */
/* { dg-prune-output "non-standard ABI extension" } */
/* { dg-additional-options "-fno-common" { target hppa*-*-hpux* } } */
/* { dg-additional-options "-msse" { target { i?86-*-* x86_64-*-* } } } */

typedef float __m128 __attribute__ ((__vector_size__ (16)));
__m128 a, d, e;
int b;
struct dt_interpolation c;
__m128
fn1 (float p1)
{
  return (__attribute__ ((__vector_size__ (4 * sizeof 0))) float){ p1 };
}
__m128
fn2 (float p1)
{
  return fn1 (p1);
}
struct dt_interpolation
{
  int width;
};
void
fn3 (struct dt_interpolation *p1, int *p2)
{
  int i = 0, n = 0;
  while (i < 2 * p1->width)
    n = i++;
  *p2 = n;
Ejemplo n.º 26
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/* PR target/51968 */
/* { dg-do compile } */
/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */
/* { dg-require-effective-target arm_neon_ok } */

typedef __builtin_neon_qi int8x8_t __attribute__ ((__vector_size__ (8)));
typedef __builtin_neon_uqi uint8x8_t __attribute__ ((__vector_size__ (8)));
typedef __builtin_neon_qi int8x16_t __attribute__ ((__vector_size__ (16)));
typedef __builtin_neon_hi int16x8_t __attribute__ ((__vector_size__ (16)));
typedef __builtin_neon_si int32x4_t __attribute__ ((__vector_size__ (16)));
struct T { int8x8_t val[2]; };
int y;

void
foo (int8x8_t z, int8x8_t x, int16x8_t b, int8x8_t n)
{
  if (y)
    {
      struct T m;
      __builtin_neon_vuzpv8qi (&m.val[0], z, x);
    }
  for (;;)
    {
      int8x16_t g;
      int8x8_t h, j, k;
      struct T m;
      j = __builtin_neon_vqmovunv8hi (b, 1);
      g = __builtin_neon_vcombinev8qi (j, h);
      k = __builtin_neon_vget_lowv16qi (g);
      __builtin_neon_vuzpv8qi (&m.val[0], k, n);
    }
Ejemplo n.º 27
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/* Test that the compiler properly optimizes vector shift instructions into
   psha/pshl on XOP systems.  */

/* { dg-do compile { target { ! ia32 } } } */
/* { dg-options "-O2 -mxop -mno-avx2 -ftree-vectorize" } */

extern void exit (int);

typedef long __m128i  __attribute__ ((__vector_size__ (16), __may_alias__));

#define SIZE 10240

union {
  __m128i i_align;
  int i32[SIZE];
  unsigned u32[SIZE];
} a, b, c;

void
right_sign_shift32 (void)
{
  int i;

  for (i = 0; i < SIZE; i++)
    a.i32[i] = b.i32[i] >> c.i32[i];
}

int main ()
{
  right_sign_shift32 ();
  exit (0);
Ejemplo n.º 28
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/* PR target/59794 */
/* { dg-do compile { target { ia32 } } } */
/* { dg-options "-O2 -mno-mmx" } */
/* { dg-skip-if "no MMX vector" { *-*-mingw* } } */

typedef int __v2si __attribute__ ((__vector_size__ (8)));

extern __v2si x;

extern void bar (__v2si);
void
foo (void)
{
  bar (x); /* { dg-message "warning: MMX vector argument without MMX enabled changes the ABI" } */
}
Ejemplo n.º 29
0
    // CHECK-NOT: and i32 %{{.*}} -8
    double ll = __builtin_va_arg(ap, double);
    __builtin_va_end(ap);
    return ll;
}

#include <arm_neon.h>

// Homogeneous Vector Aggregate as return type and argument type.
// CHECK: define %struct.int8x16x2_t @f0_0(<16 x i8> %{{.*}}, <16 x i8> %{{.*}})
int8x16x2_t f0_0(int8x16_t a0, int8x16_t a1) {
  return vzipq_s8(a0, a1);
}

// Test direct vector passing.
typedef float T_float32x2 __attribute__ ((__vector_size__ (8)));
typedef float T_float32x4 __attribute__ ((__vector_size__ (16)));
typedef float T_float32x8 __attribute__ ((__vector_size__ (32)));
typedef float T_float32x16 __attribute__ ((__vector_size__ (64)));

// CHECK: define <2 x float> @f1_0(<2 x float> %{{.*}})
T_float32x2 f1_0(T_float32x2 a0) { return a0; }
// CHECK: define <4 x float> @f1_1(<4 x float> %{{.*}})
T_float32x4 f1_1(T_float32x4 a0) { return a0; }
// Vector with length bigger than 16-byte is illegal and is passed indirectly.
// CHECK: define void @f1_2(<8 x float>* noalias sret  %{{.*}}, <8 x float>*)
T_float32x8 f1_2(T_float32x8 a0) { return a0; }
// CHECK: define void @f1_3(<16 x float>* noalias sret %{{.*}}, <16 x float>*)
T_float32x16 f1_3(T_float32x16 a0) { return a0; }

// Testing alignment with aggregates: HFA, aggregates with size <= 16 bytes and
Ejemplo n.º 30
0
// RUN: %clang_cc1 -fsyntax-only -verify %s
typedef int __v2si __attribute__((__vector_size__(8)));
typedef short __v4hi __attribute__((__vector_size__(8)));
typedef short __v8hi __attribute__((__vector_size__(16)));
typedef short __v3hi __attribute__((__ext_vector_type__(3)));

struct S { }; // expected-note 2 {{candidate constructor}}

void f() {
  __v2si v2si;
  __v4hi v4hi;
  __v8hi v8hi;
  unsigned long long ll;
  unsigned char c;
  S s;
  
  (void)reinterpret_cast<__v2si>(v4hi);
  (void)(__v2si)v4hi;
  (void)reinterpret_cast<__v4hi>(v2si);
  (void)(__v4hi)v2si;
  (void)reinterpret_cast<unsigned long long>(v2si);
  (void)(unsigned long long)v2si;
  (void)reinterpret_cast<__v2si>(ll);
  (void)(__v2si)(ll);

  (void)reinterpret_cast<S>(v2si); // expected-error {{reinterpret_cast from '__v2si' (vector of 2 'int' values) to 'S' is not allowed}}
  (void)(S)v2si; // expected-error {{no matching conversion for C-style cast from '__v2si' (vector of 2 'int' values) to 'S'}}
  (void)reinterpret_cast<__v2si>(s); // expected-error {{reinterpret_cast from 'S' to '__v2si' (vector of 2 'int' values) is not allowed}}
  (void)(__v2si)s; // expected-error {{cannot convert 'S' to '__v2si' (vector of 2 'int' values) without a conversion operator}}
  
  (void)reinterpret_cast<unsigned char>(v2si); // expected-error {{reinterpret_cast from vector '__v2si' (vector of 2 'int' values) to scalar 'unsigned char' of different size}}