Ejemplo n.º 1
0
static int alt_fpga_bridge_probe(struct platform_device *pdev)
{
	struct altera_hps2fpga_data *priv;
	const struct of_device_id *of_id;
	struct device *dev = &pdev->dev;
	uint32_t init_val;
	int rc;
	struct clk *clk;

	of_id = of_match_device(altera_fpga_of_match, dev);
	priv = (struct altera_hps2fpga_data *)of_id->data;
	WARN_ON(!priv);

	priv->np = dev->of_node;
	priv->pdev = pdev;

	priv->bridge_reset = devm_reset_control_get(dev, priv->name);
	if (IS_ERR(priv->bridge_reset)) {
		dev_err(dev, "Could not get %s reset control!\n", priv->name);
		return PTR_ERR(priv->bridge_reset);
	}

	priv->l3reg = syscon_regmap_lookup_by_compatible("altr,l3regs");
	if (IS_ERR(priv->l3reg)) {
		dev_err(dev, "regmap for altr,l3regs lookup failed.\n");
		return PTR_ERR(priv->l3reg);
	}

	clk = of_clk_get(pdev->dev.of_node, 0);
	if (IS_ERR(clk)) {
		dev_err(dev, "no clock specified\n");
		return PTR_ERR(clk);
	}

	rc = clk_prepare_enable(clk);
	if (rc) {
		dev_err(dev, "could not enable clock\n");
		return -EBUSY;
	}

	rc = register_fpga_bridge(pdev, &altera_hps2fpga_br_ops,
				    priv->name, priv);
	if (rc)
		return rc;

	if (of_property_read_u32(priv->np, "init-val", &init_val))
		dev_info(&priv->pdev->dev, "init-val not specified\n");
	else if (init_val > 1)
		dev_warn(&priv->pdev->dev, "invalid init-val %u > 1\n",
			init_val);
	else {
		dev_info(&priv->pdev->dev, "%s bridge\n",
			(init_val ? "enabling" : "disabling"));

		_alt_hps2fpga_enable_set(priv, init_val);
	}

	return rc;
}
Ejemplo n.º 2
0
static int alt_fpga_bridge_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct altera_hps2fpga_data *priv;
	const struct of_device_id *of_id;
	u32 enable;
	int ret;

	of_id = of_match_device(altera_fpga_of_match, dev);
	priv = (struct altera_hps2fpga_data *)of_id->data;

	priv->bridge_reset = of_reset_control_get_by_index(dev->of_node, 0);
	if (IS_ERR(priv->bridge_reset)) {
		dev_err(dev, "Could not get %s reset control\n", priv->name);
		return PTR_ERR(priv->bridge_reset);
	}

	if (priv->remap_mask) {
		priv->l3reg = syscon_regmap_lookup_by_compatible("altr,l3regs");
		if (IS_ERR(priv->l3reg)) {
			dev_err(dev, "regmap for altr,l3regs lookup failed\n");
			return PTR_ERR(priv->l3reg);
		}
	}

	priv->clk = devm_clk_get(dev, NULL);
	if (IS_ERR(priv->clk)) {
		dev_err(dev, "no clock specified\n");
		return PTR_ERR(priv->clk);
	}

	ret = clk_prepare_enable(priv->clk);
	if (ret) {
		dev_err(dev, "could not enable clock\n");
		return -EBUSY;
	}

	spin_lock_init(&l3_remap_lock);

	if (!of_property_read_u32(dev->of_node, "bridge-enable", &enable)) {
		if (enable > 1) {
			dev_warn(dev, "invalid bridge-enable %u > 1\n", enable);
		} else {
			dev_info(dev, "%s bridge\n",
				 (enable ? "enabling" : "disabling"));

			ret = _alt_hps2fpga_enable_set(priv, enable);
			if (ret) {
				fpga_bridge_unregister(&pdev->dev);
				return ret;
			}
		}
	}

	return fpga_bridge_register(dev, priv->name, &altera_hps2fpga_br_ops,
				    priv);
}
Ejemplo n.º 3
0
static int alt_hps2fpga_enable_set(struct fpga_bridge *bridge, bool enable)
{
	return _alt_hps2fpga_enable_set(bridge->priv, enable);
}
Ejemplo n.º 4
0
static void alt_hps2fpga_enable_set(struct fpga_bridge *bridge, bool enable)
{
	_alt_hps2fpga_enable_set(bridge->priv, enable);
}