uint32_t _kuart_mix_deinit
(
/* [IN] the interrupt I/O initialization information */
KUART_INIT_STRUCT_PTR io_init_ptr,
/* [IN] the address of the device specific information */
KUART_INFO_STRUCT_PTR io_info_ptr
)
{ /* Body */
if (!io_info_ptr)
return MQX_INVALID_PARAMETER;
if (io_info_ptr->LW_TIMER_PTR) {
_lwtimer_cancel_period(io_info_ptr->LW_TIMER_PTR);
_mem_free(io_info_ptr->LW_TIMER_PTR);
}
dma_request_disable(io_info_ptr->RX_DCH);
dma_channel_release(io_info_ptr->RX_DCH);
_kuart_polled_deinit(io_init_ptr, io_info_ptr);
if (io_info_ptr->RX_BUF)
_mem_free(io_info_ptr->RX_BUF);
_int_install_isr(io_info_ptr->ERR_INT, io_info_ptr->OLD_ISR_ERR, io_info_ptr->OLD_ISR_ERR_DATA);
_int_install_isr(io_init_ptr->RX_TX_VECTOR, io_info_ptr->OLD_ISR_TXRX, io_info_ptr->OLD_ISR_TXRX_DATA);
return(MQX_OK);
} /* Endbody */
_mqx_uint _bsp_io_pcb_shm_int_install
(
/* [IN] the initialization record for this device */
IO_PCB_SHM_INIT_STRUCT_PTR init_ptr,
/* [IN] the context record for this device */
IO_PCB_SHM_INFO_STRUCT_PTR info_ptr
)
{
if (!_int_install_isr(init_ptr->RX_VECTOR, _bsp_io_pcb_shm_rx_isr, info_ptr))
{
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
/* Install the tx finished ISR */
if (!_int_install_isr(init_ptr->TX_VECTOR, _bsp_io_pcb_shm_tx_isr, info_ptr))
{
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
/* clear all inter-core interrupts */
MSCM_IRCP0IR = (1 << (info_ptr->INIT.RX_VECTOR - GIC_CPU_to_CPU_int0));
MSCM_IRCP0IR = (1 << (info_ptr->INIT.TX_VECTOR - GIC_CPU_to_CPU_int0));
MSCM_IRCP1IR = (1 << (info_ptr->INIT.REMOTE_RX_VECTOR - NVIC_CPU_to_CPU_int0));
MSCM_IRCP1IR = (1 << (info_ptr->INIT.REMOTE_TX_VECTOR - NVIC_CPU_to_CPU_int0));
_bsp_int_init(init_ptr->RX_VECTOR, BSPCFG_IO_PCB_SHM_RX_PRIO, 0, TRUE);
_bsp_int_init(init_ptr->TX_VECTOR, BSPCFG_IO_PCB_SHM_TX_PRIO, 0 , TRUE);
return MQX_OK;
}
_mqx_uint _bsp_io_pcb_shm_int_install
(
/* [IN] the initialization record for this device */
IO_PCB_SHM_INIT_STRUCT_PTR init_ptr,
/* [IN] the context record for this device */
IO_PCB_SHM_INFO_STRUCT_PTR info_ptr
)
{
if (!_int_install_isr(init_ptr->RX_VECTOR, _bsp_io_pcb_shm_rx_isr, info_ptr))
{
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
/* Install the tx finished ISR */
if (!_int_install_isr(init_ptr->TX_VECTOR, _bsp_io_pcb_shm_tx_isr, info_ptr))
{
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
_qintc_set_prio(init_ptr->RX_VECTOR, BSPCFG_IO_PCB_SHM_RX_PRIO);
_qintc_set_prio(init_ptr->TX_VECTOR, BSPCFG_IO_PCB_SHM_TX_PRIO);
return MQX_OK;
}
uint_32 _kuart_int_init
(
/* [IN] the interrupt I/O initialization information */
IO_SERIAL_INT_DEVICE_STRUCT_PTR int_io_dev_ptr,
/* [IN] the rest of the name of the device opened */
char _PTR_ open_name_ptr
)
{ /* Body */
KUART_INFO_STRUCT_PTR sci_info_ptr;
KUART_INIT_STRUCT_PTR sci_init_ptr;
uint_32 result;
sci_init_ptr = int_io_dev_ptr->DEV_INIT_DATA_PTR;
result = _kuart_polled_init((pointer)sci_init_ptr, &int_io_dev_ptr->DEV_INFO_PTR, open_name_ptr);
if (result != MQX_OK) {
return(result);
}/* Endif */
sci_info_ptr = int_io_dev_ptr->DEV_INFO_PTR;
/* wk */
UART_MemMapPtr sci_ptr = sci_info_ptr->SCI_PTR;
sci_ptr->C2 &= 0x77;
/* end */
sci_info_ptr->OLD_ISR_DATA = _int_get_isr_data(sci_init_ptr->RX_TX_VECTOR);
sci_info_ptr->OLD_ISR_EXCEPTION_HANDLER = _int_get_exception_handler(sci_init_ptr->RX_TX_VECTOR);
/* wk */
sci_ptr->C2 &= 0x77;
/* end */
/* Init RX/TX interrupt vector */
sci_info_ptr->OLD_ISR =
// _int_install_isr(sci_init_ptr->RX_TX_VECTOR, _kuart_int_rx_tx_isr, int_io_dev_ptr);
_int_install_isr(sci_init_ptr->RX_TX_VECTOR, uart_isr, int_io_dev_ptr); // wk
/* wk */
sci_ptr->C2 &= 0x77;
/* end */
#if defined (BSP_TWRMCF51FD) || defined (BSP_TWRMCF51JF) || defined (BSP_TWRMCF51QM)
#else
/* Init RX interrupt vector */
sci_info_ptr->OLD_ISR =
_int_install_isr(sci_init_ptr->ERR_VECTOR, _kuart_int_err_isr, int_io_dev_ptr);
_cortex_int_init(sci_init_ptr->RX_TX_VECTOR, sci_init_ptr->RX_TX_PRIORITY, TRUE);
_cortex_int_init(sci_init_ptr->ERR_VECTOR, sci_init_ptr->ERR_PRIORITY, TRUE);
#endif
return(MQX_OK);
} /* Endbody */
_mqx_int _io_pcb_shm_close
(
/* [IN] the file handle */
FILE_DEVICE_STRUCT_PTR fd_ptr
)
{
IO_PCB_SHM_INFO_STRUCT_PTR info_ptr;
IO_PCB_STRUCT_PTR pcb_ptr;
IO_PCB_SHM_INIT_STRUCT_PTR init_ptr;
#if MQX_CHECK_ERRORS
if (!(fd_ptr->FLAGS & IO_FLAG_IS_PCB_DEVICE)) {
fd_ptr->ERROR = IO_PCB_NOT_A_PCB_DEVICE;
return(IO_ERROR);
}
#endif
info_ptr = (IO_PCB_SHM_INFO_STRUCT_PTR)fd_ptr->DEV_DATA_PTR;
init_ptr = &info_ptr->INIT;
if (!_int_install_isr(init_ptr->RX_VECTOR,
info_ptr->RX_OLDISR_PTR, info_ptr->RX_OLDISR_DATA))
{
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
if (init_ptr->TX_VECTOR) {
if (!_int_install_isr(init_ptr->TX_VECTOR, info_ptr->TX_OLDISR_PTR,
info_ptr->TX_OLDISR_DATA))
{
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
}
_lwsem_destroy(&info_ptr->READ_LWSEM);
_lwsem_destroy(&info_ptr->WRITE_LWSEM);
while (_queue_get_size(&info_ptr->WRITE_QUEUE)) {
pcb_ptr = (IO_PCB_STRUCT_PTR)
((pointer)_queue_dequeue(&info_ptr->WRITE_QUEUE));
_io_pcb_free(pcb_ptr);
}
while (_queue_get_size(&info_ptr->READ_QUEUE)) {
pcb_ptr = (IO_PCB_STRUCT_PTR)
((pointer)_queue_dequeue(&info_ptr->READ_QUEUE));
_io_pcb_free(pcb_ptr);
}
return(MQX_OK);
}
uint_32 _e200_decrementer_timer_install
(
/* [IN] the tick rate wanted */
uint_32 tickfreq,
/* [IN] Input clock frequency */
uint_32 clk
)
{
uint_32 period;
/* Set up tick timer */
period = _e200_decrementer_timer_init(tickfreq, clk);
if (period == 0) {
return MQX_TIMER_ISR_INSTALL_FAIL;
}
/* Install the decrementer interrupt handler */
if (_int_install_isr(PSP_EXCPT_DECREMENTER, _e200_decrementer_kernel_isr, NULL) == NULL)
{
return _task_get_error();
}
/* Initialize the timer interrupt */
_time_set_timer_vector(PSP_EXCPT_DECREMENTER);
_time_set_hwtick_function(_e200_decrementer_get_hwticks, (pointer)period);
_time_set_hwticks_per_tick(period);
_time_set_ticks_per_sec(tickfreq);
return MQX_OK;
}
_mqx_int gpio_cpu_init()
{ /* Body */
if (_int_install_isr(MCF51CN_INT_Vkeyboard, gpio_kbi_irq, 0) == NULL)
return IO_ERROR; /* cannot install interrupt routine */
return IO_OK;
} /* Endbody */
uint_32 _qintc_install
(
/* [IN] interrupt controller base address */
VQINTC_REG_STRUCT_PTR base,
/* [IN] external vector/exception number */
int vector
)
{
#if PSP_HAS_DEVICE_PROTECTION
if (!_bsp_qintc_enable_access()) {
return MQX_INVALID_DEVICE;
}
#endif
_qintc_init(base, 0);
/* Install the decrementer interrupt handler */
if (_int_install_isr(vector, _qintc_external_isr, (pointer)base) == NULL)
{
return _task_get_error();
}
return MQX_OK;
}
/*FUNCTION****************************************************************
*
* Function Name : FLEXCAN_Install_isr_wake_int
* Returned Value : uint32_t
* Comments :
* This function installs interrupt handler for a flexcan wake-up
*
*END*********************************************************************/
uint32_t FLEXCAN_Install_isr_wake_int
(
/* [IN] FlexCAN device number */
uint8_t dev_num,
/* [IN] Interrupt service routine */
INT_ISR_FPTR isr
)
{
uint32_t return_code = FLEXCAN_OK;
INT_ISR_FPTR result;
volatile FLEXCAN_REG_STRUCT_PTR can_reg_ptr;
volatile PSP_INTERRUPT_TABLE_INDEX index;
can_reg_ptr = _bsp_get_flexcan_base_address (dev_num);
if (NULL == can_reg_ptr)
{
return (FLEXCAN_INVALID_ADDRESS);
}
index = _bsp_get_flexcan_vector (dev_num, FLEXCAN_INT_WAKEUP, 0);
if (0 == index)
{
return (FLEXCAN_INT_INSTALL_FAILED);
}
result = _int_install_isr (index, isr, (void *)can_reg_ptr);
if(result == (INT_ISR_FPTR)NULL)
{
return_code = _task_get_error();
}
return return_code;
}
/*FUNCTION****************************************************************
*
* Function Name : _dspi_deinit
* Returned Value : MQX error code
* Comments :
* This function de-initializes the SPI module
*
*END*********************************************************************/
static _mqx_int _dspi_deinit
(
/* [IN] the address of the device specific information */
void *io_info_ptr
)
{
DSPI_INFO_STRUCT_PTR dspi_info_ptr = (DSPI_INFO_STRUCT_PTR)io_info_ptr;
const uint32_t *vectors;
int num_vectors;
int i;
if (NULL == dspi_info_ptr)
{
return SPI_ERROR_DEINIT_FAILED;
}
_dspi_deinit_low(dspi_info_ptr->DSPI_PTR);
/* Uninstall interrupt service routines */
num_vectors = _bsp_get_dspi_vectors(dspi_info_ptr->CHANNEL, &vectors);
for (i=0; i<num_vectors; i++)
{
/* Disable interrupt on vector */
_bsp_int_disable(vectors[i]);
/* Install default isr routine */
_int_install_isr(vectors[i], _int_get_default_isr(), NULL);
}
_lwsem_destroy(&dspi_info_ptr->EVENT_IO_FINISHED);
_mem_free(dspi_info_ptr);
return SPI_OK;
}
/* ===================================================================*/
LDD_TDeviceData* FTM_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
FTM_TDeviceData *DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Interrupt vector(s) allocation */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrData = _int_get_isr_data(LDD_ivIndex_INT_LPTimer);
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrFunction = _int_install_isr(LDD_ivIndex_INT_LPTimer, FTM_Interrupt, DeviceDataPrv);
/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=1,TIE=0,TPS=0,TPP=0,TFC=0,TMS=0,TEN=0 */
LPTMR0_CSR = (LPTMR_CSR_TCF_MASK | LPTMR_CSR_TPS(0x00)); /* Clear control register */
/* LPTMR0_CMR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COMPARE=0x1387 */
LPTMR0_CMR = LPTMR_CMR_COMPARE(0x1387); /* Set up compare register */
/* LPTMR0_PSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,PRESCALE=1,PBYP=0,PCS=0 */
LPTMR0_PSR = (LPTMR_PSR_PRESCALE(0x01) | LPTMR_PSR_PCS(0x00)); /* Set up prescaler register */
/* NVICIP58: PRI58=0x70 */
NVICIP58 = NVIC_IP_PRI58(0x70);
/* NVICISER1: SETENA|=0x04000000 */
NVICISER1 |= NVIC_ISER_SETENA(0x04000000);
/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=0,TIE=1,TPS=0,TPP=0,TFC=0,TMS=0,TEN=1 */
LPTMR0_CSR = (LPTMR_CSR_TIE_MASK | LPTMR_CSR_TPS(0x00) | LPTMR_CSR_TEN_MASK); /* Set up control register */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_FTM_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the device data structure */
}
/* ===================================================================*/
LDD_TDeviceData* SystemTimer1_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
SystemTimer1_TDeviceData *DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Interrupt vector(s) allocation */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrData = _int_get_isr_data(LDD_ivIndex_INT_SysTick);
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrFunction = _int_install_isr(LDD_ivIndex_INT_SysTick, SystemTimer1_Interrupt, DeviceDataPrv);
/* SYST_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COUNTFLAG=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CLKSOURCE=0,TICKINT=0,ENABLE=0 */
SYST_CSR = 0x00U; /* Clear control register */
/* SYST_RVR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,RELOAD=0x0003A97F */
SYST_RVR = SysTick_RVR_RELOAD(0x0003A97F); /* Setup reload value */
/* SYST_CVR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CURRENT=0 */
SYST_CVR = SysTick_CVR_CURRENT(0x00); /* Clear current value */
/* SCB_SHPR3: PRI_15=0x80 */
SCB_SHPR3 = (uint32_t)((SCB_SHPR3 & (uint32_t)~(uint32_t)(
SCB_SHPR3_PRI_15(0x7F)
)) | (uint32_t)(
SCB_SHPR3_PRI_15(0x80)
));
/* SYST_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COUNTFLAG=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CLKSOURCE=1,TICKINT=1,ENABLE=0 */
SYST_CSR = (SysTick_CSR_CLKSOURCE_MASK | SysTick_CSR_TICKINT_MASK); /* Set up control register */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_SystemTimer1_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the device data structure */
}
/** De-Initialise the Uart.
*
* BLEUART_Deinit()
* This function is called by the BLE stack (TRANSPORT layer) to de-initialise
* the UART layer. Eventual thread shall be terminated here.
* When this function succeed, the UART layer shall be fully de-initialised
*
* This function is called during the BLESTCK_Deinit() process, failure here
* will issue a failure in BLESTCK_Deinit()
*
* @todo implement this function
*
* @see BLESTCK_Deinit()
*
* @return The status of the operation:
* - BLESTATUS_SUCCESS indicates to the BLE stack that the UART have been
* successfully initialized
* - BLESTATUS_FAILED indicates to the BLE stack that the UART could not be
* initialized
*
* @author Alexandre GIMARD
*/
BleStatus BLEUART_Deinit(void){
// Add here specific code to execute during Stack De-Initialisation
// in order to de-initialise the transport drivers
//>
/*close spi interface*/
if(MQX_OK != fclose(spi_dev))
{
#ifdef LOCAL_LOG
SYSTEM_Log("Unable to close communication channel\n");
#endif
return BLESTATUS_FAILED;
}
/*power off em9301 from 74HC595*/
if(MQX_OK != mux_74hc595_clear_bit(BSP_74HC595_0, BSP_74HC595_VBLE_3V3))
{
return BLESTATUS_FAILED;
}
/*disable pin IRQ, destroy spi read task, semaphore*/
_bsp_int_disable(lwgpio_int_get_vector(&SPI_IRQ_PIN));
_int_install_isr(lwgpio_int_get_vector(&SPI_IRQ_PIN), _int_get_default_isr(), NULL);
if(MQX_OK != _task_destroy(_task_get_id_from_name("SPI_READ")))
{
return BLESTATUS_FAILED;
}
if(MQX_OK != _lwsem_destroy(&IRQ_SEM))
{
return BLESTATUS_FAILED;
}
//<
return BLESTATUS_SUCCESS;
}
/*FUNCTION*-------------------------------------------------------------------
*
* Function Name : _bsp_btnled_init
* Returned Value : HMI_CLIENT_STRUCT_PTR for success, NULL for failure
* Comments :
* This function performs BSP-specific initialization related to HMI.
* It installs interrupts for TSS and initializes btnled client with
* default providers.
*END*----------------------------------------------------------------------*/
HMI_CLIENT_STRUCT_PTR _bsp_btnled_init(void)
{
void ( _CODE_PTR_ TSS_ISR)(pointer)=(void ( _CODE_PTR_)(pointer))TSS_TSI0Isr; /* TSS ISR */
_int_install_isr(INT_TSI0, TSS_ISR, NULL); /* Install and then enable TSI0 Isr */
_cortex_int_init(INT_TSI0, BSP_TSI_INT_LEVEL, TRUE);
_cortex_int_enable(INT_TSI0);
_bsp_tss_io_init(); /* TSI init */
hmi_tss_init(hmi_system_control_kinetis); /* TSS init */
/* BTNLED initialization */
hmi_btnled_handle_ptr = btnled_init();
if(hmi_btnled_handle_ptr == NULL)
{
return NULL; /* BTNLED not initialized */
}
/* providers init - only providers available on board */
hmi_twrpi_provider_lwgpio_ptr = hmi_lwgpio_provider_init(hmi_init_table_lwgpio); /* LWGPIO */
hmi_twrpi_provider_keypad_ptr = hmi_tss_keypad_provider_init(hmi_init_table_tss_twrpi_void, 0); /* TSS Keypad - C0_TYPE */
/* add providers to the btnled table */
if (!hmi_add_provider(hmi_btnled_handle_ptr, hmi_twrpi_provider_keypad_ptr) || !hmi_add_provider(hmi_btnled_handle_ptr,hmi_twrpi_provider_lwgpio_ptr))
{
return NULL; /* provider's addition to the client table failed */
}
return hmi_btnled_handle_ptr;
}
uint_32 _mcf54xx_uart_serial_int_init
(
/* [IN] the interrupt I/O initialization information */
IO_SERIAL_INT_DEVICE_STRUCT_PTR int_io_dev_ptr,
/* [IN] the rest of the name of the device opened */
char _PTR_ open_name_ptr
)
{ /* Body */
MCF54XX_UART_SERIAL_INFO_STRUCT_PTR uart_info_ptr;
MCF54XX_UART_SERIAL_INIT_STRUCT_PTR uart_init_ptr;
uint_32 result;
uart_init_ptr = int_io_dev_ptr->DEV_INIT_DATA_PTR;
result = _mcf54xx_uart_serial_polled_init((pointer)uart_init_ptr,
&int_io_dev_ptr->DEV_INFO_PTR, open_name_ptr);
if (result != MQX_OK) {
return(result);
}/* Endif */
uart_info_ptr = int_io_dev_ptr->DEV_INFO_PTR;
uart_info_ptr->OLD_ISR_DATA = _int_get_isr_data(uart_init_ptr->VECTOR);
uart_info_ptr->OLD_ISR_EXCEPTION_HANDLER =
_int_get_exception_handler(uart_init_ptr->VECTOR);
uart_info_ptr->OLD_ISR =
_int_install_isr(uart_init_ptr->VECTOR, _mcf54xx_uart_serial_int_isr,
int_io_dev_ptr);
return(MQX_OK);
} /* Endbody */
boolean MACNET_install_isr(
ENET_CONTEXT_STRUCT_PTR enet_ptr,
uint_32 int_num,
uint_32 int_index,
INT_ISR_FPTR isr,
uint_32 level,
uint_32 sublevel )
{
uint_32 vector = MACNET_get_vector(enet_ptr->PARAM_PTR->ENET_IF->MAC_NUMBER, int_index);
#if BSPCFG_ENET_RESTORE
MACNET_CONTEXT_STRUCT_PTR macnet_context_ptr = (MACNET_CONTEXT_STRUCT_PTR) enet_ptr->MAC_CONTEXT_PTR;
/* Save old ISR and data */
macnet_context_ptr->OLDISR_PTR[int_num] = _int_get_isr(vector);
macnet_context_ptr->OLDISR_DATA[int_num] = _int_get_isr_data(vector);
#endif
if (_int_install_isr(vector, isr, (pointer)enet_ptr)==NULL) {
return FALSE;
}
/* Initialize interrupt priority and level */
_bsp_int_init((PSP_INTERRUPT_TABLE_INDEX)vector, level, sublevel, TRUE);
return TRUE;
}
static boolean MCF5XXX_FEC_install_isr(
ENET_CONTEXT_STRUCT_PTR enet_ptr,
uint_32 int_num,
uint_32 int_index,
void _CODE_PTR_ isr,
uint_32 level,
uint_32 sublevel )
{
uint_32 vector = MCF5XXX_FEC_get_vector(enet_ptr->PARAM_PTR->ENET_IF->MAC_NUMBER, int_index);
typedef void(*ISR_PTR)(pointer);
#if BSPCFG_ENET_RESTORE
MCF5XXX_FEC_CONTEXT_STRUCT_PTR fec_context_ptr = (MCF5XXX_FEC_CONTEXT_STRUCT_PTR) enet_ptr->MAC_CONTEXT_PTR;
// Save old ISR and data
fec_context_ptr->OLDISR_PTR[int_num] = (void *)_int_get_isr(vector);
fec_context_ptr->OLDISR_DATA[int_num] = _int_get_isr_data(vector);
#endif
if (_int_install_isr(vector, (ISR_PTR)isr, (pointer)enet_ptr)==NULL) {
return FALSE;
}
// Initialize interrupt priority and level
_psp_set_int_prio_and_level((PSP_INTERRUPT_TABLE_INDEX)vector, level, sublevel, TRUE);
return TRUE;
}
uint32_t _ki2c_int_deinit
(
/* [IN] the initialization information for the device being opened */
IO_I2C_INT_DEVICE_STRUCT_PTR int_io_dev_ptr,
/* [IN] the address of the device specific information */
VKI2C_INFO_STRUCT_PTR io_info_ptr
)
{ /* Body */
I2C_MemMapPtr i2c_ptr;
if ((NULL == io_info_ptr) || (NULL == int_io_dev_ptr))
{
return I2C_ERROR_INVALID_PARAMETER;
}
i2c_ptr = io_info_ptr->I2C_PTR;
if (i2c_ptr->S & I2C_S_BUSY_MASK)
{
return I2C_ERROR_DEVICE_BUSY;
}
#if BSPCFG_ENABLE_LEGACY_II2C_SLAVE
/* Disable Stop detection */
_bsp_int_disable(io_info_ptr->PORT_VECTOR);
/* Install original vectors */
_int_install_isr(io_info_ptr->PORT_VECTOR, io_info_ptr->OLD_PORT_ISR, io_info_ptr->OLD_PORT_ISR_DATA);
#endif
/* Disable the I2C */
i2c_ptr->C1 = 0x00;
/* Clear the I2C events */
i2c_ptr->S = 0xFF;
/* Install original vectors */
_int_install_isr (io_info_ptr->VECTOR, io_info_ptr->OLD_ISR, io_info_ptr->OLD_ISR_DATA);
_lwsem_destroy((LWSEM_STRUCT_PTR)(&(io_info_ptr->LWSEM)));
/* Free info struct */
_mem_free (int_io_dev_ptr->DEV_INFO_PTR);
int_io_dev_ptr->DEV_INFO_PTR = NULL;
return I2C_OK;
} /* Endbody */
/* ===================================================================*/
LDD_TDeviceData* CI2C1_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate HAL device structure */
CI2C1_TDeviceData *DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserData = UserDataPtr; /* Store the RTOS device structure */
/* Allocate interrupt vector */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_I2C0);
DeviceDataPrv->SavedISRSettings.isrFunction = _int_install_isr(LDD_ivIndex_INT_I2C0, CI2C1_Interrupt, DeviceDataPrv);
DeviceDataPrv->SerFlag = 0x00U; /* Reset all flags */
DeviceDataPrv->SendStop = LDD_I2C_SEND_STOP; /* Set variable for sending stop condition (for master mode) */
DeviceDataPrv->InpLenM = 0x00U; /* Set zero counter of data of reception */
DeviceDataPrv->OutLenM = 0x00U; /* Set zero counter of data of transmission */
/* SIM_SCGC4: I2C0=1 */
SIM_SCGC4 |= SIM_SCGC4_I2C0_MASK;
/* I2C0_C1: IICEN=0,IICIE=0,MST=0,TX=0,TXAK=0,RSTA=0,WUEN=0,DMAEN=0 */
I2C0_C1 = 0x00U; /* Clear control register */
/* I2C0_S: TCF=0,IAAS=0,BUSY=0,ARBL=0,RAM=0,SRW=0,IICIF=1,RXAK=0 */
I2C0_S = I2C_S_IICIF_MASK; /* Clear interrupt flag */
/* PORTB_PCR1: ISF=0,MUX=2 */
PORTB_PCR1 = (uint32_t)((PORTB_PCR1 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x05)
)) | (uint32_t)(
PORT_PCR_MUX(0x02)
));
PORT_PDD_SetPinOpenDrain(PORTB_BASE_PTR, 0x01u, PORT_PDD_OPEN_DRAIN_ENABLE); /* Set SDA pin as open drain */
/* PORTB_PCR0: ISF=0,MUX=2 */
PORTB_PCR0 = (uint32_t)((PORTB_PCR0 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x05)
)) | (uint32_t)(
PORT_PCR_MUX(0x02)
));
PORT_PDD_SetPinOpenDrain(PORTB_BASE_PTR, 0x00u, PORT_PDD_OPEN_DRAIN_ENABLE); /* Set SCL pin as open drain */
/* NVICIP24: PRI24=0x80 */
NVICIP24 = NVIC_IP_PRI24(0x80);
/* NVICISER0: SETENA|=0x01000000 */
NVICISER0 |= NVIC_ISER_SETENA(0x01000000);
/* I2C0_C2: GCAEN=0,ADEXT=0,HDRS=0,SBRC=0,RMEN=0,AD=0 */
I2C0_C2 = I2C_C2_AD(0x00);
/* I2C0_FLT: ??=0,??=0,??=0,FLT=0 */
I2C0_FLT = I2C_FLT_FLT(0x00); /* Set glitch filter register */
/* I2C0_SMB: FACK=0,ALERTEN=0,SIICAEN=0,TCKSEL=0,SLTF=1,SHTF1=0,SHTF2=0,SHTF2IE=0 */
I2C0_SMB = I2C_SMB_SLTF_MASK;
/* I2C0_F: MULT=1,ICR=0x17 */
I2C0_F = (I2C_F_MULT(0x01) | I2C_F_ICR(0x17)); /* Set prescaler bits */
I2C_PDD_EnableDevice(I2C0_BASE_PTR, PDD_ENABLE); /* Enable device */
I2C_PDD_EnableInterrupt(I2C0_BASE_PTR); /* Enable interrupt */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_CI2C1_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the data data structure */
}
uint_32 _core_mutex_install( const CORE_MUTEX_INIT_STRUCT *init_ptr )
{
CORE_MUTEX_COMPONENT_PTR component_ptr = _core_mutext_get_component_ptr();
PSP_INTERRUPT_TABLE_INDEX vector;
uint_32 i;
#if MQX_CHECK_ERRORS
if (component_ptr!=NULL) {
return MQX_COMPONENT_EXISTS;
}
#endif
component_ptr = _mem_alloc_system_zero(sizeof(*component_ptr));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if (component_ptr==NULL) {
return MQX_OUT_OF_MEMORY;
}
#endif
for (i=0;i<SEMA4_NUM_DEVICES;i++) {
vector = _bsp_get_sema4_vector(i);
component_ptr->DEVICE[i].SEMA4_PTR = _bsp_get_sema4_base_address(i);
if (_psp_core_num()==0) {
component_ptr->DEVICE[i].CPNTF_PTR = &(component_ptr->DEVICE[i].SEMA4_PTR->CP0NTF);
} else {
component_ptr->DEVICE[i].CPNTF_PTR = &(component_ptr->DEVICE[i].SEMA4_PTR->CP1NTF);
}
#if MQX_CHECK_ERRORS
if ((component_ptr->DEVICE[i].SEMA4_PTR == NULL) || (vector==0)) {
_mem_free(component_ptr);
return MQX_INVALID_DEVICE;
}
#endif
}
_int_disable();
#if MQX_CHECK_ERRORS
if (_core_mutext_get_component_ptr()) {
_int_enable();
_mem_free(component_ptr);
return MQX_COMPONENT_EXISTS;
}
#endif
_core_mutext_set_component_ptr(component_ptr);
_int_enable();
for (i=0;i<SEMA4_NUM_DEVICES;i++) {
vector = _bsp_get_sema4_vector(i);
_int_install_isr(vector, _sema4_isr, &component_ptr->DEVICE[i]);
_bsp_int_init(vector, init_ptr->INT_PRIORITY, 0, TRUE);
}
return COREMUTEX_OK;
}
uint_32 _e200_decrementer_null_install(void)
{
/* Install the decrementer interrupt handler */
if (_int_install_isr(PSP_EXCPT_DECREMENTER,_e200_decrementer_null_isr, NULL) == NULL)
{
return _task_get_error();
}
return MQX_OK;
}
/*
** ===================================================================
** Method : MQX1_PEX_RTOS_InstallInterrupt (component MQXLite)
**
** Description :
** Installs the interrupt service routine through the RTOS.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void PEX_RTOS_InstallInterrupt(IRQInterruptIndex IntVector, void (*IsrFunction)(void *), void *IsrParam)
{
if (IntVector >= 15) {
/* Interrupts are install through the MQX standard ISR installation mechanism */
(void)_int_install_isr(IntVector, (INT_ISR_FPTR)IsrFunction, IsrParam);
} else {
/* Interrupts are install through the MQX kernel ISR installation mechanism */
(void)_int_install_kernel_isr(IntVector, (INT_KERNEL_ISR_FPTR)IsrFunction);
}
}
_mqx_int _mtim16_timer_install_kernel
(
/* [IN] the timer to initialize */
uint8_t timer,
/* [IN] ticks per second */
uint32_t tickfreq,
/* [IN] input clock speed in Hz */
uint32_t clk,
/* [IN] interrupt priority */
uint32_t priority,
/* [IN] unmask the timer after installation */
bool unmask_timer
)
{
uint32_t result;
uint32_t period;
_mqx_uint vector = _bsp_get_mtim16_vector(timer);
if (vector == 0)
{
return MQX_INVALID_DEVICE;
}
_bsp_int_disable(vector);
/* Set up tick timer */
period = _mtim16_timer_init(timer, tickfreq, clk, FALSE);
/* Install the timer interrupt handler */
if (_int_install_isr(vector, _mtim16_kernel_isr, NULL) == NULL)
{
return MQX_TIMER_ISR_INSTALL_FAIL;
}
/* Initialize the timer interrupt */
_time_set_timer_vector(_bsp_get_mtim16_vector(timer));
_time_set_hwtick_function(_mtim16_get_hwticks, (void *) timer);
_time_set_hwticks_per_tick(period);
_time_set_ticks_per_sec(tickfreq);
_bsp_int_init(vector, priority, 0, TRUE);
_bsp_int_enable(vector);
if (unmask_timer) {
_mtim16_unmask_int(timer);
}
return MQX_OK;
}
static void MACNET_uninstall_isr( ENET_CONTEXT_STRUCT_PTR enet_ptr, uint_32 int_num, uint_32 int_index )
{
uint_32 vector = MACNET_get_vector(enet_ptr->PARAM_PTR->ENET_IF->MAC_NUMBER, int_index);
MACNET_CONTEXT_STRUCT_PTR macnet_context_ptr = (MACNET_CONTEXT_STRUCT_PTR) enet_ptr->MAC_CONTEXT_PTR;
_bsp_int_disable((PSP_INTERRUPT_TABLE_INDEX)vector);
if (macnet_context_ptr->OLDISR_PTR[int_num])
{
_int_install_isr(vector, macnet_context_ptr->OLDISR_PTR[int_num], macnet_context_ptr->OLDISR_DATA[int_num]);
macnet_context_ptr->OLDISR_PTR[int_num] = (INT_ISR_FPTR)NULL;
}
}
static void MCF5XXX_FEC_uninstall_isr( ENET_CONTEXT_STRUCT_PTR enet_ptr, uint_32 int_num, uint_32 int_index )
{
uint_32 vector = MCF5XXX_FEC_get_vector(enet_ptr->PARAM_PTR->ENET_IF->MAC_NUMBER, int_index);
MCF5XXX_FEC_CONTEXT_STRUCT_PTR fec_context_ptr = (MCF5XXX_FEC_CONTEXT_STRUCT_PTR) enet_ptr->MAC_CONTEXT_PTR;
typedef void( * FC_INT_PTR)(pointer);
_psp_int_mask((PSP_INTERRUPT_TABLE_INDEX)vector);
if (fec_context_ptr->OLDISR_PTR[int_num]) {
_int_install_isr(vector, (FC_INT_PTR)fec_context_ptr->OLDISR_PTR[int_num], fec_context_ptr->OLDISR_DATA[int_num]);
fec_context_ptr->OLDISR_PTR[int_num] = NULL;
}
}
/* ===================================================================*/
LDD_TDeviceData* MB_UART_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
MB_UART_TDeviceDataPtr DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
/* Clear the receive counters and pointer */
DeviceDataPrv->InpRecvDataNum = 0x00U; /* Clear the counter of received characters */
DeviceDataPrv->InpDataNumReq = 0x00U; /* Clear the counter of characters to receive by ReceiveBlock() */
DeviceDataPrv->InpDataPtr = NULL; /* Clear the buffer pointer for received characters */
/* Clear the transmit counters and pointer */
DeviceDataPrv->OutSentDataNum = 0x00U; /* Clear the counter of sent characters */
DeviceDataPrv->OutDataNumReq = 0x00U; /* Clear the counter of characters to be send by SendBlock() */
DeviceDataPrv->OutDataPtr = NULL; /* Clear the buffer pointer for data to be transmitted */
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Allocate interrupt vectors */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_UART2);
DeviceDataPrv->SavedISRSettings.isrFunction = _int_install_isr(LDD_ivIndex_INT_UART2, MB_UART_Interrupt, DeviceDataPrv);
/* SIM_SCGC: UART2=1 */
SIM_SCGC |= SIM_SCGC_UART2_MASK;
/* SIM_PINSEL1: UART2PS=0 */
SIM_PINSEL1 &= (uint32_t)~(uint32_t)(SIM_PINSEL1_UART2PS_MASK);
/* NVIC_IPR3: PRI_14=1 */
NVIC_IPR3 = (uint32_t)((NVIC_IPR3 & (uint32_t)~(uint32_t)(
NVIC_IP_PRI_14(0x02)
)) | (uint32_t)(
NVIC_IP_PRI_14(0x01)
));
/* NVIC_ISER: SETENA31=0,SETENA30=0,SETENA29=0,SETENA28=0,SETENA27=0,SETENA26=0,SETENA25=0,SETENA24=0,SETENA23=0,SETENA22=0,SETENA21=0,SETENA20=0,SETENA19=0,SETENA18=0,SETENA17=0,SETENA16=0,SETENA15=0,SETENA14=1,SETENA13=0,SETENA12=0,SETENA11=0,SETENA10=0,SETENA9=0,SETENA8=0,SETENA7=0,SETENA6=0,SETENA5=0,SETENA4=0,SETENA3=0,SETENA2=0,SETENA1=0,SETENA0=0 */
NVIC_ISER = NVIC_ISER_SETENA14_MASK;
/* NVIC_ICER: CLRENA31=0,CLRENA30=0,CLRENA29=0,CLRENA28=0,CLRENA27=0,CLRENA26=0,CLRENA25=0,CLRENA24=0,CLRENA23=0,CLRENA22=0,CLRENA21=0,CLRENA20=0,CLRENA19=0,CLRENA18=0,CLRENA17=0,CLRENA16=0,CLRENA15=0,CLRENA14=0,CLRENA13=0,CLRENA12=0,CLRENA11=0,CLRENA10=0,CLRENA9=0,CLRENA8=0,CLRENA7=0,CLRENA6=0,CLRENA5=0,CLRENA4=0,CLRENA3=0,CLRENA2=0,CLRENA1=0,CLRENA0=0 */
NVIC_ICER = 0x00U;
UART_PDD_EnableTransmitter(UART2_BASE_PTR, PDD_DISABLE); /* Disable transmitter. */
UART_PDD_EnableReceiver(UART2_BASE_PTR, PDD_DISABLE); /* Disable receiver. */
DeviceDataPrv->SerFlag = 0x00U; /* Reset flags */
/* UART2_C1: LOOPS=0,UARTSWAI=0,RSRC=0,M=0,WAKE=0,ILT=0,PE=0,PT=0 */
UART2_C1 = 0x00U; /* Set the C1 register */
/* UART2_C3: R8=0,T8=0,TXDIR=0,TXINV=0,ORIE=0,NEIE=0,FEIE=0,PEIE=0 */
UART2_C3 = 0x00U; /* Set the C3 register */
/* UART2_S2: LBKDIF=0,RXEDGIF=0,??=0,RXINV=0,RWUID=0,BRK13=0,LBKDE=0,RAF=0 */
UART2_S2 = 0x00U; /* Set the S2 register */
UART_PDD_SetBaudRate(UART2_BASE_PTR, 52U); /* Set the baud rate register. */
UART_PDD_EnableTransmitter(UART2_BASE_PTR, PDD_ENABLE); /* Enable transmitter */
UART_PDD_EnableReceiver(UART2_BASE_PTR, PDD_ENABLE); /* Enable receiver */
UART_PDD_EnableInterrupt(UART2_BASE_PTR, ( UART_PDD_INTERRUPT_RECEIVER )); /* Enable interrupts */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_MB_UART_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv);
}
void Lptmr_Init(int count, int clock_source)
{
_mqx_uint mqx_ret;
SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK;
SIM_SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK;
SIM_SOPT1 |= SIM_SOPT1_OSC32KSEL(2); // ERCLK32 is RTC OSC CLOCK
PORTC_PCR1 &= ~PORT_PCR_MUX_MASK;
PORTC_PCR1 |= PORT_PCR_MUX(1);//enable ptc1 alt1 functions to select RTC_CLKIN function
/*********************************************************************************
* On L2K tower board, we use external 32kHz clock instead of 32kHz crystal, so please
* don't enable the 32kHz crystal oscillator
**********************************************************************************/
/*
RTC_CR |= RTC_CR_OSCE_MASK |
RTC_CR_CLKO_MASK |
RTC_CR_SC8P_MASK ; */
LPTMR0_PSR &= ~LPTMR_PSR_PRESCALE_MASK;
LPTMR0_PSR |= LPTMR_PSR_PRESCALE(0); // 0000 is div 2
LPTMR0_PSR |= LPTMR_PSR_PBYP_MASK; // LPO feeds directly to LPT
LPTMR0_PSR &= ~LPTMR_PSR_PCS_MASK;
LPTMR0_PSR |= LPTMR_PSR_PCS(clock_source); // use the choice of clock
if (clock_source== 0)
APP_TRACE("\n LPTMR Clock source is the MCGIRCLK \n\r");
if (clock_source== 1)
APP_TRACE("\n LPTMR Clock source is the LPOCLK \n\r");
if (clock_source== 2)
APP_TRACE("\n LPTMR Clock source is the ERCLK32 \n\r");
if (clock_source== 3)
APP_TRACE("\n LPTMR Clock source is the OSCERCLK \n\r");
LPTMR0_CMR = LPTMR_CMR_COMPARE(count); //Set compare value
LPTMR0_CSR |=( LPTMR_CSR_TCF_MASK // Clear any pending interrupt
| LPTMR_CSR_TIE_MASK // LPT interrupt enabled
|!LPTMR_CSR_TPP_MASK //TMR Pin polarity
|!LPTMR_CSR_TFC_MASK // Timer Free running counter is reset whenever TMR counter equals compare
|!LPTMR_CSR_TMS_MASK //LPTMR0 as Timer
);
enable_irq(28) ;
_int_install_isr(LDD_ivIndex_INT_LPTimer, lptmr_isr, NULL);
mqx_ret = _lwsem_create(&g_lptmr_int_sem, 0);
ASSERT_PARAM(MQX_OK == mqx_ret);
// // ready for this interrupt.
// set_irq_priority(28, 2);
}
/******************************************************************************
* @name audio_timer_init
*
* @brief This function initialize audio timer
*
* @return None
*
* @comment
*
*******************************************************************************/
void audio_timer_init(void)
{
if(_int_install_isr(AUDIO_INT,
(void (_CODE_PTR_)(pointer))AUDIO_TIMER_ISR, NULL) == NULL)
{
return ;
} /* Endif */
#if (defined BSP_TWR_K40X256) || (defined BSP_TWR_K60N512) ||\
(defined BSP_TWR_K53N512) || (defined BSP_KWIKSTIK_K40X256) ||\
(defined BSP_TWR_K70F120M) || (defined BSP_TWR_K60F120M) ||\
(defined BSP_TWR_K60D100M)
_bsp_int_init(AUDIO_INT, 2, 0, TRUE);
#endif
}
/*FUNCTION****************************************************************
*
* Function Name : _rtc_int_install
* Returned Value : MQX error code
* Comments :
* This function installs given ISR for RTC module.
*
*END*********************************************************************/
uint_32 _rtc_int_install
(
/* [IN] pointer to user ISR code */
pointer isr
)
{ /* Body */
void (_CODE_PTR_ result)(pointer);
VMCF53XX_RTC_STRUCT_PTR rtc;
if (NULL == isr) return MQX_INVALID_POINTER;
rtc = _bsp_get_rtc_base_address ();
result = _int_install_isr (_bsp_get_rtc_vector (), (void (_CODE_PTR_))isr, (pointer)rtc);
if (NULL == result) return _task_get_error ();
return MQX_OK;
} /* Endbody */
static _mqx_int install_isr
(
MQX_FILE_PTR fd_ptr
)
{
/* clear all flags */
PORTA_ISFR = 0xFFFFFFFF;
PORTB_ISFR = 0xFFFFFFFF;
PORTC_ISFR = 0xFFFFFFFF;
PORTD_ISFR = 0xFFFFFFFF;
PORTE_ISFR = 0xFFFFFFFF;
if (NULL == _int_install_isr(INT_PORTA, gpio_eport_irq, NULL))
{
return IO_ERROR; /* could not install interrupt routine */
}
if (NULL == _int_install_isr(INT_PORTB, gpio_eport_irq, NULL))
{
return IO_ERROR;
}
if (NULL == _int_install_isr(INT_PORTC, gpio_eport_irq, NULL))
{
return IO_ERROR;
}
if (NULL == _int_install_isr(INT_PORTD, gpio_eport_irq, NULL))
{
return IO_ERROR;
}
if (NULL == _int_install_isr(INT_PORTE, gpio_eport_irq, NULL))
{
return IO_ERROR;
}
gpio_cpu_ioctl( fd_ptr, GPIO_IOCTL_ENABLE_IRQ, NULL);
return IO_OK;
}
