Ejemplo n.º 1
0
/*FUNCTION*-------------------------------------------------------------------
*
* Function Name    : _mcf51xx_internal_flash_install
* Returned Value   : uint_32 a task error code or MQX_OK
* Comments         :
*    Install a internal flash device.
*
*END*----------------------------------------------------------------------*/
uint_32 mcf51xx_internal_flash_install(
    /* [IN] A string that identifies the device for fopen */
    char_ptr           identifier,
    uint_32            flashx_size
) 
{ /* Body */
    static FLASHX_BLOCK_INFO_STRUCT _mcf51xx_flashx_block_map[2];
    FLASHX_INIT_STRUCT init_structure;

    /* prepare flash sector/block map based on LCF data */
    _mcf51xx_flashx_block_map[0].NUM_SECTORS = flashx_size / FLASHX_SECT_SIZE;
    _mcf51xx_flashx_block_map[0].START_ADDR = 0;
    _mcf51xx_flashx_block_map[0].SECT_SIZE =  FLASHX_SECT_SIZE;
    _mcf51xx_flashx_block_map[1].NUM_SECTORS = 0;
    _mcf51xx_flashx_block_map[1].START_ADDR = 0;
    _mcf51xx_flashx_block_map[1].SECT_SIZE = 0;

    if(!flashx_size || (FLASHX_END_ADDR - FLASHX_START_ADDR) < flashx_size )
        return FLASHXERR_INVALID_SIZE;  
    
    /* set the timer prescaller for flash opperations */
    _mcf51xx_set_cfmclkd();
    
    /* prepare flashx initialization structure */
    init_structure.ID_PTR = identifier;
    init_structure.SECTOR_ERASE = (boolean (_CODE_PTR_)(IO_FLASHX_STRUCT_PTR, uchar_ptr,
      _mem_size))mcf51xx_erase_sector; 
    init_structure.SECTOR_PROGRAM = (boolean (_CODE_PTR_)(IO_FLASHX_STRUCT_PTR, 
      uchar_ptr, uchar_ptr, _mem_size))mcf51xx_write_sector;
    init_structure.CHIP_ERASE = (boolean(_CODE_PTR_)(IO_FLASHX_STRUCT_PTR))mcf51xx_erase_flash;  
    init_structure.INIT = mcf_51xx_flash_init;
    init_structure.DEINIT = mcf_51xx_flash_deinit;
    init_structure.WRITE_PROTECT = NULL;
    init_structure.MAP_PTR = _mcf51xx_flashx_block_map;
    init_structure.BASE_ADDR = (void *)FLASHX_START_ADDR; // defined in lcf file
    init_structure.WIDTH = 32;
    init_structure.DEVICES = 1;
    init_structure.WRITE_VERIFY = 0;
    init_structure.IOCTL = NULL;
    
    return _io_flashx_install(&init_structure);
    
} /* Endbody */
Ejemplo n.º 2
0
uint_32 _bsp_enable_card
    (
        void
    )
{
    KERNEL_DATA_STRUCT_PTR        kernel_data;
    uint_32                       result;

    _GET_KERNEL_DATA(kernel_data);

    _mqx_set_cpu_type(MQX_CPU);

#if MQX_EXIT_ENABLED
    /* Set the bsp exit handler, called by _mqx_exit */
    _mqx_set_exit_handler(_bsp_exit_handler);
#endif

    /* Memory splitter - prevent accessing both ram banks in one instruction */
    _mem_alloc_at(0, (void*)0x20000000);

    /* === Debugging is not allowed from here === */
    /* Initialize the interrupt handling */
    result = _psp_int_init(BSP_FIRST_INTERRUPT_VECTOR_USED, BSP_LAST_INTERRUPT_VECTOR_USED);
    /* === Debugging may now resume === */
    if (result != MQX_OK) {
        return result;
    }

    /* set possible new interrupt vector table - if MQX_ROM_VECTORS = 0 switch to
    ram interrupt table which was initialized in _psp_int_init) */
    (void)_int_set_vector_table(BSP_INTERRUPT_VECTOR_TABLE);

    /* Store timer interrupt vector for debugger */
    _time_set_timer_vector(BSP_TIMER_INTERRUPT_VECTOR);

    /* Install Timer ISR. */
    if (_int_install_isr(BSP_TIMER_INTERRUPT_VECTOR, (void (_CODE_PTR_)(pointer))_bsp_systick, NULL) == NULL)
    {
        return MQX_TIMER_ISR_INSTALL_FAIL;
    }


    /** bsp low level internal initialization. ***/
    _bsp_low_level_init();


    /*  System timer initialization */
    systick_init();

    /* MCG initialization and internal oscillators trimming */
    if (CM_ERR_OK != _bsp_set_clock_configuration(BSP_CLOCK_CONFIGURATION_AUTOTRIM))
    {
        return MQX_TIMER_ISR_INSTALL_FAIL;
    }

    if (CM_ERR_OK != _bsp_osc_autotrim())
    {
        return MQX_TIMER_ISR_INSTALL_FAIL;
    }

    /* Switch to startup clock configuration */
    if (CM_ERR_OK != _bsp_set_clock_configuration(BSP_CLOCK_CONFIGURATION_STARTUP))
    {
        return MQX_TIMER_ISR_INSTALL_FAIL;
    }

    /* Initialize the system ticks */
    _GET_KERNEL_DATA(kernel_data);
    kernel_data->TIMER_HW_REFERENCE = (BSP_SYSTEM_CLOCK / BSP_ALARM_FREQUENCY);
    _time_set_ticks_per_sec(BSP_ALARM_FREQUENCY);
    _time_set_hwticks_per_tick(kernel_data->TIMER_HW_REFERENCE);
    _time_set_hwtick_function(_bsp_get_hwticks, (pointer)NULL);

#if MQX_ENABLE_USER_MODE
    _kinetis_mpu_init();

    // supervisor full access, user no access for whole memory
    _kinetis_mpu_add_region(0, ((uchar_ptr)kernel_data->INIT.START_OF_USER_NO_MEMORY) - 1, \
        MPU_WORD_M3SM(MPU_SM_RWX) | MPU_WORD_M3UM(MPU_UM_R | MPU_UM_X) | \
        MPU_WORD_M2SM(MPU_SM_RWX) | MPU_WORD_M2UM(MPU_UM_R | MPU_UM_X) | \
        MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R | MPU_UM_X) | \
        MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R | MPU_UM_X));

    _kinetis_mpu_add_region(((uchar_ptr)kernel_data->INIT.END_OF_USER_NO_MEMORY), (uchar_ptr)0xffffffff, \
        MPU_WORD_M3SM(MPU_SM_RWX) | MPU_WORD_M3UM(MPU_UM_R | MPU_UM_X) | \
        MPU_WORD_M2SM(MPU_SM_RWX) | MPU_WORD_M2UM(MPU_UM_R | MPU_UM_X) | \
        MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R | MPU_UM_X) | \
        MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R | MPU_UM_X));

    // set access for user memory area
#if MQX_DEFAULT_USER_ACCESS_RW
    // user .data RW
    _kinetis_mpu_add_region(kernel_data->INIT.START_OF_USER_DEFAULT_MEMORY, ((uchar_ptr)kernel_data->INIT.END_OF_USER_DEFAULT_MEMORY) - 1, \
        MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R | MPU_UM_W) | \
        MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R | MPU_UM_W));


#else
    // user RO - this is by default
    // user .data RO

    /*_kinetis_mpu_add_region(kernel_data->INIT.START_OF_KERNEL_AREA, kernel_data->INIT.END_OF_KERNEL_AREA, \
        MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R) | \
        MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R));
    */

#endif // MQX_DEFAULT_USER_ACCESS_RW

    // set access for user memory area
    if (0 == kernel_data->INIT.END_OF_USER_HEAP) {
        // create user heap automaticaly, we have specified only size of heap (end of heap is zero, start of heap mean size)
        LWMEM_POOL_STRUCT_PTR   lwmem_pool_ptr;
        uchar_ptr               start;

        //start = _lwmem_alloc((char*)kernel_data->INIT.END_OF_USER_HEAP - (char*)kernel_data->INIT.START_OF_USER_HEAP + sizeof(LWMEM_POOL_STRUCT));
        start = _lwmem_alloc((uint_32)kernel_data->INIT.START_OF_USER_HEAP + sizeof(LWMEM_POOL_STRUCT));
        lwmem_pool_ptr = (LWMEM_POOL_STRUCT_PTR)start;
        start = (pointer)((uchar_ptr)start + sizeof(LWMEM_POOL_STRUCT));
        _lwmem_create_pool(lwmem_pool_ptr, start, (uint_32)kernel_data->INIT.START_OF_USER_HEAP);
        _mem_set_pool_access(lwmem_pool_ptr, POOL_USER_RW_ACCESS);

        kernel_data->KD_USER_POOL = lwmem_pool_ptr;
    }
    else {
        // manual user heap definition
        _kinetis_mpu_add_region(kernel_data->INIT.START_OF_USER_HEAP, ((uchar_ptr)kernel_data->INIT.END_OF_USER_HEAP) - 1, \
            MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R | MPU_UM_W) | \
            MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R | MPU_UM_W));
    }

    // set access for user read-write memory area
    if (kernel_data->INIT.START_OF_USER_RW_MEMORY < kernel_data->INIT.END_OF_USER_RW_MEMORY) {
        _kinetis_mpu_add_region(kernel_data->INIT.START_OF_USER_RW_MEMORY, ((uchar_ptr)kernel_data->INIT.END_OF_USER_RW_MEMORY) - 1, \
            MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R | MPU_UM_W) | \
            MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R | MPU_UM_W));
    }

    // set access for user read-only memory area
    if (kernel_data->INIT.START_OF_USER_RO_MEMORY < kernel_data->INIT.END_OF_USER_RO_MEMORY) {
        _kinetis_mpu_add_region(kernel_data->INIT.START_OF_USER_RO_MEMORY, ((uchar_ptr)kernel_data->INIT.END_OF_USER_RO_MEMORY) - 1, \
            MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R) | \
            MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R));
    }

    // set access for user no access memory area
    if (kernel_data->INIT.START_OF_USER_NO_MEMORY < kernel_data->INIT.END_OF_USER_NO_MEMORY) {
        _kinetis_mpu_add_region(kernel_data->INIT.START_OF_USER_NO_MEMORY, ((uchar_ptr)kernel_data->INIT.END_OF_USER_NO_MEMORY) - 1, \
            MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(0) | \
            MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(0));
    }

    _kinetis_mpu_enable();
#else
    _kinetis_mpu_disable();
#endif /* MQX_ENABLE_USER_MODE */

    /* Install low power support */
#if MQX_ENABLE_LOW_POWER
    MC_PMPROT = MC_PMPROT_AVLP_MASK | MC_PMPROT_ALLS_MASK; // allow VLPx, LLS, disallow VLLSx
    _lpm_install (LPM_CPU_OPERATION_MODES, LPM_OPERATION_MODE_RUN);
#endif /* MQX_ENABLE_LOW_POWER */

#if BSPCFG_ENABLE_IO_SUBSYSTEM

/*------------------------------------------------------------------------*/
/*
** Initialize the I/O Sub-system
*/
    result = _io_init();
    if (result != MQX_OK) {
        return result;
    } /* Endif */



    /* Initialize RTC and MQX time */
#if BSPCFG_ENABLE_RTCDEV
    if (MQX_OK == _bsp_rtc_io_init())   {
        _rtc_init (RTC_INIT_FLAG_ENABLE);
        _rtc_sync_with_mqx (TRUE);
    }
#endif

    /* Install device drivers */

#if BSPCFG_ENABLE_TTYA
    _kuart_polled_install("ttya:", &_bsp_sci0_init, _bsp_sci0_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_ITTYA
   _kuart_int_install("ittya:", &_bsp_sci0_init, _bsp_sci0_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_TTYB
    _kuart_polled_install("ttyb:", &_bsp_sci1_init, _bsp_sci1_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_ITTYB
   _kuart_int_install("ittyb:", &_bsp_sci1_init, _bsp_sci1_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_TTYC
    _kuart_polled_install("ttyc:", &_bsp_sci2_init, _bsp_sci2_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_ITTYC
   _kuart_int_install("ittyc:", &_bsp_sci2_init, _bsp_sci2_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_TTYD
    _kuart_polled_install("ttyd:", &_bsp_sci3_init, _bsp_sci3_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_ITTYD
   _kuart_int_install("ittyd:", &_bsp_sci3_init, _bsp_sci3_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_TTYE
    _kuart_polled_install("ttye:", &_bsp_sci4_init, _bsp_sci4_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_ITTYE
   _kuart_int_install("ittye:", &_bsp_sci4_init, _bsp_sci4_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_TTYF
    _kuart_polled_install("ttyf:", &_bsp_sci5_init, _bsp_sci5_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_ITTYF
   _kuart_int_install("ittyf:", &_bsp_sci5_init, _bsp_sci5_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_I2C0
   _ki2c_polled_install("i2c0:", &_bsp_i2c0_init);
#endif
#if BSPCFG_ENABLE_I2C1
   _ki2c_polled_install("i2c1:", &_bsp_i2c1_init);
#endif
#if BSPCFG_ENABLE_II2C0
   _ki2c_int_install("ii2c0:", &_bsp_i2c0_init);
#endif
#if BSPCFG_ENABLE_II2C1
   _ki2c_int_install("ii2c1:", &_bsp_i2c1_init);
#endif

#if BSPCFG_ENABLE_SPI0
   _dspi_polled_install("spi0:", &_bsp_dspi0_init);
#endif

#if BSPCFG_ENABLE_ISPI0
    _dspi_dma_install("ispi0:", &_bsp_dspi0_init);
#endif

#if BSPCFG_ENABLE_SPI1
   _dspi_polled_install("spi1:", &_bsp_dspi1_init);
#endif

#if BSPCFG_ENABLE_ISPI1
    _dspi_dma_install("ispi1:", &_bsp_dspi1_init);
#endif

#if BSPCFG_ENABLE_SPI2
   _dspi_polled_install("spi2:", &_bsp_dspi2_init);
#endif

#if BSPCFG_ENABLE_ISPI2
   _dspi_dma_install("ispi2:", &_bsp_dspi2_init);
#endif

/* Install the GPIO driver */
#if BSPCFG_ENABLE_GPIODEV
   _io_gpio_install("gpio:");
#endif

#if BSPCFG_ENABLE_ADC0
   _io_adc_install("adc0:", (pointer) &_bsp_adc0_init);
#endif
#if BSPCFG_ENABLE_ADC1
   _io_adc_install("adc1:", (pointer) &_bsp_adc1_init);
#endif

#if BSPCFG_ENABLE_ESDHC
    _esdhc_install ("esdhc:", &_bsp_esdhc0_init);
#endif

/* Install the PCCard Flash drivers */
#if BSPCFG_ENABLE_PCFLASH
   _io_pccardflexbus_install("pccarda:", (PCCARDFLEXBUS_INIT_STRUCT _PTR_) &_bsp_cfcard_init);
   _io_apcflash_install("pcflasha:");
#endif

#if BSPCFG_ENABLE_FLASHX
    _io_flashx_install("flashx:", &_bsp_flashx_init);
#endif

#if BSPCFG_ENABLE_IODEBUG
    _io_debug_install("iodebug:", &_bsp_iodebug_init);
#endif

#if BSPCFG_ENABLE_II2S0
   _ki2s_int_install("ii2s0:", &_bsp_i2s0_init);
#endif

   /* Initialize the default serial I/O */
   _io_serial_default_init();

#endif // BSPCFG_ENABLE_IO_SUBSYSTEM

    return MQX_OK;
}
Ejemplo n.º 3
0
uint_32 _bsp_enable_card
   (
      void
   )
{ /* Body */
   KERNEL_DATA_STRUCT_PTR kernel_data;
   uint_32                result;
   _mqx_int               i;

   /* Set the CPU type */
   _mqx_set_cpu_type(MQX_CPU);

   /* Set the bsp exit handler, called by _mqx_exit */
   _mqx_set_exit_handler(_bsp_exit_handler);

   /* Initialize the MCF5301x support functions */
   _mcf5301_initialize_support(0);

   /*
   ** Initialize the interrupt handling
   */
   _int_set_vector_table(BSP_RAM_INTERRUPT_VECTOR_TABLE);

   result =  _psp_int_init(BSP_FIRST_INTERRUPT_VECTOR_USED,
      BSP_LAST_INTERRUPT_VECTOR_USED);
   if (result != MQX_OK) {
      return result;
   } /* Endif */

   /* Initialize the timer interrupt */
   _time_set_timer_vector(BSP_TIMER_INTERRUPT_VECTOR);
   if (_int_install_isr(BSP_TIMER_INTERRUPT_VECTOR, (void (_CODE_PTR_)(pointer))_bsp_timer_isr, NULL) == NULL) {
       return MQX_TIMER_ISR_INSTALL_FAIL;
   } /* Endif */

   _GET_KERNEL_DATA(kernel_data);

   /* 
   ** Initialize the slice timer to interrupt the specified
   ** number of times per second
   */
   kernel_data->TIMER_HW_REFERENCE = _mcf5301_timer_init_freq(BSP_TIMER, BSP_ALARM_FREQUENCY, BSP_SYSTEM_CLOCK, FALSE);    

   _time_set_hwtick_function(_bsp_get_hwticks, 0);
   _time_set_hwticks_per_tick(kernel_data->TIMER_HW_REFERENCE);
   _time_set_ticks_per_sec(BSP_ALARM_FREQUENCY);

   /* Initialize and enable the timer interrupt */
   _mcf5301_int_init(BSP_TIMER_INTERRUPT_VECTOR, BSP_TIMER_INTERRUPT_LEVEL, /*BSP_SLICE_TIMER0_INT_PRIORITY, */TRUE);
    
   /* Initialize and enable the serial UART interrupts */
   _mcf5301_int_init(BSP_UART0_INT_VECTOR, BSP_UART0_INT_LEVEL, /*BSP_UART0_INT_PRIORITY, */TRUE);
   _mcf5301_int_init(BSP_UART1_INT_VECTOR, BSP_UART1_INT_LEVEL, /*BSP_UART1_INT_PRIORITY, */TRUE);

   /* Install and mask the DMA interrupt handler */
   /*_int_install_isr(BSP_ENET_DMA_INTERRUPT, _mcf5301_dma_isr, (pointer)0);
   _mcf5301_int_init(BSP_ENET_DMA_INTERRUPT, BSP_ENET_DMA_INT_LEVEL, BSP_ENET_DMA_INT_PRIORITY, FALSE);
   */


#if BSP_TRAP_EXCEPTIONS
   _int_install_unexpected_isr();
#endif


      if (_mqx_monitor_type == MQX_MONITOR_TYPE_NONE) {
      static const PSP_MMU_INIT_STRUCT mmu_init = {
         /* We define the default cacheability of non-ACR mapped regions */
         /* as non-cacheable and unbuffered */
         MCF53XX_CACR_DCM(MCF53XX_CACHE_NONCACHEABLE_UNBUFFERED)
      };
      /* Initialize Cache Control Register CACR */
      _mmu_init((pointer)&mmu_init);

      /* Set up 1 instruction and 1 data ACR in two separate SDRAM areas */
      /* Caution: Consider memory map in linker command file before changing regions */
      /* Note: Second arg to _mmu_add_region is used in mask value in ACR */
      
      result = _mmu_add_region(__CACHED_CODE_START, __CACHED_CODE_END - __CACHED_CODE_START, PSP_MMU_EXEC_ALLOWED);
      if (result != MQX_OK)
         return result; 
 
      result = _mmu_add_region(__UNCACHED_DATA_START, __UNCACHED_DATA_END - __UNCACHED_DATA_START, PSP_MMU_DATA_CACHE_INHIBITED);
      if (result != MQX_OK)
         return result;
 
      /* Copy ACR table into ACR registers */
      _MMU_ENABLE();
      
      /* Enable cache
      **    0 - Instruction cache only
      **    1 - Data cache only
      **    2 - Both Instruction & Data cache
      */
      _CACHE_ENABLE(2);
      
   } /* Endif */


#if BSPCFG_ENABLE_CPP
    /* initialize C++ constructors */
    __cpp_init();
#endif

   /* Initialize RTC and MQX time */
#if BSPCFG_ENABLE_RTCDEV
   _bsp_rtc_io_init ();
   _rtc_sync_with_mqx (TRUE);
#endif

#if BSPCFG_ENABLE_IO_SUBSYSTEM
   /* Initialize the I/O Sub-system */
   result = _io_init();
   if (result != MQX_OK) {
      return result;
   } /* Endif */

  
#if BSPCFG_ENABLE_TTYA
    _mcf53xx_uart_serial_polled_install("ttya:", &_bsp_uart0_init, _bsp_uart0_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_TTYB
    _mcf53xx_uart_serial_polled_install("ttyb:", &_bsp_uart1_init, _bsp_uart1_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_TTYC
    _mcf53xx_uart_serial_polled_install("ttyc:", &_bsp_uart2_init, _bsp_uart2_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_ITTYA
    _mcf53xx_uart_serial_int_install("ittya:", &_bsp_uart0_init, _bsp_uart0_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_ITTYB
    _mcf53xx_uart_serial_int_install("ittyb:", &_bsp_uart1_init, _bsp_uart1_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_ITTYC
    _mcf53xx_uart_serial_int_install("ittyc:", &_bsp_uart2_init, _bsp_uart2_init.QUEUE_SIZE);
#endif

#if BSPCFG_ENABLE_I2C0
   _mcf53xx_i2c_polled_install("i2c0:", &_bsp_i2c0_init);
#endif

#if BSPCFG_ENABLE_II2C0
   _mcf53xx_i2c_int_install("ii2c0:", &_bsp_i2c0_init);
#endif

#if BSPCFG_ENABLE_SPI0
   _mcf5xxx_dspi_polled_install("spi0:", &_bsp_dspi0_init);
#endif

#if BSPCFG_ENABLE_ISPI0
   _mcf5xxx_dspi_int_install("ispi0:", &_bsp_dspi0_init);
#endif

#if BSPCFG_ENABLE_EXT_FLASH
    result = _io_flashx_install(&_bsp_flashx_init);
#endif 

/* Initialize the default serial I/O */
_io_serial_default_init();

#endif /* BSPCFG_ENABLE_IO_SUBSYSTEM */
   
/*#if !BSP_PEG_PCI_ENABLE 
    Initialize the PCI in master mode. This will enumerate the bus.
   _io_pci_init(TRUE);
#endif    
*/
/* Install the GPIO driver */
#if BSPCFG_ENABLE_GPIODEV   
   _io_gpio_install("gpio:");
#endif

#if BSPCFG_ENABLE_ESDHC
    _esdhc_install ("esdhc:", &_bsp_esdhc_init);
#endif
   return MQX_OK;

} /* Endbody */
Ejemplo n.º 4
0
uint_32 _bsp_enable_card
   (
      void
   )
{
    KERNEL_DATA_STRUCT_PTR        kernel_data;
    uint_32                       result;

    /* Enable Timer */
    _e200_enable_timer(BSP_TIMEBASE_USES_EXTERNAL_CLK);

    if (_psp_core_num()==0) {
        P1_Start( __boot);
    }

    _GET_KERNEL_DATA(kernel_data);

    _mqx_set_cpu_type(MQX_CPU);

    /* Set the bsp exit handler, called by _mqx_exit */
    _mqx_set_exit_handler(_bsp_exit_handler);

    /* Initialize the MPXSxx support functions */
    _mpxsxx_initialize_support();


    /* Initialize the interrupt handling */
    result =  _psp_int_init(BSP_FIRST_INTERRUPT_VECTOR_USED, BSP_LAST_INTERRUPT_VECTOR_USED);
    if (result != MQX_OK) {
        return result;
    }

    /* Initialize peripheral bridge */
    //_qpbridge_init(pbridge_mprot_config, ELEMENTS_OF(pbridge_mprot_config));

    /* Initialize Enhanced Interrupt Controller */
    result =  _qintc_install(_bsp_get_qintc_base_address(), PSP_EXCPT_EXTERNAL);
    if (result != MQX_OK) {
        return result;
    }

    /* enable processor recognition of External/Decrementer/Fit interrupts */
    _PSP_SET_SR (_PSP_GET_SR() | PSP_MSR_EE);

#if BSPCFG_ENABLE_PIT_TIMER
    _qpit_timer_install_kernel(BSPCFG_TIMER_PIT_DEVICE, BSPCFG_TIMER_PIT_CHANNEL,BSP_ALARM_FREQUENCY, BSP_PERI1_CLOCK, BSPCFG_TIMER_INT_LEVEL);
    //_e200_decrementer_null_install();
#else
    _e200_decrementer_timer_install(BSP_ALARM_FREQUENCY, BSP_TIMEBASE_CLOCK);
#endif


    /*------------------------------------------------------------------------*/
    /*
    ** Setup MMU page tables
    */

    if (_mqx_monitor_type == MQX_MONITOR_TYPE_NONE) {
        _mmu_init(NULL);
        // First, mark the three TLBs that the boot code used as 'not-free'
        _mmu_reserve_tlb(BSP_FLASH_TLB);
        _mmu_reserve_tlb(BSP_RAM_TLB);
        _mmu_reserve_tlb(BSP_PERIPHERAL_TLB);

        // Next, add regions for RAM.
        //                        Physical Address                  Virtual Address              Size                    Attributes
        _mmu_add_virtual_region(_bsp_vtop(BSP_PRIVATE_RAM_START),  BSP_PRIVATE_RAM_START,       BSP_PRIVATE_RAM_SIZE,   BSP_PRIVATE_RAM_ATTR,        BSP_PID_MQX);
        _mmu_add_virtual_region(_bsp_vtop(BSP_SHARED_RAM_START),   BSP_SHARED_RAM_START,        BSP_SHARED_RAM_SIZE,    BSP_SHARED_RAM_ATTR,         BSP_PID_MQX);
        _mmu_add_virtual_region(_bsp_vtopr(BSP_PRIVATE_RAM_START), BSP_REMOTE_PRIVATE_RAM_START,BSP_PRIVATE_RAM_SIZE,   BSP_REMOTE_PRIVATE_RAM_ATTR, BSP_PID_MQX);
        _mmu_add_virtual_region(_bsp_vtopr(BSP_SHARED_RAM_START),  BSP_REMOTE_SHARED_RAM_START, BSP_SHARED_RAM_SIZE,    BSP_SHARED_RAM_ATTR,         BSP_PID_MQX);
        _mmu_add_virtual_region(_bsp_vtop(BSP_UNCACHED_DATA_START),BSP_UNCACHED_DATA_START,     BSP_UNCACHED_DATA_SIZE, BSP_UNCACHED_DATA_ATTR,      BSP_PID_MQX);

        // switch PID from 1 (boot) to 2 (MQX)
        _psp_set_pid(BSP_PID_MQX);

        // Reclaim the BOOT RAM TLB
        _mmu_release_tlb(BSP_RAM_TLB);

#ifndef BSP_CACHE_INHIBIT
        _icache_enable(0);
        _dcache_enable(0);
#endif
    }


#if BSPCFG_ENABLE_CPP
    /* initialize C++ constructors */
#if defined(__DCC__) || defined(__HIGHC__)
    __init();
#elif defined(__CODEWARRIOR__)
    __cpp_init();
#endif
#endif

#if BSPCFG_CORE_MUTEX
    result = _core_mutex_install(&_core_mutex_init_info);
    if (result != MQX_OK) {
        return result;
    }
#endif

    /*------------------------------------------------------------------------*/
    /*
    ** Initialize the I/O Sub-system
    */
    #if BSPCFG_ENABLE_IO_SUBSYSTEM
        /* Initialize the I/O Sub-system */
        result = _io_init();
        if (result != MQX_OK) {
            return result;
        }

     #if PSP_HAS_DEVICE_PROTECTION
     if (!_bsp_lwgpio_enable_access(0)) {
         return MQX_INVALID_DEVICE;
     }
     #endif

        /* Install device drivers */
        #if BSPCFG_ENABLE_TTYA
            if (_psp_core_peripheral_enabled(CORECFG_LINFLEX_0)) {
                _linflexd_serial_polled_install("ttya:", &_bsp_linflexd0_init);
            }
        #endif
        #if BSPCFG_ENABLE_ITTYA
            if (_psp_core_peripheral_enabled(CORECFG_LINFLEX_0)) {
                _linflexd_serial_int_install("ittya:", &_bsp_linflexd0_init);
            }
        #endif

        #if BSPCFG_ENABLE_TTYB
            if (_psp_core_peripheral_enabled(CORECFG_LINFLEX_1)) {
                _linflexd_serial_polled_install("ttyb:", &_bsp_linflexd1_init);
            }
        #endif
        #if BSPCFG_ENABLE_ITTYB
            if (_psp_core_peripheral_enabled(CORECFG_LINFLEX_1)) {
                _linflexd_serial_int_install("ittyb:", &_bsp_linflexd1_init);
            }
        #endif

        #if BSPCFG_ENABLE_TTYC
            if (_psp_core_peripheral_enabled(CORECFG_LINFLEX_2)) {
                _linflexd_serial_polled_install("ttyc:", &_bsp_linflexd2_init);
            }
        #endif
        #if BSPCFG_ENABLE_ITTYC
            if (_psp_core_peripheral_enabled(CORECFG_LINFLEX_2)) {
                _linflexd_serial_int_install("ittyc:", &_bsp_linflexd2_init);
            }
        #endif

        #if BSPCFG_ENABLE_TTYD
            if (_psp_core_peripheral_enabled(CORECFG_LINFLEX_3)) {
                _linflexd_serial_polled_install("ttyd:", &_bsp_linflexd3_init);
            }
        #endif
        #if BSPCFG_ENABLE_ITTYD
            if (_psp_core_peripheral_enabled(CORECFG_LINFLEX_3)) {
            _linflexd_serial_int_install("ittyd:", &_bsp_linflexd3_init);
            }
        #endif

        #if BSPCFG_ENABLE_SPI0
            if (_psp_core_peripheral_enabled(CORECFG_SPI_0)) {
                _io_spi_install("spi0:", &_bsp_spi0_init);
            }
        #endif

        #if BSPCFG_ENABLE_SPI1
            if (_psp_core_peripheral_enabled(CORECFG_SPI_1)) {
                _io_spi_install("spi1:", &_bsp_spi1_init);
            }
        #endif

        #if BSPCFG_ENABLE_SPI2
            if (_psp_core_peripheral_enabled(CORECFG_SPI_2)) {
                _io_spi_install("spi2:", &_bsp_spi2_init);
            }
        #endif
        
        #if BSPCFG_ENABLE_I2C0
            if (_psp_core_peripheral_enabled(CORECFG_I2C_0)) {
                _qi2c_polled_install("i2c0:", &_bsp_i2c0_init);
            }
        #endif
        #if BSPCFG_ENABLE_II2C0
            if (_psp_core_peripheral_enabled(CORECFG_I2C_0)) {
                _qi2c_int_install("ii2c0:", &_bsp_i2c0_init);
            }
        #endif
        #if BSPCFG_ENABLE_I2C1
            if (_psp_core_peripheral_enabled(CORECFG_I2C_1)) {
                _qi2c_polled_install("i2c1:", &_bsp_i2c1_init);
            }
        #endif
        #if BSPCFG_ENABLE_II2C1
            if (_psp_core_peripheral_enabled(CORECFG_I2C_1)) {
                _qi2c_int_install("ii2c1:", &_bsp_i2c1_init);
            }
        #endif
        #if BSPCFG_ENABLE_I2C2
            if (_psp_core_peripheral_enabled(CORECFG_I2C_2)) {
                _qi2c_polled_install("i2c2:", &_bsp_i2c2_init);
            }
        #endif
        #if BSPCFG_ENABLE_II2C2
            if (_psp_core_peripheral_enabled(CORECFG_I2C_2)) {
                _qi2c_int_install("ii2c2:", &_bsp_i2c2_init);
            }
        #endif

        #if BSPCFG_ENABLE_FLASHX
            _io_flashx_install("flashx:", &_bsp_data_flashx_init);
            /* code flash support in alpha stage, not tested! */
            /* _io_flashx_install("flashx_code:", &_bsp_code_flashx_init); */
        #endif

        #if BSPCFG_ENABLE_LWADC
            #if BSPCFG_ENABLE_LWADC0
            if (_psp_core_peripheral_enabled(CORECFG_ADC_0)) {
                    _lwadc_init(&lwadc0_init);
            }
            #endif
            #if BSPCFG_ENABLE_LWADC1
                if (_psp_core_peripheral_enabled(CORECFG_ADC_1)) {
                    _lwadc_init(&lwadc1_init);
                }
            #endif
            #if BSPCFG_ENABLE_LWADC2
                if (_psp_core_peripheral_enabled(CORECFG_ADC_2)) {
                    _lwadc_init(&lwadc2_init);
                }
            #endif
            #if BSPCFG_ENABLE_LWADC3
                if (_psp_core_peripheral_enabled(CORECFG_ADC_3)) {
                    _lwadc_init(&lwadc3_init);
                }
            #endif
        #endif

        #ifdef BSP_DEFAULT_IO_CHANNEL_DEFINED
            /* Initialize the default serial I/O */
            _io_serial_default_init();
        #endif
   #endif
   return MQX_OK;
}
Ejemplo n.º 5
0
uint_32 _bsp_enable_card
    (
        void
    )
{
    KERNEL_DATA_STRUCT_PTR        kernel_data;
    uint_32                       result;

    _GET_KERNEL_DATA(kernel_data);

    _mqx_set_cpu_type(PSP_CPU_MPXN20);

    /* Set the bsp exit handler, called by _mqx_exit */
    _mqx_set_exit_handler(_bsp_exit_handler);

    /* Initialize the MPXNxx MMU support functions */
    _mpxnxx_initialize_support();

    /* === Debugging is not allowed from here === */
    /* Initialize the interrupt handling */
    result = _psp_int_init(BSP_FIRST_INTERRUPT_VECTOR_USED, BSP_LAST_INTERRUPT_VECTOR_USED);
    /* === Debugging may now resume === */
    if (result != MQX_OK) {
        return result;
    }

    result = _qintc_install(_bsp_get_qintc_base_address(), PSP_EXCPT_EXTERNAL);
    if (result != MQX_OK) {
        return result;
    }

    /* enable processor recognition of External/Decrementer/Fit interrupts */
    _PSP_SET_SR (_PSP_GET_SR() | PSP_MSR_EE);

#if 0
    /* Install program exception handler */
    if (_int_install_isr(PSP_EXCPT_PROGRAM, _psp_program_isr, NULL) == NULL)
    {
        return _task_get_error();
    }
#endif

#if BSPCFG_ENABLE_PIT_TIMER
    _qpit_timer_install_kernel(BSPCFG_TIMER_PIT_DEVICE, BSPCFG_TIMER_PIT_CHANNEL, BSP_ALARM_FREQUENCY, BSP_SYSTEM_CLOCK, BSPCFG_TIMER_INT_LEVEL);
#else
    _e200_decrementer_timer_install(BSP_ALARM_FREQUENCY, BSP_TIMEBASE_CLOCK);
#endif

    /*------------------------------------------------------------------------*/
    /*
     ** Setup MMU page tables
     */

    if (_mqx_monitor_type == MQX_MONITOR_TYPE_NONE) {
        _mmu_init(NULL);
        /* First, mark the three TLBs that the boot code used as 'not-free' */
        _mmu_reserve_tlb(BSP_FLASH_TLB);
        _mmu_reserve_tlb(BSP_INT_SRAM_TLB);
        
        /* Periph B Modules */
        _mmu_reserve_tlb(BSP_PERIPHERAL_TLB); 
        _mmu_reserve_tlb(BSP_EXT_RAM_TLB);

        _mmu_reserve_tlb(BSP_PERIPHERAL_A_TLB);
        
        /* Next, add regions for RAM.
         **                        Physical Address       Virtual Address              Size                    Attributes
         */
        //_mmu_add_virtual_region((BSP_PRIVATE_RAM_START),  BSP_PRIVATE_RAM_START,       BSP_PRIVATE_RAM_SIZE,   BSP_PRIVATE_RAM_ATTR,        BSP_PID_MQX);                
        //_mmu_add_virtual_region((BSP_UNCACHED_DATA_START),BSP_UNCACHED_DATA_START,     BSP_UNCACHED_DATA_SIZE, BSP_UNCACHED_DATA_ATTR,      BSP_PID_MQX);
                
        /* switch PID from 1 (boot) to 2 (MQX) */
        /*_psp_set_pid(BSP_PID_MQX);*/
               
         /*Reclaim the BOOT RAM TLB*/        
        /*_mmu_release_tlb(BSP_RAM_TLB);*/

#ifndef BSP_CACHE_INHIBIT
        _icache_enable(0);
        _dcache_enable(0);
#endif
    } 

#if BSPCFG_ENABLE_CPP

    /* initialize C++ constructors */
#if defined(__DCC__) || defined(__HIGHC__)
    __init();
#elif defined(__CODEWARRIOR__)
    __cpp_init();
#endif

#endif //BSPCFG_ENABLE_CPP
    

#if BSPCFG_ENABLE_IO_SUBSYSTEM
    /*------------------------------------------------------------------------*/
    /*
    ** Initialize the I/O Sub-system
    */
    result = _io_init();
    if (result != MQX_OK) {
        return result;
    } /* Endif */

    /* Install device drivers */

#if BSPCFG_ENABLE_TTYA
    _lin_serial_polled_install("ttya:", &_bsp_lin0_init);
#endif
#if BSPCFG_ENABLE_ITTYA
    _lin_serial_int_install("ittya:", &_bsp_lin0_init);
#endif


#if BSPCFG_ENABLE_TTYB
    _lin_serial_polled_install("ttyb:", &_bsp_lin1_init);
#endif
#if BSPCFG_ENABLE_ITTYB
    _lin_serial_int_install("ittyb:", &_bsp_lin1_init);
#endif

    
#if BSPCFG_ENABLE_TTYC
    _lin_serial_polled_install("ttyc:", &_bsp_lin2_init);
#endif
#if BSPCFG_ENABLE_ITTYC
    _lin_serial_int_install("ittyc:", &_bsp_lin2_init);
#endif

    
#if BSPCFG_ENABLE_TTYD
    _lin_serial_polled_install("ttyd:", &_bsp_lin3_init);
#endif
#if BSPCFG_ENABLE_ITTYD
    _lin_serial_int_install("ittyd:", &_bsp_lin3_init);
#endif

    
#if BSPCFG_ENABLE_TTYE
    _lin_serial_polled_install("ttye:", &_bsp_lin4_init);
#endif
#if BSPCFG_ENABLE_ITTYE
    _lin_serial_int_install("ittye:", &_bsp_lin4_init);
#endif

    
#if BSPCFG_ENABLE_TTYF
    _lin_serial_polled_install("ttyf:", &_bsp_lin5_init);
#endif
#if BSPCFG_ENABLE_ITTYF
    _lin_serial_int_install("ittyf:", &_bsp_lin5_init);
#endif


#if BSPCFG_ENABLE_SPI0
    _io_spi_install("spi0:", &_bsp_spi0_init);
#endif

#if BSPCFG_ENABLE_SPI1
    _io_spi_install("spi1:", &_bsp_spi1_init);
#endif

#if BSPCFG_ENABLE_SPI2
    _io_spi_install("spi2:", &_bsp_spi2_init);
#endif

#if BSPCFG_ENABLE_SPI3
    _io_spi_install("spi3:", &_bsp_spi3_init);
#endif

    
#if BSPCFG_ENABLE_FLASHX
    _io_flashx_install("flashx:", &_bsp_flashx_init);
#endif

    
#if BSPCFG_ENABLE_I2C0
    _qi2c_polled_install("i2c0:", &_bsp_i2c0_init);
#endif
    
#if BSPCFG_ENABLE_II2C0
    _qi2c_int_install("ii2c0:", &_bsp_i2c0_init);
#endif

#if BSPCFG_ENABLE_I2C1
    _qi2c_polled_install("i2c1:", &_bsp_i2c1_init);
#endif
    
#if BSPCFG_ENABLE_II2C1
   _qi2c_int_install("ii2c1:", &_bsp_i2c1_init);
#endif

#if BSPCFG_ENABLE_I2C2
    _qi2c_polled_install("i2c2:", &_bsp_i2c2_init);
#endif

#if BSPCFG_ENABLE_II2C2
   _qi2c_int_install("ii2c2:", &_bsp_i2c2_init);
#endif
   
#if BSPCFG_ENABLE_I2C3
    _qi2c_polled_install("i2c3:", &_bsp_i2c3_init);
#endif

#if BSPCFG_ENABLE_II2C3
   _qi2c_int_install("ii2c3:", &_bsp_i2c3_init);
#endif

#if BSPCFG_ENABLE_RTCDEV
   _rtc_init (RTC_INIT_FLAG_CLEAR | RTC_INIT_FLAG_RESET | RTC_INIT_FLAG_ENABLE);
#endif
   
#if BSPCFG_ENABLE_LWADC
   #if BSPCFG_ENABLE_LWADC0
      _lwadc_init(&lwadc0_init);
   #endif
#endif
      
    /* Initialize the default serial I/O */
    _io_serial_default_init();

#endif // BSPCFG_ENABLE_IO_SUBSYSTEM

    return MQX_OK;
}