void bsp_start( void ) { rtems_status_code sc = RTEMS_SUCCESSFUL; uintptr_t intrStackStart; uintptr_t intrStackSize; /* * Note we can not get CPU identification dynamically, so * force current_ppc_cpu. */ current_ppc_cpu = PPC_PSIM; /* * initialize the device driver parameters * assume we are running with 20MHz bus * this should speed up some tests :-) */ BSP_bus_frequency = 20; bsp_time_base_frequency = 20000000; bsp_clicks_per_usec = BSP_bus_frequency; rtems_counter_initialize_converter(bsp_time_base_frequency); /* * Initialize the interrupt related settings. */ intrStackStart = (uintptr_t) bsp_interrupt_stack_start; intrStackSize = (uintptr_t) bsp_interrupt_stack_size; BSP_mem_size = (uint32_t )RamSize; /* * Initialize default raw exception handlers. */ ppc_exc_initialize(intrStackStart, intrStackSize); /* Install default handler for the decrementer exception */ sc = ppc_exc_set_handler( ASM_DEC_VECTOR, default_decrementer_exception_handler); if (sc != RTEMS_SUCCESSFUL) { BSP_panic("cannot install decrementer exception handler"); } /* Initalize interrupt support */ bsp_interrupt_initialize(); #if 0 /* * Setup BATs and enable MMU */ /* Memory */ setdbat(0, 0x0<<24, 0x0<<24, 2<<24, _PAGE_RW); setibat(0, 0x0<<24, 0x0<<24, 2<<24, 0); /* PCI */ setdbat(1, 0x8<<24, 0x8<<24, 1<<24, IO_PAGE); setdbat(2, 0xc<<24, 0xc<<24, 1<<24, IO_PAGE); _write_MSR(_read_MSR() | MSR_DR | MSR_IR); __asm__ volatile("sync; isync"); #endif }
/* * bsp_start * * This routine does the bulk of the system initialization. */ void bsp_start( void ) { /* * Note we can not get CPU identification dynamically. * PVR has to be set to PPC_PSIM (0xfffe) from the device * file. */ get_ppc_cpu_type(); /* * initialize the device driver parameters */ BSP_bus_frequency = (unsigned int)&PSIM_INSTRUCTIONS_PER_MICROSECOND; bsp_clicks_per_usec = BSP_bus_frequency; BSP_time_base_divisor = 1; /* * The simulator likes the exception table to be at 0xfff00000. */ bsp_exceptions_in_RAM = FALSE; /* * Initialize default raw exception handlers. */ ppc_exc_initialize( PPC_INTERRUPT_DISABLE_MASK_DEFAULT, (uintptr_t) bsp_section_work_begin, rtems_configuration_get_interrupt_stack_size() ); /* * Initalize RTEMS IRQ system */ BSP_rtems_irq_mng_init(0); /* * Setup BATs and enable MMU */ /* Memory */ setdbat(0, 0x0<<24, 0x0<<24, 2<<24, _PAGE_RW); setibat(0, 0x0<<24, 0x0<<24, 2<<24, 0); /* PCI */ setdbat(1, 0x8<<24, 0x8<<24, 1<<24, IO_PAGE); setdbat(2, 0xc<<24, 0xc<<24, 1<<24, IO_PAGE); _write_MSR(_read_MSR() | MSR_DR | MSR_IR); __asm__ volatile("sync; isync"); }
void bsp_start( void ) { #ifdef CONF_VPD int i; #endif #ifdef SHOW_LCR1_REGISTER unsigned l1cr; #endif #ifdef SHOW_LCR2_REGISTER unsigned l2cr; #endif #ifdef SHOW_LCR3_REGISTER unsigned l3cr; #endif uintptr_t intrStackStart; uintptr_t intrStackSize; ppc_cpu_id_t myCpu; ppc_cpu_revision_t myCpuRevision; Triv121PgTbl pt=0; /* Till Straumann: 4/2005 * Need to map the system registers early, so we can printk... * (otherwise we silently die) */ /* * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window */ setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE); /* Till Straumann: 2004 * map the PCI 0, 1 Domain I/O space, GT64260B registers * and the reserved area so that the size is the power of 2. * 2009 : map the entire 256 M space * */ setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x10000000, IO_PAGE); /* * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function * store the result in global variables so that it can be used latter... */ myCpu = get_ppc_cpu_type(); myCpuRevision = get_ppc_cpu_revision(); #ifdef SHOW_LCR1_REGISTER l1cr = get_L1CR(); printk("Initial L1CR value = %x\n", l1cr); #endif /* * Initialize the interrupt related settings. */ intrStackStart = (uintptr_t) __rtems_end; intrStackSize = rtems_configuration_get_interrupt_stack_size(); /* * Initialize default raw exception handlers. */ ppc_exc_initialize( PPC_INTERRUPT_DISABLE_MASK_DEFAULT, intrStackStart, intrStackSize ); /* * Init MMU block address translation to enable hardware * access * More PCI1 memory mapping to be done after BSP_pgtbl_activate. */ printk("-----------------------------------------\n"); printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version ); printk("-----------------------------------------\n"); BSP_mem_size = probeMemoryEnd(); /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit * of System Status register */ /* rtems_bsp_delay_in_bus_cycles are defined in registers.h */ BSP_bus_frequency = 133333333; BSP_processor_frequency = 1000000000; /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */ BSP_time_base_divisor = 4000; /* Maybe not setup yet becuase of the warning message */ /* Allocate and set up the page table mappings * This is only available on >604 CPUs. * * NOTE: This setup routine may modify the available memory * size. It is essential to call it before * calculating the workspace etc. */ pt = BSP_pgtbl_setup(&BSP_mem_size); if (!pt) printk("WARNING: unable to setup page tables.\n"); printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size); /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */ bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000); /* * Initalize RTEMS IRQ system */ BSP_rtems_irq_mng_init(0); #ifdef SHOW_LCR2_REGISTER l2cr = get_L2CR(); printk("Initial L2CR value = %x\n", l2cr); #endif #ifdef SHOW_LCR3_REGISTER /* L3CR needs DEC int. handler installed for bsp_delay()*/ l3cr = get_L3CR(); printk("Initial L3CR value = %x\n", l3cr); #endif /* Activate the page table mappings only after * initializing interrupts because the irq_mng_init() * routine needs to modify the text */ if (pt) { #ifdef SHOW_MORE_INIT_SETTINGS printk("Page table setup finished; will activate it NOW...\n"); #endif BSP_pgtbl_activate(pt); } /* Read Configuration Vital Product Data (VPD) */ if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150)) printk("I2Cread_eeprom() error \n"); else { #ifdef CONF_VPD printk("\n"); for (i=0; i<150; i++) { printk("%2x ", ConfVPD_buff[i]); if ((i % 20)==0 ) printk("\n"); } printk("\n"); #endif } /* * PCI 1 domain memory space */ setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE); #ifdef SHOW_MORE_INIT_SETTINGS printk("Going to start PCI buses scanning and initialization\n"); #endif pci_initialize(); #ifdef SHOW_MORE_INIT_SETTINGS printk("Number of PCI buses found is : %d\n", pci_bus_count()); #endif /* Install our own exception handler (needs PCI) */ globalExceptHdl = BSP_exceptionHandler; /* clear hostbridge errors. MCP signal is not used on the MVME5500 * PCI config space scanning code will trip otherwise :-( */ _BSP_clear_hostbridge_errors(0, 1 /*quiet*/); #ifdef SHOW_MORE_INIT_SETTINGS printk("MSR %x \n", _read_MSR()); printk("Exit from bspstart\n"); #endif }
void BSP_exceptionHandler(BSP_Exception_frame* excPtr) { uint32_t note; BSP_ExceptionExtension ext=0; rtems_id id=0; int recoverable = 0; char *fmt="Uhuuuh, Exception %d in unknown task???\n"; int quiet=0; if (!quiet) printk("In BSP_exceptionHandler()\n"); /* If we are in interrupt context, we are in trouble - skip the user * hook and panic */ if (rtems_interrupt_is_in_progress()) { fmt="Aieeh, Exception %d in interrupt handler\n"; } else if ( !_Thread_Executing) { fmt="Aieeh, Exception %d in initialization code\n"; } else { /* retrieve the notepad which possibly holds an extention pointer */ if (RTEMS_SUCCESSFUL==rtems_task_ident(RTEMS_SELF,RTEMS_LOCAL,&id) && #if 0 /* Must not use a notepad due to unknown initial value (notepad memory is allocated from the * workspace)! */ RTEMS_SUCCESSFUL==rtems_task_get_note(id, BSP_EXCEPTION_NOTEPAD, ¬e) #else RTEMS_SUCCESSFUL==rtems_task_variable_get(id, (void*)&BSP_exceptionExtension, (void**)¬e) #endif ) { ext = (BSP_ExceptionExtension)note; if (ext) quiet=ext->quiet; if (!quiet) { printk("Task (Id 0x%08x) got ",id); } fmt="exception %d\n"; } } if (ext && ext->lowlevelHook && ext->lowlevelHook(excPtr,ext,0)) { /* they did all the work and want us to do nothing! */ printk("they did all the work and want us to do nothing!\n"); return; } if (!quiet) { /* message about exception */ printk(fmt, excPtr->_EXC_number); /* register dump */ printk("\t Next PC or Address of fault = %x, ", excPtr->EXC_SRR0); printk("Mvme5500 Saved MSR = %x\n", excPtr->EXC_SRR1); printk("\t R0 = %08x", excPtr->GPR0); printk(" R1 = %08x", excPtr->GPR1); printk(" R2 = %08x", excPtr->GPR2); printk(" R3 = %08x\n", excPtr->GPR3); printk("\t R4 = %08x", excPtr->GPR4); printk(" R5 = %08x", excPtr->GPR5); printk(" R6 = %08x", excPtr->GPR6); printk(" R7 = %08x\n", excPtr->GPR7); printk("\t R8 = %08x", excPtr->GPR8); printk(" R9 = %08x", excPtr->GPR9); printk(" R10 = %08x", excPtr->GPR10); printk(" R11 = %08x\n", excPtr->GPR11); printk("\t R12 = %08x", excPtr->GPR12); printk(" R13 = %08x", excPtr->GPR13); printk(" R14 = %08x", excPtr->GPR14); printk(" R15 = %08x\n", excPtr->GPR15); printk("\t R16 = %08x", excPtr->GPR16); printk(" R17 = %08x", excPtr->GPR17); printk(" R18 = %08x", excPtr->GPR18); printk(" R19 = %08x\n", excPtr->GPR19); printk("\t R20 = %08x", excPtr->GPR20); printk(" R21 = %08x", excPtr->GPR21); printk(" R22 = %08x", excPtr->GPR22); printk(" R23 = %08x\n", excPtr->GPR23); printk("\t R24 = %08x", excPtr->GPR24); printk(" R25 = %08x", excPtr->GPR25); printk(" R26 = %08x", excPtr->GPR26); printk(" R27 = %08x\n", excPtr->GPR27); printk("\t R28 = %08x", excPtr->GPR28); printk(" R29 = %08x", excPtr->GPR29); printk(" R30 = %08x", excPtr->GPR30); printk(" R31 = %08x\n", excPtr->GPR31); printk("\t CR = %08x\n", excPtr->EXC_CR); printk("\t CTR = %08x\n", excPtr->EXC_CTR); printk("\t XER = %08x\n", excPtr->EXC_XER); printk("\t LR = %08x\n", excPtr->EXC_LR); BSP_printStackTrace(excPtr); } if (ASM_MACH_VECTOR == excPtr->_EXC_number) { /* ollah , we got a machine check - this could either * be a TEA, MCP or internal; let's see and provide more info */ if (!quiet) printk("Machine check; reason:"); if ( ! (excPtr->EXC_SRR1 & (SRR1_TEA_EXC | SRR1_MCP_EXC)) ) { if (!quiet) printk("SRR1\n"); } else { if (excPtr->EXC_SRR1 & (SRR1_TEA_EXC)) { if (!quiet) printk(" TEA"); } if (excPtr->EXC_SRR1 & (SRR1_MCP_EXC)) { unsigned long gerr; if (!quiet) printk(" MCP\n"); /* it's MCP; gather info from the host bridge */ gerr=_BSP_clear_hostbridge_errors(0,0); if (gerr&0x80000000) printk("GT64260 Parity error\n"); if (gerr&0x40000000) printk("GT64260 SysErr\n"); if ((!quiet) && (!gerr)) printk("GT64260 host bridge seems OK\n"); } } } else if (ASM_DEC_VECTOR == excPtr->_EXC_number) { recoverable = 1; } else if (ASM_SYS_VECTOR == excPtr->_EXC_number) { #ifdef TEST_RAW_EXCEPTION_CODE recoverable = 1; #else recoverable = 0; #endif } /* call them for a second time giving a chance to intercept * the task_suspend */ if (ext && ext->lowlevelHook && ext->lowlevelHook(excPtr, ext, 1)) return; if (!recoverable) { if (id) { /* if there's a highlevel hook, install it */ if (ext && ext->highlevelHook) { excPtr->EXC_SRR0 = (uint32_t)ext->highlevelHook; excPtr->GPR3 = (uint32_t)ext; return; } if (excPtr->EXC_SRR1 & MSR_FP) { /* thread dispatching is _not_ disabled at this point; hence * we must make sure we have the FPU enabled... */ _write_MSR( _read_MSR() | MSR_FP ); __asm__ __volatile__("isync"); } printk("unrecoverable exception!!! task %08x suspended\n",id); rtems_task_suspend(id); } else { printk("PANIC, rebooting...\n"); bsp_reset(); } } }