u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
{
struct sta_info *psta;
s32 i;
_func_enter_;
pstapriv->pallocated_stainfo_buf = vzalloc (sizeof(struct sta_info) * NUM_STA+ 4);
if(!pstapriv->pallocated_stainfo_buf)
return _FAIL;
pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 -
((SIZE_PTR)(pstapriv->pallocated_stainfo_buf ) & 3);
_rtw_init_queue(&pstapriv->free_sta_queue);
spin_lock_init(&pstapriv->sta_hash_lock);
//_rtw_init_queue(&pstapriv->asoc_q);
pstapriv->asoc_sta_count = 0;
_rtw_init_queue(&pstapriv->sleep_q);
_rtw_init_queue(&pstapriv->wakeup_q);
psta = (struct sta_info *)(pstapriv->pstainfo_buf);
for(i = 0; i < NUM_STA; i++)
{
_rtw_init_stainfo(psta);
INIT_LIST_HEAD(&(pstapriv->sta_hash[i]));
list_add_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
psta++;
}
pstapriv->sta_dz_bitmap = 0;
pstapriv->tim_bitmap = 0;
INIT_LIST_HEAD(&pstapriv->asoc_list);
INIT_LIST_HEAD(&pstapriv->auth_list);
spin_lock_init(&pstapriv->asoc_list_lock);
spin_lock_init(&pstapriv->auth_list_lock);
pstapriv->asoc_list_cnt = 0;
pstapriv->auth_list_cnt = 0;
pstapriv->auth_to = 3; // 3*2 = 6 sec
pstapriv->assoc_to = 3;
//pstapriv->expire_to = 900;// 900*2 = 1800 sec = 30 min, expire after no any traffic.
//pstapriv->expire_to = 30;// 30*2 = 60 sec = 1 min, expire after no any traffic.
pstapriv->expire_to = 3; // 3*2 = 6 sec
pstapriv->max_num_sta = NUM_STA;
_func_exit_;
return _SUCCESS;
}
u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
{
struct sta_info *psta;
s32 i;
pstapriv->pallocated_stainfo_buf = vzalloc(sizeof(struct sta_info) * NUM_STA + 4);
if (!pstapriv->pallocated_stainfo_buf)
return _FAIL;
pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 -
((size_t)(pstapriv->pallocated_stainfo_buf) & 3);
_rtw_init_queue(&pstapriv->free_sta_queue);
spin_lock_init(&pstapriv->sta_hash_lock);
pstapriv->asoc_sta_count = 0;
_rtw_init_queue(&pstapriv->sleep_q);
_rtw_init_queue(&pstapriv->wakeup_q);
psta = (struct sta_info *)(pstapriv->pstainfo_buf);
for (i = 0; i < NUM_STA; i++) {
_rtw_init_stainfo(psta);
INIT_LIST_HEAD(&(pstapriv->sta_hash[i]));
list_add_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
psta++;
}
#ifdef CONFIG_88EU_AP_MODE
pstapriv->sta_dz_bitmap = 0;
pstapriv->tim_bitmap = 0;
INIT_LIST_HEAD(&pstapriv->asoc_list);
INIT_LIST_HEAD(&pstapriv->auth_list);
spin_lock_init(&pstapriv->asoc_list_lock);
spin_lock_init(&pstapriv->auth_list_lock);
pstapriv->asoc_list_cnt = 0;
pstapriv->auth_list_cnt = 0;
pstapriv->auth_to = 3; /* 3*2 = 6 sec */
pstapriv->assoc_to = 3;
pstapriv->expire_to = 3; /* 3*2 = 6 sec */
pstapriv->max_num_sta = NUM_STA;
#endif
return _SUCCESS;
}
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
unsigned long irqL, irqL2;
s32 index;
struct list_head *phash_list;
struct sta_info *psta;
struct __queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
int i = 0;
u16 wRxSeqInitialValue = 0xffff;
_func_enter_;
pfree_sta_queue = &pstapriv->free_sta_queue;
_enter_critical_bh(&(pfree_sta_queue->lock), &irqL);
if (_rtw_queue_empty(pfree_sta_queue) == true) {
_exit_critical_bh(&(pfree_sta_queue->lock), &irqL);
psta = NULL;
} else {
psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list);
rtw_list_delete(&(psta->list));
_exit_critical_bh(&(pfree_sta_queue->lock), &irqL);
_rtw_init_stainfo(psta);
_rtw_memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
index = wifi_mac_hash(hwaddr);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("rtw_alloc_stainfo: index = %x", index));
if (index >= NUM_STA) {
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("ERROR=> rtw_alloc_stainfo: index >= NUM_STA"));
psta= NULL;
goto exit;
}
phash_list = &(pstapriv->sta_hash[index]);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
rtw_list_insert_tail(&psta->hash_list, phash_list);
pstapriv->asoc_sta_count ++ ;
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
/* Commented by Albert 2009/08/13 */
/* For the SMC router, the sequence number of first packet of WPS handshake will be 0. */
/* In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable. */
/* So, we initialize the tid_rxseq variable as the 0xffff. */
for ( i = 0; i < 16; i++ )
{
_rtw_memcpy( &psta->sta_recvpriv.rxcache.tid_rxseq[ i ], &wRxSeqInitialValue, 2 );
}
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("alloc number_%d stainfo with hwaddr = %x %x %x %x %x %x\n",
pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2],hwaddr[3],hwaddr[4],hwaddr[5]));
init_addba_retry_timer(pstapriv->padapter, psta);
/* for A-MPDU Rx reordering buffer control */
for (i=0; i < 16 ; i++)
{
preorder_ctrl = &psta->recvreorder_ctrl[i];
preorder_ctrl->padapter = pstapriv->padapter;
preorder_ctrl->enable = false;
preorder_ctrl->indicate_seq = 0xffff;
preorder_ctrl->wend_b= 0xffff;
preorder_ctrl->wsize_b = 64;/* 64; */
_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_recv_timer(preorder_ctrl);
}
/* init for DM */
psta->rssi_stat.UndecoratedSmoothedPWDB = (-1);
psta->rssi_stat.UndecoratedSmoothedCCK = (-1);
/* init for the sequence number of received management frame */
psta->RxMgmtFrameSeqNum = 0xffff;
}
exit:
_func_exit_;
return psta;
}
//struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr)
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
uint tmp_aid;
s32 index;
_list *phash_list;
struct sta_info *psta;
_queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
int i = 0;
u16 wRxSeqInitialValue = 0xffff;
_func_enter_;
pfree_sta_queue = &pstapriv->free_sta_queue;
//spin_lock_bh(&(pfree_sta_queue->lock));
spin_lock_bh(&(pstapriv->sta_hash_lock));
if (list_empty(&pfree_sta_queue->queue))
{
//spin_unlock_bh(&(pfree_sta_queue->lock));
spin_unlock_bh(&(pstapriv->sta_hash_lock));
psta = NULL;
return psta;
}
else
{
psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list);
list_del_init(&(psta->list));
//spin_unlock_bh(&(pfree_sta_queue->lock));
tmp_aid = psta->aid;
_rtw_init_stainfo(psta);
psta->padapter = pstapriv->padapter;
memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
index = wifi_mac_hash(hwaddr);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("rtw_alloc_stainfo: index = %x", index));
if(index >= NUM_STA){
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("ERROR=> rtw_alloc_stainfo: index >= NUM_STA"));
psta= NULL;
goto exit;
}
phash_list = &(pstapriv->sta_hash[index]);
//spin_lock_bh(&(pstapriv->sta_hash_lock));
list_add_tail(&psta->hash_list, phash_list);
pstapriv->asoc_sta_count ++ ;
//spin_unlock_bh(&(pstapriv->sta_hash_lock));
// Commented by Albert 2009/08/13
// For the SMC router, the sequence number of first packet of WPS handshake will be 0.
// In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable.
// So, we initialize the tid_rxseq variable as the 0xffff.
for( i = 0; i < 16; i++ )
{
memcpy( &psta->sta_recvpriv.rxcache.tid_rxseq[ i ], &wRxSeqInitialValue, 2 );
}
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("alloc number_%d stainfo with hwaddr = %x %x %x %x %x %x \n",
pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2],hwaddr[3],hwaddr[4],hwaddr[5]));
init_addba_retry_timer(pstapriv->padapter, psta);
//for A-MPDU Rx reordering buffer control
for(i=0; i < 16 ; i++)
{
preorder_ctrl = &psta->recvreorder_ctrl[i];
preorder_ctrl->padapter = pstapriv->padapter;
preorder_ctrl->enable = false;
preorder_ctrl->indicate_seq = 0xffff;
#ifdef DBG_RX_SEQ
DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d\n", __FUNCTION__, __LINE__,
preorder_ctrl->indicate_seq);
#endif
preorder_ctrl->wend_b= 0xffff;
//preorder_ctrl->wsize_b = (NR_RECVBUFF-2);
preorder_ctrl->wsize_b = 64;//64;
_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_recv_timer(preorder_ctrl);
}
//init for DM
psta->rssi_stat.UndecoratedSmoothedPWDB = (-1);
psta->rssi_stat.UndecoratedSmoothedCCK = (-1);
/* init for the sequence number of received management frame */
psta->RxMgmtFrameSeqNum = 0xffff;
//alloc mac id for non-bc/mc station,
rtw_alloc_macid(pstapriv->padapter, psta);
}
exit:
spin_unlock_bh(&(pstapriv->sta_hash_lock));
_func_exit_;
return psta;
}
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
s32 index;
struct list_head *phash_list;
struct sta_info *psta;
struct __queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
int i = 0;
u16 wRxSeqInitialValue = 0xffff;
pfree_sta_queue = &pstapriv->free_sta_queue;
spin_lock_bh(&pfree_sta_queue->lock);
psta = list_first_entry_or_null(&pfree_sta_queue->queue,
struct sta_info, list);
if (!psta) {
spin_unlock_bh(&pfree_sta_queue->lock);
} else {
list_del_init(&psta->list);
spin_unlock_bh(&pfree_sta_queue->lock);
_rtw_init_stainfo(psta);
memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
index = wifi_mac_hash(hwaddr);
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_info_, ("%s: index=%x", __func__, index));
if (index >= NUM_STA) {
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, ("ERROR => %s: index >= NUM_STA", __func__));
psta = NULL;
goto exit;
}
phash_list = &pstapriv->sta_hash[index];
spin_lock_bh(&pstapriv->sta_hash_lock);
list_add_tail(&psta->hash_list, phash_list);
pstapriv->asoc_sta_count++;
spin_unlock_bh(&pstapriv->sta_hash_lock);
/* Commented by Albert 2009/08/13 */
/* For the SMC router, the sequence number of first packet of WPS handshake will be 0. */
/* In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable. */
/* So, we initialize the tid_rxseq variable as the 0xffff. */
for (i = 0; i < 16; i++)
memcpy(&psta->sta_recvpriv.rxcache.tid_rxseq[i], &wRxSeqInitialValue, 2);
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_info_,
("alloc number_%d stainfo with hwaddr = %pM\n",
pstapriv->asoc_sta_count, hwaddr));
init_addba_retry_timer(pstapriv->padapter, psta);
/* for A-MPDU Rx reordering buffer control */
for (i = 0; i < 16; i++) {
preorder_ctrl = &psta->recvreorder_ctrl[i];
preorder_ctrl->padapter = pstapriv->padapter;
preorder_ctrl->enable = false;
preorder_ctrl->indicate_seq = 0xffff;
preorder_ctrl->wend_b = 0xffff;
preorder_ctrl->wsize_b = 64;/* 64; */
_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_recv_timer(preorder_ctrl);
}
/* init for DM */
psta->rssi_stat.UndecoratedSmoothedPWDB = -1;
psta->rssi_stat.UndecoratedSmoothedCCK = -1;
/* init for the sequence number of received management frame */
psta->RxMgmtFrameSeqNum = 0xffff;
}
exit:
return psta;
}
u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
{
struct sta_info *psta;
s32 i;
_func_enter_;
#ifdef MEM_ALLOC_REFINE
pstapriv->pallocated_stainfo_buf = rtw_zvmalloc (sizeof(struct sta_info) * NUM_STA+ 4);
#else
pstapriv->pallocated_stainfo_buf = rtw_zmalloc (sizeof(struct sta_info) * NUM_STA+ 4);
#endif
if(!pstapriv->pallocated_stainfo_buf)
return _FAIL;
pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 -
((SIZE_PTR)(pstapriv->pallocated_stainfo_buf ) & 3);
_rtw_init_queue(&pstapriv->free_sta_queue);
_rtw_spinlock_init(&pstapriv->sta_hash_lock);
//_rtw_init_queue(&pstapriv->asoc_q);
pstapriv->asoc_sta_count = 0;
_rtw_init_queue(&pstapriv->sleep_q);
_rtw_init_queue(&pstapriv->wakeup_q);
psta = (struct sta_info *)(pstapriv->pstainfo_buf);
for(i = 0; i < NUM_STA; i++)
{
_rtw_init_stainfo(psta);
_rtw_init_listhead(&(pstapriv->sta_hash[i]));
rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
psta++;
}
#ifdef CONFIG_AP_MODE
pstapriv->sta_dz_bitmap = 0;
pstapriv->tim_bitmap = 0;
_rtw_init_listhead(&pstapriv->asoc_list);
_rtw_init_listhead(&pstapriv->auth_list);
pstapriv->auth_to = 3; // 3*2 = 6 sec
pstapriv->assoc_to = 3;
pstapriv->expire_to = 900;// 900*2 = 1800 sec = 30 min, expire after no any traffic.
pstapriv->max_num_sta = NUM_STA;
#endif
_func_exit_;
return _SUCCESS;
}
//struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr)
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
_irqL irqL, irqL2;
uint tmp_aid;
s32 index;
_list *phash_list;
struct sta_info *psta;
_queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
int i = 0;
u16 wRxSeqInitialValue = 0xffff;
_func_enter_;
pfree_sta_queue = &pstapriv->free_sta_queue;
_enter_critical_bh(&(pfree_sta_queue->lock), &irqL);
if (_rtw_queue_empty(pfree_sta_queue) == _TRUE)
{
psta = NULL;
}
else
{
psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list);
rtw_list_delete(&(psta->list));
tmp_aid = psta->aid;
_rtw_init_stainfo(psta);
_rtw_memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
index = wifi_mac_hash(hwaddr);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("rtw_alloc_stainfo: index = %x", index));
if(index >= NUM_STA) {
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("ERROR=> rtw_alloc_stainfo: index >= NUM_STA"));
psta= NULL;
goto exit;
}
phash_list = &(pstapriv->sta_hash[index]);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
rtw_list_insert_tail(&psta->hash_list, phash_list);
pstapriv->asoc_sta_count ++ ;
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
// Commented by Albert 2009/08/13
// For the SMC router, the sequence number of first packet of WPS handshake will be 0.
// In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable.
// So, we initialize the tid_rxseq variable as the 0xffff.
for( i = 0; i < 16; i++ )
{
_rtw_memcpy( &psta->sta_recvpriv.rxcache.tid_rxseq[ i ], &wRxSeqInitialValue, 2 );
}
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("alloc number_%d stainfo with hwaddr = %x %x %x %x %x %x \n",
pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2],hwaddr[3],hwaddr[4],hwaddr[5]));
init_addba_retry_timer(pstapriv->padapter, psta);
#ifdef CONFIG_TDLS
psta->padapter = pstapriv->padapter;
init_TPK_timer(pstapriv->padapter, psta);
_init_workitem(&psta->option_workitem, TDLS_option_workitem_callback, psta);
init_ch_switch_timer(pstapriv->padapter, psta);
init_base_ch_timer(pstapriv->padapter, psta);
_init_workitem(&psta->base_ch_workitem, base_channel_workitem_callback, psta);
init_off_ch_timer(pstapriv->padapter, psta);
_init_workitem(&psta->off_ch_workitem, off_channel_workitem_callback, psta);
#endif
//for A-MPDU Rx reordering buffer control
for(i=0; i < 16 ; i++)
{
preorder_ctrl = &psta->recvreorder_ctrl[i];
preorder_ctrl->padapter = pstapriv->padapter;
preorder_ctrl->enable = _FALSE;
preorder_ctrl->indicate_seq = 0xffff;
#ifdef DBG_RX_SEQ
DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d\n", __FUNCTION__, __LINE__,
preorder_ctrl->indicate_seq);
#endif
preorder_ctrl->wend_b= 0xffff;
//preorder_ctrl->wsize_b = (NR_RECVBUFF-2);
preorder_ctrl->wsize_b = 64;//64;
_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_recv_timer(preorder_ctrl);
}
}
exit:
_exit_critical_bh(&(pfree_sta_queue->lock), &irqL);
_func_exit_;
return psta;
}
u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
{
struct sta_info *psta;
s32 i;
_func_enter_;
pstapriv->pallocated_stainfo_buf = rtw_zvmalloc (sizeof(struct sta_info) * NUM_STA+ 4);
if(!pstapriv->pallocated_stainfo_buf)
return _FAIL;
pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 -
((SIZE_PTR)(pstapriv->pallocated_stainfo_buf ) & 3);
_rtw_init_queue(&pstapriv->free_sta_queue);
_rtw_spinlock_init(&pstapriv->sta_hash_lock);
//_rtw_init_queue(&pstapriv->asoc_q);
pstapriv->asoc_sta_count = 0;
_rtw_init_queue(&pstapriv->sleep_q);
_rtw_init_queue(&pstapriv->wakeup_q);
psta = (struct sta_info *)(pstapriv->pstainfo_buf);
for(i = 0; i < NUM_STA; i++)
{
_rtw_init_stainfo(psta);
_rtw_init_listhead(&(pstapriv->sta_hash[i]));
rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
psta++;
}
#ifdef CONFIG_AP_MODE
pstapriv->sta_dz_bitmap = 0;
pstapriv->tim_bitmap = 0;
_rtw_init_listhead(&pstapriv->asoc_list);
_rtw_init_listhead(&pstapriv->auth_list);
_rtw_spinlock_init(&pstapriv->asoc_list_lock);
_rtw_spinlock_init(&pstapriv->auth_list_lock);
pstapriv->asoc_list_cnt = 0;
pstapriv->auth_list_cnt = 0;
pstapriv->auth_to = 3; // 3*2 = 6 sec
pstapriv->assoc_to = 3;
//pstapriv->expire_to = 900;// 900*2 = 1800 sec = 30 min, expire after no any traffic.
//pstapriv->expire_to = 30;// 30*2 = 60 sec = 1 min, expire after no any traffic.
#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK
pstapriv->expire_to = 3; // 3*2 = 6 sec
#else
pstapriv->expire_to = 60;// 60*2 = 120 sec = 2 min, expire after no any traffic.
#endif
#ifdef CONFIG_ATMEL_RC_PATCH
_rtw_memset( pstapriv->atmel_rc_pattern, 0, ETH_ALEN);
#endif
pstapriv->max_num_sta = NUM_STA;
#endif
_func_exit_;
return _SUCCESS;
}
