size_t _parseGDBMessage(struct GDBStub* stub, const char* message) {
uint8_t checksum = 0;
int parsed = 1;
switch (*message) {
case '+':
stub->lineAck = GDB_ACK_RECEIVED;
return parsed;
case '-':
stub->lineAck = GDB_NAK_RECEIVED;
return parsed;
case '$':
++message;
break;
case '\x03':
mDebuggerEnter(&stub->d, DEBUGGER_ENTER_MANUAL, 0);
return parsed;
default:
_nak(stub);
return parsed;
}
int i;
char messageType = message[0];
for (i = 0; message[i] != '#'; ++i, ++parsed) {
checksum += message[i];
}
if (!message[i]) {
_nak(stub);
return parsed;
}
++i;
++parsed;
if (!message[i]) {
_nak(stub);
return parsed;
} else if (!message[i + 1]) {
++parsed;
_nak(stub);
return parsed;
}
parsed += 2;
int networkChecksum = _hex2int(&message[i], 2);
if (networkChecksum != checksum) {
mLOG(DEBUGGER, WARN, "Checksum error: expected %02x, got %02x", checksum, networkChecksum);
_nak(stub);
return parsed;
}
_ack(stub);
++message;
switch (messageType) {
case '?':
snprintf(stub->outgoing, GDB_STUB_MAX_LINE - 4, "S%02x", SIGINT);
_sendMessage(stub);
break;
case 'c':
_continue(stub, message);
break;
case 'G':
_writeGPRs(stub, message);
break;
case 'g':
_readGPRs(stub, message);
break;
case 'H':
// This is faked because we only have one thread
strncpy(stub->outgoing, "OK", GDB_STUB_MAX_LINE - 4);
_sendMessage(stub);
break;
case 'M':
_writeMemory(stub, message);
break;
case 'm':
_readMemory(stub, message);
break;
case 'P':
_writeRegister(stub, message);
break;
case 'p':
_readRegister(stub, message);
break;
case 'Q':
_processQWriteCommand(stub, message);
break;
case 'q':
_processQReadCommand(stub, message);
break;
case 's':
_step(stub, message);
break;
case 'V':
_processVWriteCommand(stub, message);
break;
case 'v':
_processVReadCommand(stub, message);
break;
case 'X':
_writeMemoryBinary(stub, message);
break;
case 'Z':
_setBreakpoint(stub, message);
break;
case 'z':
_clearBreakpoint(stub, message);
break;
default:
_error(stub, GDB_UNSUPPORTED_COMMAND);
break;
}
return parsed;
}
void ArduRCT_SPFD5408::initScreenImpl(void) {
_psu_prepareWR();
_psu_setDataBusDirectionAsOutput();
delay(50); /* Delay 50 ms */
_writeRegister(0xE5, 0x8000); /* Set the internal vcore voltage */
_writeRegister(0x00, 0x0001); /* Start internal OSC */
_writeRegister(0x01, 0x0100); /* Set SS and SM bit */
_writeRegister(0x02, 0x0700); /* Set 1 line inversion */
_writeRegister(0x03, 0x1030); /* Set GRAM write direction and BGR=1 */
_writeRegister(0x04, 0x0000); /* Resize register */
_writeRegister(0x08, 0x0202); /* 2 lines each, back and front porch */
_writeRegister(0x09, 0x0000); /* Set non-disp area refresh cyc ISC */
_writeRegister(0x0A, 0x0000); /* FMARK function */
_writeRegister(0x0C, 0x0000); /* RGB interface setting */
_writeRegister(0x0D, 0x0000); /* Frame marker Position */
_writeRegister(0x0F, 0x0000); /* RGB interface polarity */
/* Power On sequence ---------------------------------------------------*/
_writeRegister(0x10, 0x0000); /* Reset Power Control 1 */
_writeRegister(0x11, 0x0000); /* Reset Power Control 2 */
_writeRegister(0x12, 0x0000); /* Reset Power Control 3 */
_writeRegister(0x13, 0x0000); /* Reset Power Control 4 */
delay(200); /* Discharge cap power voltage (200ms)*/
_writeRegister(0x10, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
_writeRegister(0x11, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */
delay(50); /* Delay 50 ms */
_writeRegister(0x12, 0x0139); /* VREG1OUT voltage */
delay(50); /* Delay 50 ms */
_writeRegister(0x13, 0x1D00); /* VDV[4:0] for VCOM amplitude */
_writeRegister(0x29, 0x0013); /* VCM[4:0] for VCOMH */
delay(50); /* Delay 50 ms */
_writeRegister(0x20, 0x0000); /* GRAM horizontal Address */
_writeRegister(0x21, 0x0000); /* GRAM Vertical Address */
/* Adjust the Gamma Curve ----------------------------------------------*/
_writeRegister(0x30, 0x0006);
_writeRegister(0x31, 0x0101);
_writeRegister(0x32, 0x0003);
_writeRegister(0x35, 0x0106);
_writeRegister(0x36, 0x0B02);
_writeRegister(0x37, 0x0302);
_writeRegister(0x38, 0x0707);
_writeRegister(0x39, 0x0007);
_writeRegister(0x3C, 0x0600);
_writeRegister(0x3D, 0x020B);
/* Set GRAM area -------------------------------------------------------*/
_writeRegister(0x50, 0x0000); /* Horizontal GRAM Start Address */
_writeRegister(0x51, (GRAPHICS_HARDWARE_WIDTH-1)); /* Horizontal GRAM End Address */
_writeRegister(0x52, 0x0000); /* Vertical GRAM Start Address */
_writeRegister(0x53, (GRAPHICS_HARDWARE_HEIGHT-1)); /* Vertical GRAM End Address */
_writeRegister(0x60, 0x2700); /* Gate Scan Line */
_writeRegister(0x61, 0x0001); /* NDL,VLE, REV */
_writeRegister(0x6A, 0x0000); /* Set scrolling line */
/* Partial Display Control ---------------------------------------------*/
_writeRegister(0x80, 0x0000);
_writeRegister(0x81, 0x0000);
_writeRegister(0x82, 0x0000);
_writeRegister(0x83, 0x0000);
_writeRegister(0x84, 0x0000);
_writeRegister(0x85, 0x0000);
/* Panel Control -----------------------------------------------------------*/
_writeRegister(0x90, 0x0010);
_writeRegister(0x92, 0x0000);
_writeRegister(0x93, 0x0003);
_writeRegister(0x95, 0x0110);
_writeRegister(0x97, 0x0000);
_writeRegister(0x98, 0x0000);
/* Mode entry --------------------------------------------------------------*/
_writeRegister(0x03, 0x1030);
_writeRegister(0x07, 0x0173); /* 262K color and display ON */
}
