struct acpi_madt_lapic * acpi_get_lapic_next(void)
{
static unsigned idx = 0;
static struct acpi_madt_hdr * madt_hdr;
struct acpi_madt_lapic * ret;
if (idx == 0) {
madt_hdr = (struct acpi_madt_hdr *)
acpi_phys2vir(acpi_get_table_base("APIC"));
if (madt_hdr == NULL)
return NULL;
}
for (;;) {
ret = (struct acpi_madt_lapic *)
acpi_madt_get_typed_item(madt_hdr,
ACPI_MADT_TYPE_LAPIC, idx);
if (!ret)
break;
idx++;
/* report only usable CPUs */
if (ret->flags & 1)
break;
}
return ret;
}
struct acpi_madt_ioapic * acpi_get_ioapic_next(void)
{
static unsigned idx = 0;
struct acpi_madt_ioapic *ret;
ret = (struct acpi_madt_ioapic *)
acpi_madt_get_typed_item(acpi_ctxt->madt_hdr,
ACPI_MADT_TYPE_IOAPIC, idx);
if (ret)
idx++;
return ret;
}
static int __init acpi_populate_lapic_devtree(struct acpi_madt_hdr *madt_hdr,
struct vmm_devtree_node *cnode)
{
unsigned int idx = 0;
int ret = VMM_OK;
struct acpi_madt_lapic *lapic;
char lapic_nm[256];
for (;;) {
lapic = (struct acpi_madt_lapic *)
acpi_madt_get_typed_item(madt_hdr, ACPI_MADT_TYPE_LAPIC,
idx);
if (!lapic)
break;
memset(lapic_nm, 0, sizeof(lapic_nm));
vmm_sprintf(lapic_nm, VMM_DEVTREE_LAPIC_PCPU_NODE_FMT, idx);
struct vmm_devtree_node *nnode = vmm_devtree_addnode(cnode, lapic_nm);
if (vmm_devtree_setattr(nnode, VMM_DEVTREE_LAPIC_CPU_ID_ATTR_NAME,
&lapic->acpi_cpu_id, VMM_DEVTREE_ATTRTYPE_UINT32,
sizeof(lapic->acpi_cpu_id), FALSE) != VMM_OK) {
ret = VMM_EFAIL;
break;
}
if (vmm_devtree_setattr(nnode, VMM_DEVTREE_LAPIC_LAPIC_ID_ATTR_NAME,
&lapic->apic_id, VMM_DEVTREE_ATTRTYPE_UINT32,
sizeof(lapic->apic_id), FALSE) != VMM_OK) {
ret = VMM_EFAIL;
break;
}
idx++;
}
vmm_devtree_setattr(cnode, VMM_DEVTREE_NR_LAPIC_ATTR_NAME,
&idx, VMM_DEVTREE_ATTRTYPE_UINT32, sizeof(idx), FALSE);
return ret;
}
static int __init acpi_populate_ioapic_devtree(struct acpi_madt_hdr *madt_hdr,
struct vmm_devtree_node *cnode)
{
unsigned int idx = 0;
int ret = VMM_OK;
struct acpi_madt_ioapic *ioapic;
char ioapic_nm[256];
for (;;) {
ioapic = (struct acpi_madt_ioapic *)
acpi_madt_get_typed_item(madt_hdr, ACPI_MADT_TYPE_IOAPIC,
idx);
if (!ioapic)
break;
memset(ioapic_nm, 0, sizeof(ioapic_nm));
vmm_sprintf(ioapic_nm, VMM_DEVTREE_IOAPIC_NODE_FMT, idx);
struct vmm_devtree_node *nnode = vmm_devtree_addnode(cnode, ioapic_nm);
if (vmm_devtree_setattr(nnode, VMM_DEVTREE_IOAPIC_PADDR_ATTR_NAME,
&ioapic->address, VMM_DEVTREE_ATTRTYPE_PHYSADDR,
sizeof(physical_addr_t), FALSE) != VMM_OK) {
ret = VMM_EFAIL;
break;
}
if (vmm_devtree_setattr(nnode, VMM_DEVTREE_IOAPIC_GINT_BASE_ATTR_NAME,
&ioapic->global_int_base, VMM_DEVTREE_ATTRTYPE_UINT32,
sizeof(ioapic->global_int_base), FALSE) != VMM_OK) {
ret = VMM_EFAIL;
break;
}
idx++;
}
vmm_devtree_setattr(cnode, VMM_DEVTREE_NR_IOAPIC_ATTR_NAME,
&idx, VMM_DEVTREE_ATTRTYPE_UINT32, sizeof(idx), FALSE);
return ret;
}
struct acpi_madt_lapic * acpi_get_lapic_next(void)
{
static unsigned idx = 0;
struct acpi_madt_lapic *ret;
for (;;) {
ret = (struct acpi_madt_lapic *)
acpi_madt_get_typed_item(acpi_ctxt->madt_hdr,
ACPI_MADT_TYPE_LAPIC, idx);
if (!ret)
break;
idx++;
/* report only usable CPUs */
if (ret->flags & 1)
break;
}
return ret;
}
struct acpi_madt_ioapic * acpi_get_ioapic_next(void)
{
static unsigned idx = 0;
static struct acpi_madt_hdr * madt_hdr;
struct acpi_madt_ioapic * ret;
if (idx == 0) {
madt_hdr = (struct acpi_madt_hdr *)
acpi_phys2vir(acpi_get_table_base("APIC"));
if (madt_hdr == NULL)
return NULL;
}
ret = (struct acpi_madt_ioapic *)
acpi_madt_get_typed_item(madt_hdr, ACPI_MADT_TYPE_IOAPIC, idx);
if (ret)
idx++;
return ret;
}
