void generate_cpu_entries(void)
{
int len_pr, core;
int pcontrol_blk = get_pmbase(), plen = 6;
const struct pattrs *pattrs = pattrs_get();
for (core=0; core<pattrs->num_cpus; core++) {
if (core > 0) {
pcontrol_blk = 0;
plen = 0;
}
/* Generate processor \_PR.CPUx */
len_pr = acpigen_write_processor(
core, pcontrol_blk, plen);
/* Generate P-state tables */
len_pr += generate_P_state_entries(
core, pattrs->num_cpus);
/* Generate C-state tables */
len_pr += acpigen_write_CST_package(
cstate_map, ARRAY_SIZE(cstate_map));
/* Generate T-state tables */
len_pr += generate_T_state_entries(
core, pattrs->num_cpus);
len_pr--;
acpigen_patch_len(len_pr);
}
}
void generate_cpu_entries(struct device *device)
{
int cores, cpu;
/* Stoney Ridge is single node, just report # of cores */
cores = pci_read_config32(SOC_NB_DEV, NB_CAPABILITIES2) & CMP_CAP_MASK;
cores++; /* number of cores is CmpCap+1 */
printk(BIOS_DEBUG, "ACPI \\_PR report %d core(s)\n", cores);
/* Generate BSP \_PR.P000 */
acpigen_write_processor(0, ACPI_GPE0_BLK, 6);
acpigen_pop_len();
/* Generate AP \_PR.Pxxx */
for (cpu = 1; cpu < cores; cpu++) {
acpigen_write_processor(cpu, 0, 0);
acpigen_pop_len();
}
}
void generate_cpu_entries(device_t device)
{
int cpu, pcontrol_blk=DEFAULT_PMBASE+PCNTRL, plen=6;
int numcpus = determine_total_number_of_cores();
printk(BIOS_DEBUG, "Found %d CPU(s).\n", numcpus);
/* without the outer scope, furhter ssdt addition will end up
* within the processor statement */
acpigen_write_scope("\\_PR");
for (cpu=0; cpu < numcpus; cpu++) {
acpigen_write_processor(cpu, pcontrol_blk, plen);
acpigen_pop_len();
}
acpigen_pop_len();
}
