Ejemplo n.º 1
0
void
archinit(void)
{
	addarchfile("cputype", 0444, cputyperead, nil);
	addarchfile("timebase",0444, tbread, nil);
//	addarchfile("nsec", 0444, nsread, nil);
}
Ejemplo n.º 2
0
void
archinit(void)
{
	addarchfile("cputype", 0444, cputyperead, nil);
	addarchfile("cpucores", 0444, cpucoresread, nil);
	addarchfile("cons", 0666, consoleread, consolewrite);
}
Ejemplo n.º 3
0
void
archinit(void)
{
	addarchfile("cputype", 0444, cputyperead, nil);
	addarchfile("timebase",0444, tbread, nil);
	addarchfile("archctl", 0664, archctlread, archctlwrite);
//	addarchfile("nsec", 0444, nsread, nil);
}
Ejemplo n.º 4
0
static void
vgareset(void)
{
	/* reserve the 'standard' vga registers */
	if(ioalloc(0x2b0, 0x2df-0x2b0+1, 0, "vga") < 0)
		panic("vga ports already allocated"); 
	if(ioalloc(0x3c0, 0x3da-0x3c0+1, 0, "vga") < 0)
		panic("vga ports already allocated"); 
	addarchfile("realmodemem", 0660, rmemread, rmemwrite);
}
Ejemplo n.º 5
0
void
psauxlink(void)
{
	psauxq = qopen(1024, 0, 0, 0);
	if(psauxq == nil)
		panic("psauxlink");
	qnoblock(psauxq, 1);
	i8042auxenable(psauxputc);
	addarchfile("psaux", DMEXCL|0660, psauxread, psauxwrite);
}
Ejemplo n.º 6
0
void
trapinit(void)
{
    /*
     * Need to set BPT interrupt gate - here or in vsvminit?
     */
    /*
     * Special traps.
     * Syscall() is called directly without going through trap().
     */
    trapenable(VectorBPT, debugbpt, 0, "#BP");
    trapenable(VectorPF, faultamd64, 0, "#PF");
    trapenable(Vector2F, doublefault, 0, "#DF");
    intrenable(IdtIPI, expected, 0, BUSUNKNOWN, "#IPI");
    trapenable(Vector15, unexpected, 0, "#15");
    nmienable();

    addarchfile("irqalloc", 0444, irqallocread, nil);
    addarchfile("irqmap", 0666, irqmapread, irqmapwrite);
    addarchfile("irqenable", 0222, nil, irqenablewrite);
}
Ejemplo n.º 7
0
void
trapinit(void)
{
	/*
	 * Special traps.
	 * Syscall() is called directly without going through trap().
	 */
	trapenable(VectorBPT, debugbpt, 0, "debugpt");
	trapenable(VectorPF, fault386, 0, "fault386");
	trapenable(Vector2F, doublefault, 0, "doublefault");
	trapenable(Vector15, unexpected, 0, "unexpected");
	nmienable();

	addarchfile("irqalloc", 0444, irqallocread, nil);
	trapinited = 1;
}
Ejemplo n.º 8
0
void
archinit(void)
{
	PCArch **p;

	arch = 0;
	for(p = knownarch; *p; p++){
		if((*p)->ident && (*p)->ident() == 0){
			arch = *p;
			break;
		}
	}
	if(arch == 0)
		arch = &archgeneric;

	addarchfile("cputype", 0444, cputyperead, nil);
}
Ejemplo n.º 9
0
void
archinit(void)
{
	addarchfile("cputype", 0444, cputyperead, nil);
}
Ejemplo n.º 10
0
void archinit(void)
{
	spinlock_init(&archwlock);
	addarchfile("cputype", 0444, cputyperead, NULL);
	addarchfile("realmodemem", 0660, rmemread, rmemwrite);
}