int
ahc_pci_map_registers(struct ahc_softc *ahc)
{
struct resource *regs;
u_int command;
int regs_type;
int regs_id;
int allow_memio;
command = aic_pci_read_config(ahc->dev_softc, PCIR_COMMAND, /*bytes*/1);
regs = NULL;
regs_type = 0;
regs_id = 0;
/* Retrieve the per-device 'allow_memio' hint */
if (resource_int_value(device_get_name(ahc->dev_softc),
device_get_unit(ahc->dev_softc),
"allow_memio", &allow_memio) != 0) {
if (bootverbose)
device_printf(ahc->dev_softc, "Defaulting to MEMIO ");
#ifdef AHC_ALLOW_MEMIO
if (bootverbose)
kprintf("on\n");
allow_memio = 1;
#else
if (bootverbose)
kprintf("off\n");
allow_memio = 0;
#endif
}
if ((allow_memio != 0) && (command & PCIM_CMD_MEMEN) != 0) {
regs_type = SYS_RES_MEMORY;
regs_id = AHC_PCI_MEMADDR;
regs = bus_alloc_resource_any(ahc->dev_softc, regs_type,
®s_id, RF_ACTIVE);
if (regs != NULL) {
ahc->tag = rman_get_bustag(regs);
ahc->bsh = rman_get_bushandle(regs);
/*
* Do a quick test to see if memory mapped
* I/O is functioning correctly.
*/
if (ahc_pci_test_register_access(ahc) != 0) {
device_printf(ahc->dev_softc,
"PCI Device %d:%d:%d failed memory "
"mapped test. Using PIO.\n",
aic_get_pci_bus(ahc->dev_softc),
aic_get_pci_slot(ahc->dev_softc),
aic_get_pci_function(ahc->dev_softc));
bus_release_resource(ahc->dev_softc, regs_type,
regs_id, regs);
regs = NULL;
} else {
command &= ~PCIM_CMD_PORTEN;
aic_pci_write_config(ahc->dev_softc,
PCIR_COMMAND,
command, /*bytes*/1);
}
}
}
if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
regs_type = SYS_RES_IOPORT;
regs_id = AHC_PCI_IOADDR;
regs = bus_alloc_resource_any(ahc->dev_softc, regs_type,
®s_id, RF_ACTIVE);
if (regs != NULL) {
ahc->tag = rman_get_bustag(regs);
ahc->bsh = rman_get_bushandle(regs);
if (ahc_pci_test_register_access(ahc) != 0) {
device_printf(ahc->dev_softc,
"PCI Device %d:%d:%d failed I/O "
"mapped test.\n",
aic_get_pci_bus(ahc->dev_softc),
aic_get_pci_slot(ahc->dev_softc),
aic_get_pci_function(ahc->dev_softc));
bus_release_resource(ahc->dev_softc, regs_type,
regs_id, regs);
regs = NULL;
} else {
command &= ~PCIM_CMD_MEMEN;
aic_pci_write_config(ahc->dev_softc,
PCIR_COMMAND,
command, /*bytes*/1);
}
}
}
if (regs == NULL) {
device_printf(ahc->dev_softc,
"can't allocate register resources\n");
return (ENOMEM);
}
ahc->platform_data->regs_res_type = regs_type;
ahc->platform_data->regs_res_id = regs_id;
ahc->platform_data->regs = regs;
return (0);
}
int
ahd_pci_map_registers(struct ahd_softc *ahd)
{
struct resource *regs;
struct resource *regs2;
int regs_type;
int regs_id;
int regs_id2;
int allow_memio;
regs = NULL;
regs2 = NULL;
regs_type = 0;
regs_id = 0;
/* Retrieve the per-device 'allow_memio' hint */
if (resource_int_value(device_get_name(ahd->dev_softc),
device_get_unit(ahd->dev_softc),
"allow_memio", &allow_memio) != 0) {
if (bootverbose)
device_printf(ahd->dev_softc,
"Defaulting to MEMIO on\n");
allow_memio = 1;
}
if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) == 0
&& allow_memio != 0) {
regs_type = SYS_RES_MEMORY;
regs_id = AHD_PCI_MEMADDR;
regs = bus_alloc_resource_any(ahd->dev_softc, regs_type,
®s_id, RF_ACTIVE);
if (regs != NULL) {
int error;
ahd->tags[0] = rman_get_bustag(regs);
ahd->bshs[0] = rman_get_bushandle(regs);
ahd->tags[1] = ahd->tags[0];
error = bus_space_subregion(ahd->tags[0], ahd->bshs[0],
/*offset*/0x100,
/*size*/0x100,
&ahd->bshs[1]);
/*
* Do a quick test to see if memory mapped
* I/O is functioning correctly.
*/
if (error != 0
|| ahd_pci_test_register_access(ahd) != 0) {
device_printf(ahd->dev_softc,
"PCI Device %d:%d:%d failed memory "
"mapped test. Using PIO.\n",
aic_get_pci_bus(ahd->dev_softc),
aic_get_pci_slot(ahd->dev_softc),
aic_get_pci_function(ahd->dev_softc));
bus_release_resource(ahd->dev_softc, regs_type,
regs_id, regs);
regs = NULL;
AHD_CORRECTABLE_ERROR(ahd);
}
}
}
if (regs == NULL) {
regs_type = SYS_RES_IOPORT;
regs_id = AHD_PCI_IOADDR0;
regs = bus_alloc_resource_any(ahd->dev_softc, regs_type,
®s_id, RF_ACTIVE);
if (regs == NULL) {
device_printf(ahd->dev_softc,
"can't allocate register resources\n");
AHD_UNCORRECTABLE_ERROR(ahd);
return (ENOMEM);
}
ahd->tags[0] = rman_get_bustag(regs);
ahd->bshs[0] = rman_get_bushandle(regs);
/* And now the second BAR */
regs_id2 = AHD_PCI_IOADDR1;
regs2 = bus_alloc_resource_any(ahd->dev_softc, regs_type,
®s_id2, RF_ACTIVE);
if (regs2 == NULL) {
device_printf(ahd->dev_softc,
"can't allocate register resources\n");
AHD_UNCORRECTABLE_ERROR(ahd);
return (ENOMEM);
}
ahd->tags[1] = rman_get_bustag(regs2);
ahd->bshs[1] = rman_get_bushandle(regs2);
ahd->platform_data->regs_res_type[1] = regs_type;
ahd->platform_data->regs_res_id[1] = regs_id2;
ahd->platform_data->regs[1] = regs2;
}
ahd->platform_data->regs_res_type[0] = regs_type;
ahd->platform_data->regs_res_id[0] = regs_id;
ahd->platform_data->regs[0] = regs;
return (0);
}
static int
ahd_aic790X_setup(struct ahd_softc *ahd)
{
aic_dev_softc_t pci;
u_int rev;
pci = ahd->dev_softc;
rev = aic_pci_read_config(pci, PCIR_REVID, /*bytes*/1);
if (rev < ID_AIC7902_PCI_REV_A4) {
printf("%s: Unable to attach to unsupported chip revision %d\n",
ahd_name(ahd), rev);
aic_pci_write_config(pci, PCIR_COMMAND, 0, /*bytes*/2);
return (ENXIO);
}
ahd->channel = aic_get_pci_function(pci) + 'A';
if (rev < ID_AIC7902_PCI_REV_B0) {
/*
* Enable A series workarounds.
*/
ahd->bugs |= AHD_SENT_SCB_UPDATE_BUG|AHD_ABORT_LQI_BUG
| AHD_PKT_BITBUCKET_BUG|AHD_LONG_SETIMO_BUG
| AHD_NLQICRC_DELAYED_BUG|AHD_SCSIRST_BUG
| AHD_LQO_ATNO_BUG|AHD_AUTOFLUSH_BUG
| AHD_CLRLQO_AUTOCLR_BUG|AHD_PCIX_MMAPIO_BUG
| AHD_PCIX_CHIPRST_BUG|AHD_PCIX_SCBRAM_RD_BUG
| AHD_PKTIZED_STATUS_BUG|AHD_PKT_LUN_BUG
| AHD_MDFF_WSCBPTR_BUG|AHD_REG_SLOW_SETTLE_BUG
| AHD_SET_MODE_BUG|AHD_BUSFREEREV_BUG
| AHD_NONPACKFIFO_BUG|AHD_PACED_NEGTABLE_BUG
| AHD_FAINT_LED_BUG;
/*
* IO Cell paramter setup.
*/
AHD_SET_PRECOMP(ahd, AHD_PRECOMP_CUTBACK_29);
if ((ahd->flags & AHD_HP_BOARD) == 0)
AHD_SET_SLEWRATE(ahd, AHD_SLEWRATE_DEF_REVA);
} else {
u_int devconfig1;
ahd->features |= AHD_RTI|AHD_NEW_IOCELL_OPTS
| AHD_NEW_DFCNTRL_OPTS|AHD_FAST_CDB_DELIVERY;
ahd->bugs |= AHD_LQOOVERRUN_BUG|AHD_EARLY_REQ_BUG;
/*
* Some issues have been resolved in the 7901B.
*/
if ((ahd->features & AHD_MULTI_FUNC) != 0)
ahd->bugs |= AHD_INTCOLLISION_BUG|AHD_ABORT_LQI_BUG
| AHD_BUSFREEREV_BUG;
/*
* IO Cell paramter setup.
*/
AHD_SET_PRECOMP(ahd, AHD_PRECOMP_CUTBACK_29);
AHD_SET_SLEWRATE(ahd, AHD_SLEWRATE_DEF_REVB);
AHD_SET_AMPLITUDE(ahd, AHD_AMPLITUDE_DEF);
/*
* Set the PREQDIS bit for H2B which disables some workaround
* that doesn't work on regular PCI busses.
* XXX - Find out exactly what this does from the hardware
* folks!
*/
devconfig1 = aic_pci_read_config(pci, DEVCONFIG1, /*bytes*/1);
aic_pci_write_config(pci, DEVCONFIG1,
devconfig1|PREQDIS, /*bytes*/1);
devconfig1 = aic_pci_read_config(pci, DEVCONFIG1, /*bytes*/1);
}
return (0);
}