Ejemplo n.º 1
0
static void ag71xx_hw_init(struct ag71xx *ag)
{
	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);

	ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR);
	udelay(20);

	ar71xx_device_stop(pdata->reset_bit);
	mdelay(100);
	ar71xx_device_start(pdata->reset_bit);
	mdelay(100);

	/* setup MAC configuration registers */
	ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
	ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
		  MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);

	/* setup max frame length */
	ag71xx_wr(ag, AG71XX_REG_MAC_MFL, AG71XX_TX_MTU_LEN);

	/* setup MII interface type */
	ag71xx_mii_ctrl_set_if(ag, pdata->mii_if);

	/* setup FIFO configuration registers */
	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT);
	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000);
	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff);
	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT);
	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT);

	ag71xx_dma_reset(ag);
}
Ejemplo n.º 2
0
static void pb44_vsc7395_reset(void)
{
	ar71xx_device_stop(RESET_MODULE_GE1_PHY);
	udelay(10);
	ar71xx_device_start(RESET_MODULE_GE1_PHY);
	mdelay(50);
}
Ejemplo n.º 3
0
static void ag71xx_hw_init(struct ag71xx *ag)
{
	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);

	ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR);
	udelay(20);

	ar71xx_device_stop(pdata->reset_bit);
	mdelay(100);
	ar71xx_device_start(pdata->reset_bit);
	mdelay(100);

	ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);

	/* TODO: set max packet size */

	ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
		  MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);

	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, 0x00001f00);

	ag71xx_mii_ctrl_set_if(ag, pdata->mii_if);

	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000);
	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff);
	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, 0x0000ffff);
	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, 0x0007ffef);
}
Ejemplo n.º 4
0
void
platform_reset(void)
{
	ar71xx_device_stop(RST_RESET_FULL_CHIP);
	/* Wait for reset */
	while(1)
		;
}
Ejemplo n.º 5
0
static void wndr3700_usb_led_set(struct led_classdev *cdev,
				 enum led_brightness brightness)
{
	if (brightness)
		ar71xx_device_start(RESET_MODULE_GE1_PHY);
	else
		ar71xx_device_stop(RESET_MODULE_GE1_PHY);
}
Ejemplo n.º 6
0
static void ar913x_wmac_init(void)
{
	ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
	mdelay(10);

	ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
	mdelay(10);

	ar9xxx_wmac_resources[0].start = AR91XX_WMAC_BASE;
	ar9xxx_wmac_resources[0].end = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1;
}
Ejemplo n.º 7
0
void __init ar71xx_add_device_usb(void)
{
	ar71xx_device_stop(AR71XX_USB_RESET_MASK);
	mdelay(1000);
	ar71xx_device_start(AR71XX_USB_RESET_MASK);

	/* Turning on the Buff and Desc swap bits */
	ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);

	/* WAR for HW bug. Here it adjusts the duration between two SOFS */
	ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);

	mdelay(900);

	platform_device_register(&ar71xx_usb_ohci_device);
	platform_device_register(&ar71xx_usb_ehci_device);
}
Ejemplo n.º 8
0
void __init ar913x_add_device_wmac(u8 *cal_data, u8 *mac_addr)
{
	if (cal_data)
		memcpy(ar913x_wmac_data.eeprom_data, cal_data,
		       sizeof(ar913x_wmac_data.eeprom_data));

	if (mac_addr) {
		memcpy(ar913x_wmac_mac, mac_addr, sizeof(ar913x_wmac_mac));
		ar913x_wmac_data.macaddr = ar913x_wmac_mac;
	}

	ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
	mdelay(10);

	ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
	mdelay(10);

	platform_device_register(&ar913x_wmac_device);
}
Ejemplo n.º 9
0
static int ar933x_wmac_reset(void)
{
	unsigned retries = 0;

	ar71xx_device_stop(AR933X_RESET_WMAC);
	ar71xx_device_start(AR933X_RESET_WMAC);

	while (1) {
		u32 bootstrap;

		bootstrap = ar71xx_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
		if ((bootstrap & AR933X_BOOTSTRAP_EEPBUSY) == 0)
			return 0;

		if (retries > 20)
			break;

		udelay(10000);
		retries++;
	}

	printk(KERN_EMERG "ar93xx: WMAC reset timed out");
	return -ETIMEDOUT;
}
Ejemplo n.º 10
0
void __init ar71xx_add_device_eth(unsigned int id)
{
	struct platform_device *pdev;
	struct ag71xx_platform_data *pdata;

	ar71xx_init_eth_pll_data(id);

	switch (id) {
	case 0:
		switch (ar71xx_eth0_data.phy_if_mode) {
		case PHY_INTERFACE_MODE_MII:
			ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
			break;
		case PHY_INTERFACE_MODE_GMII:
			ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
			break;
		case PHY_INTERFACE_MODE_RGMII:
			ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
			break;
		case PHY_INTERFACE_MODE_RMII:
			ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
			break;
		default:
			printk(KERN_ERR "ar71xx: invalid PHY interface mode "
					"for eth0\n");
			return;
		}
		pdev = &ar71xx_eth0_device;
		break;
	case 1:
		switch (ar71xx_eth1_data.phy_if_mode) {
		case PHY_INTERFACE_MODE_RMII:
			ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
			break;
		case PHY_INTERFACE_MODE_RGMII:
			ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
			break;
		default:
			printk(KERN_ERR "ar71xx: invalid PHY interface mode "
					"for eth1\n");
			return;
		}
		pdev = &ar71xx_eth1_device;
		break;
	default:
		printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
		return;
	}

	pdata = pdev->dev.platform_data;

	switch (ar71xx_soc) {
	case AR71XX_SOC_AR7130:
		pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
				      : ar71xx_ddr_flush_ge0;
		pdata->set_pll =  id ? ar71xx_set_pll_ge1
				     : ar71xx_set_pll_ge0;
		break;

	case AR71XX_SOC_AR7141:
	case AR71XX_SOC_AR7161:
		pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
				      : ar71xx_ddr_flush_ge0;
		pdata->set_pll =  id ? ar71xx_set_pll_ge1
				     : ar71xx_set_pll_ge0;
		pdata->has_gbit = 1;
		break;

	case AR71XX_SOC_AR7241:
	case AR71XX_SOC_AR7242:
		ar71xx_eth0_data.reset_bit |= AR724X_RESET_GE0_MDIO;
		ar71xx_eth1_data.reset_bit |= AR724X_RESET_GE1_MDIO;
		/* fall through */
	case AR71XX_SOC_AR7240:
		pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
				      : ar724x_ddr_flush_ge0;
		pdata->set_pll =  id ? ar724x_set_pll_ge1
				     : ar724x_set_pll_ge0;
		pdata->is_ar724x = 1;
		break;

	case AR71XX_SOC_AR9130:
		pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
				      : ar91xx_ddr_flush_ge0;
		pdata->set_pll =  id ? ar91xx_set_pll_ge1
				     : ar91xx_set_pll_ge0;
		pdata->is_ar91xx = 1;
		break;

	case AR71XX_SOC_AR9132:
		pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
				      : ar91xx_ddr_flush_ge0;
		pdata->set_pll =  id ? ar91xx_set_pll_ge1
				      : ar91xx_set_pll_ge0;
		pdata->is_ar91xx = 1;
		pdata->has_gbit = 1;
		break;

	default:
		BUG();
	}

	switch (pdata->phy_if_mode) {
	case PHY_INTERFACE_MODE_GMII:
	case PHY_INTERFACE_MODE_RGMII:
		if (!pdata->has_gbit) {
			printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
					id);
			return;
		}
		/* fallthrough */
	default:
		break;
	}

	if (is_valid_ether_addr(ar71xx_mac_base)) {
		memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
		pdata->mac_addr[5] += ar71xx_eth_instance;
	} else {
		random_ether_addr(pdata->mac_addr);
		printk(KERN_DEBUG
			"ar71xx: using random MAC address for eth%d\n",
			ar71xx_eth_instance);
	}

	if (pdata->mii_bus_dev == NULL)
		pdata->mii_bus_dev = &ar71xx_mdio_device.dev;

	/* Reset the device */
	ar71xx_device_stop(pdata->reset_bit);
	mdelay(100);

	ar71xx_device_start(pdata->reset_bit);
	mdelay(100);

	platform_device_register(pdev);
	ar71xx_eth_instance++;
}