void Init5225x(void)
{
register uint32_t i;
register uint32_t *dp, *sp;
register uint8_t *dbp, *sbp;
/*
* Copy the vector table to RAM
*/
if (&_VBR != _INTERRUPT_VECTOR) {
sp = (uint32_t *) _INTERRUPT_VECTOR;
dp = (uint32_t *) &_VBR;
for (i = 0; i < 256; i++) {
*dp++ = *sp++;
}
}
/*
* Move initialized data from ROM to RAM.
*/
if (_data_src_start != _data_dest_start) {
dbp = (uint8_t *) _data_dest_start;
sbp = (uint8_t *) _data_src_start;
i = _data_dest_end - _data_dest_start;
while (i--)
*dbp++ = *sbp++;
}
asm __volatile__ ("move.l %%d5,%0\n\t":"=r" (_d0_reset));
asm __volatile__ ("move.l %%d6,%0\n\t":"=r" (_d1_reset));
/*
* Zero uninitialized data
*/
if (_clear_start != _clear_end) {
sbp = _clear_start;
dbp = _clear_end;
i = dbp - sbp;
while (i--)
*sbp++ = 0;
}
//_wr_vbr((uint32_t) &_VBR);
asm volatile("move.l %0,%%d7;movec %%d7,%%vbr\n\t"::"i"(&_VBR): "cc");
/*
* We have to call some kind of RTEMS function here!
*/
boot_card(0);
for (;;) ;
}
void Init5329(void)
{
register uint32_t i;
register uint8_t *dbp, *sbp;
register uint32_t *dp, *sp;
/*
* Initialize the hardware
*/
init_main();
/*
* Copy the vector table to RAM
*/
if (&_VBR != (void *) _INTERRUPT_VECTOR) {
sp = (uint32_t *) _INTERRUPT_VECTOR;
dp = (uint32_t *) &_VBR;
for (i = 0; i < 256; i++) {
*dp++ = *sp++;
}
}
_wr_vbr((uint32_t) &_VBR);
/*
* Move initialized data from ROM to RAM.
*/
if (_data_src_start != _data_dest_start) {
dbp = (uint8_t *) _data_dest_start;
sbp = (uint8_t *) _data_src_start;
i = _data_dest_end - _data_dest_start;
while (i--)
*dbp++ = *sbp++;
}
/*
* Zero uninitialized data
*/
if (_clear_start != _clear_end) {
sbp = _clear_start;
dbp = _clear_end;
i = dbp - sbp;
while (i--)
*sbp++ = 0;
}
/*
* We have to call some kind of RTEMS function here!
*/
boot_card(0);
for (;;) ;
}
void cmain (void)
{
/*
* init variable sections
*/
__memcpy (__sdata2_start, __sdata2_load, __sdata2_end - __sdata2_start);
__memcpy (__sdata_start , __sdata_load , __sdata_end - __sdata_start);
__memcpy (__data_start , __data_load , __data_end - __data_start);
__bzero (__sbss2_start , __sbss2_end - __sbss2_start);
__bzero (__sbss_start , __sbss_end - __sbss_start);
__bzero (__bss_start , __bss_end - __bss_start);
/* printk( "start of BSP\n"); */
boot_card(0);
/* printk( "end of BSP\n"); */
__outb (0x92, 0x01);
while (1)
;
}
void start_c(void) {
/* Synthesizer Control Register */
/* see section(s) 4.8 */
/* end include in ram_init.S */
*SYNCR = (unsigned short int)
( SAM(MRM_W,15,VCO) | SAM(0x0,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) );
while (! (*SYNCR & SLOCK)); /* protect from clock overshoot */
/* include in ram_init.S */
*SYNCR = (unsigned short int)
( SAM(MRM_W,15,VCO) | SAM(MRM_X,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) );
/* System Protection Control Register */
/* !!! can only write to once after reset !!! */
/* see section 3.8.4 of the SIM Reference Manual */
*SYPCR = (unsigned char)( HME | BME );
/* Periodic Interrupr Control Register */
/* see section 3.8.2 of the SIM Reference Manual */
*PICR = (unsigned short int)
( SAM(0,8,PIRQL) | SAM(MRM_PIV,0,PIV) );
/* ^^^ zero disables interrupt, don't enable here or ram_init will
be wrong. It's enabled below. */
/* Periodic Interrupt Timer Register */
/* see section 3.8.3 of the SIM Reference Manual */
*PITR = (unsigned short int)( SAM(0x09,0,PITM) );
/* 1.098mS interrupt, assuming 32.768 KHz input clock */
/* Port C Data */
/* load values before enabled */
*PORTC = (unsigned char) 0x0;
/* Port E and F Data Register */
/* see section 9 of the SIM Reference Manual */
*PORTE0 = (unsigned char) 0;
*PORTF0 = (unsigned char) 0;
/* Port E and F Data Direction Register */
/* see section 9 of the SIM Reference Manual */
*DDRE = (unsigned char) 0xff;
*DDRF = (unsigned char) 0xfd;
/* Port E and F Pin Assignment Register */
/* see section 9 of the SIM Reference Manual */
*PEPAR = (unsigned char) 0;
*PFPAR = (unsigned char) 0;
/* end of SIM initalization code */
/* end include in ram_init.S */
/*
* Initialize RAM by copying the .data section out of ROM (if
* needed) and "zero-ing" the .bss section.
*/
{
register char *src = _etext;
register char *dst = _copy_start;
if (_copy_data_from_rom)
/* ROM has data at end of text; copy it. */
while (dst < _edata)
*dst++ = *src++;
/* Zero bss */
for (dst = _clear_start; dst< end; dst++)
{
*dst = 0;
}
}
/*
* Initialize vector table.
*/
{
m68k_isr_entry *monitors_vector_table;
m68k_get_vbr(monitors_vector_table);
M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */
M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */
M68Kvec[ 31 ] = monitors_vector_table[ 31 ]; /* level 7 interrupt */
M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */
M68Kvec[ 66 ] = monitors_vector_table[ 66 ]; /* user defined */
m68k_set_vbr(&M68Kvec);
}
/*
* Initalize the board.
*/
/* Spurious should be called in the predriver hook */
/* Spurious_Initialize(); */
/*console_init(); */
/*
* Execute main with arguments argc and agrv.
*/
boot_card((void*)0);
reboot();
}
