void * threaded_func(void *data)
{
int rc;
int sum = 0;
// compute
do_work();
#ifdef APP_DO_LOCK_TEST
// test locking - sampling should catch this
if ((rc = pthread_mutex_lock(&mutexsum)) != 0)
{
errno = rc;
perror("thread lock error");
exit(1);
}
fprintf(stderr,"Thread 'sleeping'...\n"); fflush(stderr);
sum += busy_sleep();
fprintf(stderr,"Thread 'awake'...\n"); fflush(stderr);
if ((rc = pthread_mutex_unlock(&mutexsum)) != 0)
{
errno = rc;
perror("thread unlock error");
exit(1);
}
pthread_exit((void*) 0);
//return NULL;
#endif // APP_DO_LOCK_TEST
}
/* The write routine stub. */
static int nuc1x_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
uint32_t i, timeout, status;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
LOG_INFO("Novoton NUC: FLASH Write ...");
int retval = nuc1x_reset2lprom(bank);
if (retval != ERROR_OK)
return retval;
retval = nuc1x_init_iap(bank);
if (retval != ERROR_OK)
return retval;
retval = nuc1x_unlock(bank);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, NUC1X_FLASH_ISPCMD, ISPCMD_WRITE);
if (retval != ERROR_OK)
return retval;
/* program command */
for (i = 0; i < count; i += 4) {
LOG_DEBUG("write longword @ %08" PRIX32, (uint32_t)(offset + i));
uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
memcpy(padding, buffer + i, MIN(4, count-i));
retval = target_write_u32(target, NUC1X_FLASH_ISPADR, bank->base + offset + i);
if (retval != ERROR_OK)
return retval;
retval = target_write_memory(target, NUC1X_FLASH_ISPDAT, 4, 1, padding);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, NUC1X_FLASH_ISPTRG, ISPTRG_ISPGO);
if (retval != ERROR_OK)
return retval;
/* wait for busy to clear - check the GO flag */
timeout = 100;
for (;;) {
retval = target_read_u32(target, NUC1X_FLASH_ISPTRG, &status);
if (retval != ERROR_OK)
return retval;
LOG_DEBUG("status: 0x%" PRIx32 "", status);
if (status == 0)
break;
if (timeout-- <= 0) {
LOG_DEBUG("timed out waiting for flash");
return ERROR_FAIL;
}
busy_sleep(1); /* can use busy sleep for short times. */
}
/* check for failure */
retval = target_read_u32(target, NUC1X_FLASH_ISPCON, &status);
if (retval != ERROR_OK)
return retval;
if ((status & ISPCON_ISPFF) != 0) {
LOG_DEBUG("failure: 0x%" PRIx32 "", status);
/* if bit is set, then must write to it to clear it. */
retval = target_write_u32(target, NUC1X_FLASH_ISPCON, ISPCON_ISPFF);
if (retval != ERROR_OK)
return retval;
} else {
LOG_DEBUG("writed OK");
}
}
retval = nuc1x_reset(bank);
if (retval != ERROR_OK)
return retval;
/* done, */
LOG_DEBUG("Write done.");
return ERROR_OK;
}
static int nuc1x_erase(struct flash_bank *bank, int first, int last)
{
struct target *target = bank->target;
uint32_t timeout, status;
int i;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
LOG_INFO("Nuvoton NUC: Sector Erase ... (%d to %d)", first, last);
int retval = nuc1x_reset2lprom(bank);
if (retval != ERROR_OK)
return retval;
retval = nuc1x_init_iap(bank);
if (retval != ERROR_OK)
return retval;
retval = nuc1x_unlock(bank);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, NUC1X_FLASH_ISPCMD, ISPCMD_ERASE);
if (retval != ERROR_OK)
return retval;
for (i = first; i <= last; i++) {
LOG_DEBUG("erasing sector %d at addresss 0x%" PRIx32 "", i, bank->base + bank->sectors[i].offset);
retval = target_write_u32(target, NUC1X_FLASH_ISPADR, bank->base + bank->sectors[i].offset);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, NUC1X_FLASH_ISPTRG, ISPTRG_ISPGO); /* This is the only bit available */
if (retval != ERROR_OK)
return retval;
/* wait for busy to clear - check the GO flag */
timeout = 100;
for (;;) {
retval = target_read_u32(target, NUC1X_FLASH_ISPTRG, &status);
if (retval != ERROR_OK)
return retval;
LOG_DEBUG("status: 0x%" PRIx32 "", status);
if (status == 0)
break;
if (timeout-- <= 0) {
LOG_DEBUG("timed out waiting for flash");
return ERROR_FAIL;
}
busy_sleep(1); /* can use busy sleep for short times. */
}
/* check for failure */
retval = target_read_u32(target, NUC1X_FLASH_ISPCON, &status);
if (retval != ERROR_OK)
return retval;
if ((status & ISPCON_ISPFF) != 0) {
LOG_DEBUG("failure: 0x%" PRIx32 "", status);
/* if bit is set, then must write to it to clear it. */
retval = target_write_u32(target, NUC1X_FLASH_ISPCON, ISPCON_ISPFF);
if (retval != ERROR_OK)
return retval;
} else {
bank->sectors[i].is_erased = 1;
}
}
retval = nuc1x_reset(bank);
if (retval != ERROR_OK)
return retval;
/* done, */
LOG_DEBUG("Erase done.");
return ERROR_OK;
}