static int ccu_div_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct ccu_div *cd = hw_to_ccu_div(hw);
unsigned long flags;
unsigned long val;
u32 reg;
parent_rate = ccu_mux_helper_apply_prediv(&cd->common, &cd->mux, -1,
parent_rate);
if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= cd->fixed_post_div;
val = divider_get_val(rate, parent_rate, cd->div.table, cd->div.width,
cd->div.flags);
spin_lock_irqsave(cd->common.lock, flags);
reg = readl(cd->common.base + cd->common.reg);
reg &= ~GENMASK(cd->div.width + cd->div.shift - 1, cd->div.shift);
writel(reg | (val << cd->div.shift),
cd->common.base + cd->common.reg);
spin_unlock_irqrestore(cd->common.lock, flags);
return 0;
}
static int ccu_mp_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct ccu_mp *cmp = hw_to_ccu_mp(hw);
unsigned long flags;
unsigned int max_m, max_p;
unsigned int m, p;
u32 reg;
/* Adjust parent_rate according to pre-dividers */
parent_rate = ccu_mux_helper_apply_prediv(&cmp->common, &cmp->mux, -1,
parent_rate);
max_m = cmp->m.max ?: 1 << cmp->m.width;
max_p = cmp->p.max ?: 1 << ((1 << cmp->p.width) - 1);
ccu_mp_find_best(parent_rate, rate, max_m, max_p, &m, &p);
spin_lock_irqsave(cmp->common.lock, flags);
reg = readl(cmp->common.base + cmp->common.reg);
reg &= ~GENMASK(cmp->m.width + cmp->m.shift - 1, cmp->m.shift);
reg &= ~GENMASK(cmp->p.width + cmp->p.shift - 1, cmp->p.shift);
reg |= (m - cmp->m.offset) << cmp->m.shift;
reg |= ilog2(p) << cmp->p.shift;
writel(reg, cmp->common.base + cmp->common.reg);
spin_unlock_irqrestore(cmp->common.lock, flags);
return 0;
}
static unsigned long ccu_mult_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct ccu_mult *cm = hw_to_ccu_mult(hw);
unsigned long val;
u32 reg;
if (ccu_frac_helper_is_enabled(&cm->common, &cm->frac))
return ccu_frac_helper_read_rate(&cm->common, &cm->frac);
reg = readl(cm->common.base + cm->common.reg);
val = reg >> cm->mult.shift;
val &= (1 << cm->mult.width) - 1;
parent_rate = ccu_mux_helper_apply_prediv(&cm->common, &cm->mux, -1,
parent_rate);
return parent_rate * (val + cm->mult.offset);
}
static int ccu_mult_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct ccu_mult *cm = hw_to_ccu_mult(hw);
struct _ccu_mult _cm;
unsigned long flags;
u32 reg;
if (ccu_frac_helper_has_rate(&cm->common, &cm->frac, rate)) {
ccu_frac_helper_enable(&cm->common, &cm->frac);
return ccu_frac_helper_set_rate(&cm->common, &cm->frac,
rate, cm->lock);
} else {
ccu_frac_helper_disable(&cm->common, &cm->frac);
}
parent_rate = ccu_mux_helper_apply_prediv(&cm->common, &cm->mux, -1,
parent_rate);
_cm.min = cm->mult.min;
if (cm->mult.max)
_cm.max = cm->mult.max;
else
_cm.max = (1 << cm->mult.width) + cm->mult.offset - 1;
ccu_mult_find_best(parent_rate, rate, &_cm);
spin_lock_irqsave(cm->common.lock, flags);
reg = readl(cm->common.base + cm->common.reg);
reg &= ~GENMASK(cm->mult.width + cm->mult.shift - 1, cm->mult.shift);
reg |= ((_cm.mult - cm->mult.offset) << cm->mult.shift);
writel(reg, cm->common.base + cm->common.reg);
spin_unlock_irqrestore(cm->common.lock, flags);
ccu_helper_wait_for_lock(&cm->common, cm->lock);
return 0;
}
static unsigned long ccu_div_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct ccu_div *cd = hw_to_ccu_div(hw);
unsigned long val;
u32 reg;
reg = readl(cd->common.base + cd->common.reg);
val = reg >> cd->div.shift;
val &= (1 << cd->div.width) - 1;
parent_rate = ccu_mux_helper_apply_prediv(&cd->common, &cd->mux, -1,
parent_rate);
val = divider_recalc_rate(hw, parent_rate, val, cd->div.table,
cd->div.flags, cd->div.width);
if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV)
val /= cd->fixed_post_div;
return val;
}
static unsigned long ccu_mp_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct ccu_mp *cmp = hw_to_ccu_mp(hw);
unsigned int m, p;
u32 reg;
/* Adjust parent_rate according to pre-dividers */
parent_rate = ccu_mux_helper_apply_prediv(&cmp->common, &cmp->mux, -1,
parent_rate);
reg = readl(cmp->common.base + cmp->common.reg);
m = reg >> cmp->m.shift;
m &= (1 << cmp->m.width) - 1;
m += cmp->m.offset;
if (!m)
m++;
p = reg >> cmp->p.shift;
p &= (1 << cmp->p.width) - 1;
return (parent_rate >> p) / m;
}
